[Expired for QEMU because there has been no activity for 60 days.]
** Changed in: qemu
Status: Incomplete => Expired
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1567254
Title:
qemu-2.5.1
From: Zhang Chen
We add the "notify_dev=chardevID" parameter. After that colo-compare can
connect with
remote(currently just for Xen, KVM-COLO didn't need it.) colo-frame through
chardev socket,
it can notify remote(Xen) colo-frame to handle checkpoint event.
Signed-off-by: Zhang Chen
---
ne
From: Zhang Chen
We need use this function to send notification message for remote
colo-frame(Xen).
So we add new parameter for this job.
Signed-off-by: Zhang Chen
---
net/colo-compare.c | 41 +
1 file changed, 33 insertions(+), 8 deletions(-)
diff --g
From: Zhang Chen
This patch make colo-compare can send message to remote COLO frame(Xen) when
occur checkpoint.
Signed-off-by: Zhang Chen
---
net/colo-compare.c | 51 +-
1 file changed, 46 insertions(+), 5 deletions(-)
diff --git a/net/colo-compare
From: Zhang Chen
We have add the notify_remote_frame function for Xen,
so we rename the colo_compare_inconsistency_notify to
notify_native_frame(KVM-qemu COLO frame) looks better.
Signed-off-by: Zhang Chen
---
net/colo-compare.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
di
From: Zhang Chen
Xen COLO based on KVM COLO architecture, it shared COLO proxy and block
replication with KVM COLO. The only differece is Xen COLO have own
COLO-frame to handle live migration related function, so we need this
series make Xen COLO frame can communicate with other COLO modules in
q
From: Zhang Chen
Add chardev handler to send notification to remote(current from Xen) colo-frame.
Signed-off-by: Zhang Chen
---
net/colo-compare.c | 39 +++
1 file changed, 39 insertions(+)
diff --git a/net/colo-compare.c b/net/colo-compare.c
index 21849748
From: Zhang Chen
We need to notify net filter to do checkpoint for Xen COLO, like KVM side.
Signed-off-by: Zhang Chen
---
migration/colo.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/migration/colo.c b/migration/colo.c
index 8c1644091f..9f84b1fa3c 100644
--- a/migration/colo.c
+++ b/
Hi Richard.
these instructions are not branches or jumps they all do skip.
however, if you think it's important I change it, I will, just show me an
example or explain.
On Fri, May 31, 2019 at 6:31 PM Richard Henderson <
richard.hender...@linaro.org> wrote:
> On 5/30/19 2:07 PM, Michael Rolnik w
On Wed, 8 May 2019 at 21:59, Markus Armbruster wrote:
>
> Peter Maydell writes:
>
> > On Thu, 18 Apr 2019 at 05:05, Hongbo Zhang wrote:
> >>
> >> Following the previous patch, this patch adds peripheral devices to the
> >> newly introduced SBSA-ref machine.
> >>
> >> Signed-off-by: Hongbo Zhang
On the host: readlink clang
clang-9
and guest:
ls: cannot read symbolic link 'clang': No such file or directory
lrwxrwxrwx 1 root root 7 May 30 02:21 clang
readlink clang
returns nothing.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to
Public bug reported:
I am trying to use clang that is mounted from a 9p filesystem that has the
options
-fsdev local,id=virtfs3,path=/clang,security_model=mapped-file -device
virtio-9p-pci,fsdev=virtfs3,mount_tag=clang
clang has symlinks to clang-9. eg /clang/clang/bin/clang is a symlink
that
Patchew URL:
https://patchew.org/QEMU/20190531134315.4109-1-richard.hender...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PATCH v16 00/23] Add RX architecture
Type: series
Message-id: 20190531134315.4109-1
Hi Richard.
If I implement it this way
```
static bool trans_BREAK(DisasContext *ctx, arg_BREAK *a)
{
if (avr_feature(ctx->env, AVR_FEATURE_BREAK) == false) {
gen_helper_unsupported(cpu_env);
} else {
tcg_gen_movi_tl(cpu_pc, ctx->inst[0].npc);
gen_helper_deb
Hi Eric.
please explain what should I do or point to an example or documentation.
On Fri, May 31, 2019 at 5:50 PM Eric Blake wrote:
> On 5/30/19 2:07 PM, Michael Rolnik wrote:
> > From: Sarah Harris
> >
> > Signed-off-by: Sarah Harris
> > Signed-off-by: Michael Rolnik
> > ---
>
> > +++ b/qap
From: Mateja Marjanovic
Eliminate loops for better performance.
Following MSA instructions from "UNOP" group are affected:
- NLZC.
- NLOC.
- PCNT.
Following MSA instructions from "BINOP" group are affected:
- ADD_A.
- ADDS_A.
- ADDS_S.
- ADDS_U.
- ADDV.
- ASUB_S.
- ASUB_U.
- AVE_S.
From: Aleksandar Markovic
The following changes since commit 60905286cb5150de854e08279bca7dfc4b549e91:
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.1-20190529' into
staging (2019-05-30 15:08:00 +0100)
are available in the git repository at:
https://github.com/AMarkovic/qem
From: Aleksandar Markovic
Remove several minor checkpatch warnings and errors.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <1556018982-3715-6-git-send-email-aleksandar.marko...@rt-rk.com>
---
target/mips/dsp_helper.c | 40 +---
From: Aleksandar Markovic
Remove several minor checkpatch warnings and errors.
Signed-off-by: Aleksandar Markovic
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <1556018982-3715-7-git-send-email-aleksandar.marko...@rt-rk.com>
---
target/mips/lmi_helper.c | 8 +---
1 file changed, 5 inser
From: Aleksandar Markovic
Add tests for MSA bit set instructions. This includes following
instructions:
* BCLR.B - clear bit (bytes)
* BCLR.H - clear bit (halfwords)
* BCLR.W - clear bit (words)
* BCLR.D - clear bit (doublewords)
* BNEG.B - negate bit (bytes)
* BNEG.H - negate bit (h
From: Mateja Marjanovic
Add emulation of MMI instruction PCPYUD. The emulation is implemented
using TCG front end operations directly to achieve better performance.
Signed-off-by: Mateja Marjanovic
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
Message-Id: <1551712405-2530-
From: Mateja Marjanovic
Add emulation of MMI instruction PCPYH. The emulation is implemented
using TCG front end operations directly to achieve better performance.
Signed-off-by: Mateja Marjanovic
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
Message-Id: <1551712405-2530-2
From: Mateja Marjanovic
Add emulation of MMI instruction PCPYLD. The emulation is implemented
using TCG front end operations directly to achieve better performance.
Signed-off-by: Mateja Marjanovic
Signed-off-by: Aleksandar Markovic
Reviewed-by: Aleksandar Rikalo
Message-Id: <1551712405-2530-
On Fri, 31 May 2019 16:36:33 -0300
Eduardo Habkost wrote:
> On Tue, May 28, 2019 at 10:48:09AM +0800, Yongji Xie wrote:
> > On Tue, 28 May 2019 at 02:54, Michael S. Tsirkin wrote:
> > >
> > > On Mon, May 27, 2019 at 12:44:46PM +0200, Greg Kurz wrote:
> > > > On Fri, 24 May 2019 19:56:06 +080
> From: Mateja Marjanovic
> Sent: Monday, March 4, 2019 5:51 PM
> To: qemu-devel@nongnu.org
> Cc: aurel...@aurel32.net; Aleksandar Markovic; Aleksandar Rikalo
> Subject: [PATCH 1/2] target/mips: Improve performance for MSA binary
> operations
>
> From: Mateja Marjanovic
>
> Eliminate loops for
On Sat, 1 Jun 2019 at 10:34, Alex Bennée wrote:
>
>
> Peter Maydell writes:
> > Semihosting is a feature that works on all Arm CPUs
> > regardless of which machine model you're using (or whether
> > you're using softmmu or linux-user), so I think
> > the machine's Kconfig fragment is the wrong pl
Peter Maydell writes:
> On Fri, 31 May 2019 at 17:54, Miroslav Rezanina wrote:
>> What about CONFIG_ARM_VIRT - can we use it to introduce dependency on
>> CONFIG_SEMIHOSTING or is there valid scenario of qemu build with
>> CONFIG_ARM_VIRT
>> enabled and CONFIG_SEMIHOSTING disabled?
>
> Semiho
27 matches
Mail list logo
