On Thu, 18 May 2017 15:19:13 -0300
Eduardo Habkost wrote:
> On Thu, May 18, 2017 at 10:09:29AM +0200, Igor Mammedov wrote:
> > Signed-off-by: Igor Mammedov
> > ---
> > include/sysemu/numa.h | 1 +
> > hw/arm/virt.c | 16 ++--
> > hw/i386/pc.c | 17 +
Mao Zhongyi writes:
> Hi, Markus
>
> On 05/19/2017 03:20 PM, Markus Armbruster wrote:
>> Mao Zhongyi writes:
>>
>>> The rocker device still implements the old PCIDeviceClass .init()
>>> instead of the new .realize(). All devices need to be converted to
>>> .realize().
>>>
>>> .init() reports err
Mao Zhongyi writes:
> Hi, Markus
> Thanks for review and sorry for replying late, I was on the weekend.
No need to apologize for the weekend. I hope you enjoyed it :)
> On 05/19/2017 02:24 PM, Markus Armbruster wrote:
>> Mao Zhongyi writes:
>>
>>> The function of_dpa_world_alloc is a wrapper
On Fri, 2017-05-19 at 11:10 +0530, Bharata B Rao wrote:
> Fix migration of radix guests by ensuring that we issue
> KVM_PPC_CONFIGURE_V3_MMU for radix case post migration.
>
> Reported-by: Nageswara R Sastry
> Signed-off-by: Bharata B Rao
> ---
> hw/ppc/spapr.c | 12
> 1 file chang
Kamil Rytarowski writes:
> Hello,
>
> Excuse me for delay, I missed this mail.
No problem.
> Please see in-line.
>
> On 17.05.2017 09:28, Markus Armbruster wrote:
>> Kamil Rytarowski writes:
>>
>>> ivshmem-server makes use of the POSIX shared memory object interfaces.
>>> This library is prov
On Fr, 2017-05-19 at 19:42 +, anonym wrote:
> Gentle ping! :)
>
> I've lost the Message-IDs of my previous posts on this topic but its about
> this patch submission:
>
> * https://lists.nongnu.org/archive/html/qemu-devel/2017-01/msg03433.html
> * https://lists.nongnu.org/archive/html/qemu-de
On Tue, May 09, 2017 at 03:04:58PM +1000, David Gibson wrote:
> Logic in spapr_populate_pa_features() enables the bit advertising
> Hardware Transactional Memory (HTM) in the guest's device tree only when
> KVM advertises its availability with the KVM_CAP_PPC_HTM feature.
>
> However, this assumes
On Mon, 2017-05-22 at 03:15 +, Ryan Chen wrote:
> In ASPEED SoC chip, all register access have following rule.
> Most of controller write access is only support 32bit access.
> Read is support 8bits/16bits/32bits.
Thanks for clearing that up Ryan.
Phil: I'll rework the model so the reads a
Hi, Markus
On 05/19/2017 03:20 PM, Markus Armbruster wrote:
Mao Zhongyi writes:
The rocker device still implements the old PCIDeviceClass .init()
instead of the new .realize(). All devices need to be converted to
.realize().
.init() reports errors with fprintf() and return 0 on success, nega
On Mon, May 22, 2017 at 12:44:48PM +1000, David Gibson wrote:
> On Fri, May 19, 2017 at 12:06:14PM +0530, Bharata B Rao wrote:
> > On Fri, May 19, 2017 at 11:10:39AM +0530, Bharata B Rao wrote:
> > > Fix migration of radix guests by ensuring that we issue
> > > KVM_PPC_CONFIGURE_V3_MMU for radix ca
Hi, Markus
Thanks for review and sorry for replying late, I was on the weekend.
On 05/19/2017 02:24 PM, Markus Armbruster wrote:
Mao Zhongyi writes:
The function of_dpa_world_alloc is a wrapper around world_alloc(), which
returns null only when g_malloc0(size_t size) does. But g_malloc0() als
On Fri, May 19, 2017 at 03:14:35PM +0200, Laurent Vivier wrote:
> On 19/05/2017 09:33, David Gibson wrote:
> > On Fri, May 19, 2017 at 11:10:36AM +0530, Bharata B Rao wrote:
> >> Introduce a new function unregister_savevm_live() to unregister the vmstate
> >> handlers registered via register_savevm
On Fri, May 19, 2017 at 11:10:37AM +0530, Bharata B Rao wrote:
> HPT gets created by default for TCG guests and later when the guest turns
> out to be a radix guest, the HPT is destroyed when guest does
> H_REGISTER_PROC_TBL hcall. Let HTAB savevm handlers registration and
> unregistration follow t
On Fri, May 19, 2017 at 12:06:14PM +0530, Bharata B Rao wrote:
> On Fri, May 19, 2017 at 11:10:39AM +0530, Bharata B Rao wrote:
> > Fix migration of radix guests by ensuring that we issue
> > KVM_PPC_CONFIGURE_V3_MMU for radix case post migration.
> >
> > Reported-by: Nageswara R Sastry
> > Signe
On Sun, May 21, 2017 at 08:48:42PM +0200, Laurent Vivier wrote:
> On 19/05/2017 07:40, Bharata B Rao wrote:
> > The flags used in h_register_process_table hcall are needed in spapr.c
> > and hence move them to a header file. While doing so, give them
> > slightly specific names.
> >
> > Signed-off
On Fri, May 19, 2017 at 08:19:41AM -0300, Daniel Henrique Barboza wrote:
>
>
> On 05/19/2017 01:26 AM, David Gibson wrote:
> > On Thu, May 18, 2017 at 06:54:12PM -0300, Daniel Henrique Barboza wrote:
> > > The LMB DRC release callback, spapr_lmb_release(), uses an opaque
> > > parameter, a sPAPRD
Hi Anthony:
Thanks for your review.
On 2017年05月19日 19:57, Anthony PERARD wrote:
> On Thu, May 18, 2017 at 01:33:00AM -0400, Lan Tianyu wrote:
>> From: Chao Gao
>>
>> According to VT-d spec Interrupt Remapping and Interrupt Posting ->
>> Interrupt Remapping -> Interrupt Request Formats On
On 2017年05月19日 22:04, Sameeh Jubran wrote:
On Fri, May 19, 2017 at 9:25 AM, Jason Wang wrote:
On 2017年05月17日 19:46, Sameeh Jubran wrote:
The bug was caused by the "receive overrun" (bit #6 of the ICR register)
interrupt
which would be triggered post migration in a heavy traffic environmen
On Fri, May 19, 2017 at 07:55:26PM +0300, Michael S. Tsirkin wrote:
> On Fri, May 19, 2017 at 11:19:49AM +0800, Peter Xu wrote:
> > This patch pre-heat vhost iotlb cache when passthrough mode enabled.
> >
> > Sometimes, even if user specified iommu_platform for vhost devices,
> > IOMMU might still
On Fri, May 19, 2017 at 12:32:27PM +0200, Greg Kurz wrote:
> Commit 5bc8d26de20c ("spapr: allocate the ICPState object from under
> sPAPRCPUCore") moved ICP objects from the machine to CPU cores. This
> is an improvement since we no longer allocate ICP objects that will
> never be used. But it has
On 2017年05月20日 00:55, Michael S. Tsirkin wrote:
On Fri, May 19, 2017 at 11:19:49AM +0800, Peter Xu wrote:
This patch pre-heat vhost iotlb cache when passthrough mode enabled.
Sometimes, even if user specified iommu_platform for vhost devices,
IOMMU might still be disabled. One case is passthr
On 2017年05月19日 23:33, Stefan Hajnoczi wrote:
On Fri, May 19, 2017 at 11:10:33AM +0800, Jason Wang wrote:
On 2017年05月18日 11:03, Wei Wang wrote:
On 05/17/2017 02:22 PM, Jason Wang wrote:
On 2017年05月17日 14:16, Jason Wang wrote:
On 2017年05月16日 15:12, Wei Wang wrote:
Hi:
Care to post the drive
On 2017年05月20日 00:49, Michael S. Tsirkin wrote:
On Fri, May 19, 2017 at 11:10:33AM +0800, Jason Wang wrote:
On 2017年05月18日 11:03, Wei Wang wrote:
On 05/17/2017 02:22 PM, Jason Wang wrote:
On 2017年05月17日 14:16, Jason Wang wrote:
On 2017年05月16日 15:12, Wei Wang wrote:
Hi:
Care to post the
On Fri, May 19, 2017 at 12:32:20PM +0200, Greg Kurz wrote:
> For historical reasons, we compute CPU device-tree ids with a non-trivial
> logic. This patch consolidate the logic in a single helper to be used
> in various places where it is currently open-coded.
>
> It is okay to get rid of DIV_ROUN
On Sun, May 21, 2017 at 07:03:33PM +0200, Greg Kurz wrote:
> On Sat, 20 May 2017 16:45:09 +1000
> David Gibson wrote:
>
> > On Fri, May 19, 2017 at 12:32:12PM +0200, Greg Kurz wrote:
> > > If the user explicitely asked for kernel-irqchip support and "xics-kvm"
> > > initialization fails, we shoul
On Mon, May 22, 2017 at 12:04:13PM +1000, David Gibson wrote:
> On Fri, May 19, 2017 at 12:32:20PM +0200, Greg Kurz wrote:
> > For historical reasons, we compute CPU device-tree ids with a non-trivial
> > logic. This patch consolidate the logic in a single helper to be used
> > in various places wh
Hi Phil,
On Sat, 2017-05-20 at 00:21 -0300, Philippe Mathieu-Daudé wrote:
> Hi Andrew,
>
> On 05/19/2017 09:26 PM, Andrew Jeffery wrote:
> > This model implements enough behaviour to do basic functionality tests
> > such as device initialisation and read out of dummy sample values. The
> > sample
On 19/05/2017 07:40, Bharata B Rao wrote:
> The flags used in h_register_process_table hcall are needed in spapr.c
> and hence move them to a header file. While doing so, give them
> slightly specific names.
>
> Signed-off-by: Bharata B Rao
> Reviewed-by: David Gibson
> ---
> hw/ppc/spapr_hcall
On Sat, 20 May 2017 16:45:09 +1000
David Gibson wrote:
> On Fri, May 19, 2017 at 12:32:12PM +0200, Greg Kurz wrote:
> > If the user explicitely asked for kernel-irqchip support and "xics-kvm"
> > initialization fails, we shouldn't fallback to emulated "xics" as we
> > do now. It is also awkward t
Before QOM-ifying the Exynos4 SoC model, move the DRAM initialization
from exynos4210.c to exynos4_boards.c because DRAM is board specific,
not SoC.
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Philippe Mathieu-Daudé
---
hw/arm/exynos4210.c | 20 +-
hw/arm/exynos4_boa
The static array of interrupt combiner mappings is not modified so it
can be made const for code safeness.
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Philippe Mathieu-Daudé
---
hw/intc/exynos4210_gic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/intc/exynos4210_g
Statements under 'case' were in some places wrongly indented bringing
confusion and making the code less readable. Remove also few unneeded
blank lines. No functional changes.
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Peter Maydell
---
hw/timer/exynos4210_mct.c | 45
Use a define for a9mpcore_priv device type name instead of hard-coded
string.
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Philippe Mathieu-Daudé
---
hw/arm/exynos4210.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
index 034f
Fix checkpatch errors:
1. ERROR: spaces required around that '+' (ctx:VxV)
2. ERROR: spaces required around that '&' (ctx:VxV)
No functional changes.
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Peter Maydell
---
hw/timer/exynos4210_mct.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletio
On all Exynos-based boards, the system powers down itself by driving
PS_HOLD signal low - eight bit in PS_HOLD_CONTROL register of PMU.
Handle writing to respective PMU register to fix power off failure:
reboot: Power down
Unable to poweroff system
shutdown: 31 output lines suppressed
Remove defines not used anywhere.
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Peter Maydell
---
hw/timer/exynos4210_mct.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c
index ea5f99d9a41b..e4ef4cfd3625 100644
--- a/hw/timer/exynos
Hi,
This is a collection of three already sent patchsets [1] [2] [3].
Changes since previous versions (v2):
1. Patch 11/11: set BIT(8) in PS_HOLD to fix power off on Linux v4.12-rc1.
2. Add reviewed-by tags.
The first patch in set is a bugfix which also exposes problem of cpuidle.
Kernel comp
Convert the Exynos4210 SoC code into a QOM model which is a preferred
approach instead of directly initializing SoC-related devices from the
board file.
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Philippe Mathieu-Daudé
---
hw/arm/exynos4210.c | 18 +++---
hw/arm/exynos4
Bring some more readability by declaring local function variables: first
initialized ones and then the rest (with reversed-christmas-tree order).
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Philippe Mathieu-Daudé
---
hw/arm/exynos4210.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions
There are to SysBusDevice variables in exynos4210_gic_realize()
function: one for the device itself and second for arm_gic device. Add
a prefix "gic" to the second one so it will be easier to understand the
code.
While at it, put local uninitialized 'i' variable at the end, next to
other uninitia
Recent Linux kernel (tested next-20170224) was complaining about missing
GIC mask and was unable to bring up secondary CPU:
[ 0.00] NR_IRQS:16 nr_irqs:16 16
[0.00] GIC CPU mask not found - kernel will fail to boot.
...
[ 0.400492] smp: Bringing up secondary CPUs .
Hello
I have understood from code that In Precopy, there is no Priority for
sending dirty pages and qemu sends a page as soon as it is found in a
block(by linear searching in blocks). in other word, qemu does not consider
to pages that dirties more than others until sends them later than other
pag
qemu-img create -f qcow2 1.img 64G
qemu-io -c "write -P 0x32 0 64k" 1.img
results in
324 -rw-r--r-- 1 den den 393216 May 21 16:48 1.img
Subsequent
qemu-io -c "write -z 0 64k" 1.img
qemu-io -c "write -P 0x32 0 64k" 1.img
results in
388 -rw-r--r-- 1 den den 458752 May 21 16:50 1.img
which
Recent QEMU is able to do read-modify-write operations when using 512
byte logical sectors in the VM and 4K logical sectors in the host.
** Changed in: qemu
Status: Expired => Fix Released
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribe
Ping?
On 08/05/2017 16:12, Paolo Bonzini wrote:
> These are a bunch of cleanups and patches extracted from the AioContext
> lock removal series. As a general theme, the patches reorganize
> blockjob.c to follow the blockjob.h/blockjob_int.h separation more
> closely. For this reason, a lot of th
Hello
Is "get_queued_page" function (which is called in line 1383 of ram.c) only
used in postcopy mode and has no usage in precopy mode?
thanks a lot
On Fri, May 19, 2017 at 11:27:49AM -0300, Daniel Henrique Barboza wrote:
> Currenty we do not have any RTAS event that is reported by the
> event-scan interface. The existing events, RTAS_LOG_TYPE_EPOW and
> RTAS_LOG_TYPE_HOTPLUG, are being reported by the check-exception
> interface and, as such,
On Fri, May 19, 2017 at 12:32:04PM +0200, Greg Kurz wrote:
> When a piece of code allocates an object, it implicitely gets a reference
> on it. If it then makes that object a child property of another object, it
> should drop its own reference at some point otherwise the child object can
> never be
On Fri, May 19, 2017 at 12:32:12PM +0200, Greg Kurz wrote:
> If the user explicitely asked for kernel-irqchip support and "xics-kvm"
> initialization fails, we shouldn't fallback to emulated "xics" as we
> do now. It is also awkward to print an error message when we have an
> errp pointer argument.
On Fri, May 19, 2017 at 11:27:50AM -0300, Daniel Henrique Barboza wrote:
> From: Jianjun Duan
>
> In racing situations between hotplug events and migration operation,
> a rtas hotplug event could have not yet be delivered to the source
> guest when migration is started. In this case the pending_e
2017-05-13 1:24 GMT+08:00, James Morse :
> Hi gengdongjiu,
>
> On 05/05/17 14:19, gengdongjiu wrote:
>> On 2017/5/2 23:37, James Morse wrote:
>> > ... I think you expect an SError to arrive at EL2 and have its ESR
>> > recorded in
>> > vcpu->arch.fault.vsesr_el2. Some time later KVM decides to inje
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