Changes v2 -> v3:
* Implemented a "slot set" structure, where multiple slots can be
reported by using integer ranges or lists for possible
values for each property. Added a ValueSet struct, that
can represent a set of values using either a simple list of
values, or integer ranges. (Its JSON
Hi Stefan,
I still have another concern like following.
Has x-data-plane been used (or accepted) widely in systems. I have
this concern since if it hasn't been widely accepted, it may
have/cause some problems we don't know. Do you know some hidden
problems which may caused by QEMU x-data-plane fe
On Tue, Dec 13, 2016 at 10:36:01AM +, Peter Maydell wrote:
> This patchset adds support for the Virtualization extensions to QEMU's
> GICv3 emulation. This was the last missing piece that was stopping
> us from turning on the EL2 support in the CPU model, so the patchset
> also adds support for
Hi,
Your series seems to have some coding style problems. See output below for
more information:
Type: series
Subject: [Qemu-devel] [PULL for-2.9 0/9] virtio, vhost, pc: fixes
Message-id: 1481922841-4324-1-git-send-email-...@redhat.com
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$
From: Prasad J Pandit
IOMMU MMIO registers are divided in two groups by their offsets.
Low offsets(<0x2000) registers are grouped into 'amdvi_mmio_low'
table and higher offsets(>=0x2000) registers are grouped into
'amdvi_mmio_high' table. No of registers in each table is given
by macro 'AMDVI_MMI
From: Marc-André Lureau
Use the libvhost-user library.
This ended up being a rather large patch that cannot be easily splitted,
due to massive code move and API changes.
Signed-off-by: Marc-André Lureau
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
tests/vhost-user-b
From: Marc-André Lureau
Add a library to help implementing vhost-user backend (or slave).
Dealing with vhost-user as an application developer isn't so easy: you
have all the trouble with any protocol: validation, unix ancillary data,
shared memory, eventfd, logging, and on top of that you need t
From: Wei Huang
Because guest mask notifier cannot be used in vhost-user mode, a boolean
flag "use_guest_notifier_mask" was added in commit 5669655aafd to disable
the use of guest mask notifier under virtio-pci. However this flag wasn't
checked in other virtio devices, such as virtio-mmio. In our
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
tests/vhost-user-bridge.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/vhost-user-bridge.c b/tests/vhost-user-bridge.c
index 97e45d8..5b618f6 100644
---
From: Marc-André Lureau
The call fd is not watched
Signed-off-by: Marc-André Lureau
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
tests/vhost-user-bridge.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/tests/vhost-user-bridge.c b/tests/vhost-user-bridge.c
index
PCI Express downstream slot has a single PCI slot
behind it, using PCI_DEVFN(PCI_SLOT(devfn), 0)
does not give you function 0 in cases such as ARI
as well as some error cases.
This is exactly what we are hitting:
$ qemu-system-x86_64 -machine q35 -readconfig docs/q35-chipset.cfg
-monitor stdio
From: Marc-André Lureau
dispatcher_remove() is in use.
Signed-off-by: Marc-André Lureau
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
tests/vhost-user-bridge.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/tests/vhost-user-bridge.c b/tests/vhost-user-bridge.c
i
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
tests/vhost-user-bridge.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/tests/vhost-user-bridge.c b/tests/vhost-user-bridge.c
index 19b0e94..97e45d8 100644
--- a
The following changes since commit 6a928d25b6d8bc3729c3d28326c6db13b9481059:
Update version for v2.8.0-rc4 release (2016-12-15 07:36:03 +)
are available in the git repository at:
git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_upstream
for you to fetch changes up to 2858bc68
On Tue, Dec 13, 2016 at 5:11 AM, Peter Maydell wrote:
> On 8 November 2016 at 00:58, Alistair Francis
> wrote:
>> Add the ARM generic timer. This allows the guest to poll the timer for
>> values and also supports secure writes only.
>>
>> Signed-off-by: Alistair Francis
>> ---
>> V2:
>> - Fix c
Am 15.12.2016 um 07:46 schrieb Alexandre DERUMIER:
> does rollbacking the kernel to previous version fix the problem ?
The culprit is the used tuned agent from Redhat
(https://github.com/redhat-performance/tuned). The used profile
virtual-host results in these problems. Stopping tuned or using an
On Fri, Dec 16, 2016 at 04:12:24PM +, Stefan Hajnoczi wrote:
> On Fri, Dec 16, 2016 at 3:41 PM, Halil Pasic wrote:
> > On 12/16/2016 11:25 AM, Stefan Hajnoczi wrote:
> >> On Thu, Dec 15, 2016 at 04:43:30PM +0100, Halil Pasic wrote:
> >>> Correct recalculation of vring->inuse after migration fo
Le 16/12/2016 à 14:03, Peter Maydell a écrit :
On 15 December 2016 at 05:48, Alastair D'Silva wrote:
From: Alastair D'Silva
The imx25 chip provides 3 i2c buses, but they have all been named
"i2c", which makes it difficult to predict which bus a device will
be connected to when specified on th
* Halil Pasic (pa...@linux.vnet.ibm.com) wrote:
>
>
> On 12/15/2016 02:29 PM, Dr. David Alan Gilbert wrote:
> >> +vmstate_handle_alloc(first_elem, field, opaque);
> >> +if (field->flags & VMS_POINTER) {
> >> +first_elem = *(void **)first_elem;
> >> +
Signed-off-by: Richard Henderson
---
target-hppa/helper.h| 55
target-hppa/op_helper.c | 394 ++
target-hppa/translate.c | 728
3 files changed, 1177 insertions(+)
diff --git a/target-hppa/helper.h b/target-hppa/h
This reverts commit d41f3c3cc7a5fb9de144cc4022da14a9ff010671.
---
configure |5 +
disas.c |2 +
disas/Makefile.objs |1 +
disas/hppa.c | 2832 +
linux-user/syscall_defs.h |4 +-
5 files
This is just about the minimum required to enable compilation
without actually executing any instructions. This contains the
HPPACPU structure and the required callbacks, the gdbstub, the
basic translation loop, and a translate_one function that always
results in an illegal instruction.
Signed-of
Meanwhile it works.
Thomas Huth wrote:
> Triaging old bug tickets ... Can you still reproduce this problem with
> the latest version of QEMU and the latest version of libusb? If so,
> could you please also provide the command line options that you used to
> start QEMU?
>
> ** Changed in: qemu
>
Signed-off-by: Richard Henderson
---
target-hppa/helper.h| 3 +
target-hppa/op_helper.c | 10 +++
target-hppa/translate.c | 206
3 files changed, 219 insertions(+)
diff --git a/target-hppa/helper.h b/target-hppa/helper.h
index 88db719..d51c
For linux, page 0 is mapped as an execute-only gateway. A gateway
page is a special bit in the page table that allows a B,GATE insn
within that page to raise processor permissions. This is how system
calls are implemented for HPPA.
Rather than actually map anything here, or handle permissions at
Signed-off-by: Richard Henderson
---
target-hppa/helper.h| 3 +
target-hppa/op_helper.c | 78 ++
target-hppa/translate.c | 618
3 files changed, 699 insertions(+)
diff --git a/target-hppa/helper.h b/target-hppa/helper.h
index ecff17c..8
Signed-off-by: Richard Henderson
---
target-hppa/translate.c | 309
1 file changed, 309 insertions(+)
diff --git a/target-hppa/translate.c b/target-hppa/translate.c
index 14fe4bb..093a65e 100644
--- a/target-hppa/translate.c
+++ b/target-hppa/tran
The HPPA cpu has a unique form of predicated execution in which
almost any instruction can set the PSW[N] (or "nullify") bit,
which suppresses execution (and even decoding) of the following
instruction. Execution of a nullified insn clears the PSW[N] bit.
This adds a generic framework for branchi
Including support for the atomic memory op syscalls.
Cc: Riku Voipio
Signed-off-by: Richard Henderson
---
linux-user/elfload.c | 24 +++
linux-user/main.c| 172 +++
2 files changed, 196 insertions(+)
diff --git a/linux-user/elfload.c b/l
Signed-off-by: Richard Henderson
---
target-hppa/helper.h| 2 +
target-hppa/op_helper.c | 23 ++
target-hppa/translate.c | 882
3 files changed, 907 insertions(+)
diff --git a/target-hppa/helper.h b/target-hppa/helper.h
index 9c94dac..ecff1
Signed-off-by: Richard Henderson
---
target-hppa/translate.c | 477
1 file changed, 477 insertions(+)
diff --git a/target-hppa/translate.c b/target-hppa/translate.c
index 2ad651c..1d0976f 100644
--- a/target-hppa/translate.c
+++ b/target-hppa/tran
Cc: Riku Voipio
Signed-off-by: Richard Henderson
---
linux-user/hppa/termbits.h | 219 +
1 file changed, 219 insertions(+)
create mode 100644 linux-user/hppa/termbits.h
diff --git a/linux-user/hppa/termbits.h b/linux-user/hppa/termbits.h
new file mod
Cc: Riku Voipio
Signed-off-by: Richard Henderson
---
linux-user/signal.c | 191 +++-
1 file changed, 190 insertions(+), 1 deletion(-)
diff --git a/linux-user/signal.c b/linux-user/signal.c
index c750053..0a5bb4e 100644
--- a/linux-user/signal.c
++
Cc: Riku Voipio
Signed-off-by: Richard Henderson
---
linux-user/hppa/syscall_nr.h | 353 +++
1 file changed, 353 insertions(+)
create mode 100644 linux-user/hppa/syscall_nr.h
diff --git a/linux-user/hppa/syscall_nr.h b/linux-user/hppa/syscall_nr.h
new fi
Like the original MIPS, HPPA has the MSB of an SNaN set.
However, it has different rules for silencing an SNaN:
(1) msb is cleared and (2) msb-1 must be set if the fraction
is now zero, and (implementation defined) may be set always.
I haven't checked real hardware but chose the set always
alternat
Cc: Riku Voipio
Signed-off-by: Richard Henderson
---
linux-user/hppa/target_structs.h | 54
1 file changed, 54 insertions(+)
create mode 100644 linux-user/hppa/target_structs.h
diff --git a/linux-user/hppa/target_structs.h b/linux-user/hppa/target_struc
Split this out into a "cpu/sockbits.h" file now,
like we ought to do for all of the other targets.
Cc: Riku Voipio
Signed-off-by: Richard Henderson
---
linux-user/hppa/sockbits.h | 97 ++
linux-user/socket.h| 2 +
2 files changed, 99 insertio
All of the ones added have an "int" parameter that
needs no more adjustment to pass on to the host.
Cc: Riku Voipio
Signed-off-by: Richard Henderson
---
linux-user/syscall.c | 29 +++--
1 file changed, 27 insertions(+), 2 deletions(-)
diff --git a/linux-user/syscall.c b
The cpu.h structure that these manipulate hasn't been defined
yet, but we haven't enabled compilation yet either.
Cc: Riku Voipio
Signed-off-by: Richard Henderson
---
linux-user/hppa/target_cpu.h| 35 +++
linux-user/hppa/target_signal.h | 29 +
HPPA is a (the) stack-grows-up target, and supporting that requires
rearranging how we compute addresses while laying out the initial
program stack. In addition, hppa32 requires 64-byte stack alignment
so parameterize that as well.
Cc: Riku Voipio
Signed-off-by: Richard Henderson
---
linux-use
Cc: Riku Voipio
Signed-off-by: Richard Henderson
---
linux-user/syscall_defs.h | 131 +-
1 file changed, 130 insertions(+), 1 deletion(-)
diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h
index 957b737..39848a8 100644
--- a/linux-user
From: Helge Deller
Some architectures (ppc, alpha, sparc, parisc, sh and xtensa) define the
BSD TIOCSTART and TIOCSTOP ioctls in their kernel headers to provide
compatibility to other operating systems.
Those ioctls are not implemented in Linux, nevertheless, bash will use
this ioctl if it's ava
With definitions for generic, alpha and mips taken from 4.9-rc2.
Cc: Riku Voipio
Signed-off-by: Richard Henderson
---
linux-user/alpha/target_syscall.h | 2 ++
linux-user/errno_defs.h| 3 +++
linux-user/mips/target_syscall.h | 5 +
linux-user/mips64/target_syscall.h | 5 +
Which is primarily a re-definition of errno numbers.
Cc: Riku Voipio
Signed-off-by: Richard Henderson
---
linux-user/hppa/target_syscall.h | 237 +++
1 file changed, 237 insertions(+)
create mode 100644 linux-user/hppa/target_syscall.h
diff --git a/linux-us
From: Helge Deller
Mirror syscall_defs.h for the element type of struct timeval
and struct timespec, even though that's not 100% accurate for
each guest.
Cc: Riku Voipio
Signed-off-by: Helge Deller
[rth: Changed the MK_ARRAY types as per above; added ioctl.h entries.]
Signed-off-by: Richard He
This is a linux-user only port, emulating a 32-bit only version of a
pa-2.0 cpu. This is good enough to do well with both the gcc and glibc
testsuites. Helge Deller has provided invaluable assistance testing
with a more complete debian chroot.
What's missing:
* Space registers. Since Linux s
On 9 December 2016 at 11:48, Alex Bennée wrote:
> I did a bunch of tweaking to see if I could abstract the hackage for
> record/replay a bit more. With a little bit of light re-factoring of
> the send and recv functions I can move all the specific send/recv
> logic into the main risu.c file and av
On 9 December 2016 at 11:48, Alex Bennée wrote:
> This uses the magic of zlib's gzread/write interface to wrap the
> tracefile in compression. The code changes are tiny. I spent more time
> messing about with the configure/linker stuff to auto-detect bits.
>
> Signed-off-by: Alex Bennée
> ---
>
On 9 December 2016 at 11:48, Alex Bennée wrote:
> This adds a very dumb and easily breakable trace and replay support. In
> --master mode the various risu ops trigger a write of register/memory
> state into a binary file which can be played back to an apprentice.
> Currently there is no validation
On 9 December 2016 at 11:48, Alex Bennée wrote:
("parameterise" in subject)
> This is a precursor to record/playback support. Instead of passing the
> socket fd we now pass helper functions for reading/writing and
> responding. This will allow us to do the rest of the record/playback
> work with
On 9 December 2016 at 11:48, Alex Bennée wrote:
> This also fixes perl-modes confusion about escaped strings.
Missing apostrophe: should be "perl-mode's" :-)
>
> Signed-off-by: Alex Bennée
Applied to risu master with that fixed; thanks.
-- PMM
> ---
> risugen | 2 +-
> 1 file changed, 1 ins
On 9 December 2016 at 11:48, Alex Bennée wrote:
> Signed-off-by: Alex Bennée
> ---
> risu_aarch64.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/risu_aarch64.c b/risu_aarch64.c
> index 7f9f612..8e3539e 100644
> --- a/risu_aarch64.c
> +++ b/risu_aarch64.c
> @@ -97,7 +9
On 9 December 2016 at 11:48, Alex Bennée wrote:
> Sometimes you want absolute control over your test set-up to feed
> explicit values into the test. This started as an experiment but might
> be useful for further developing tests.
>
> Signed-off-by: Alex Bennée
I really don't like this patch, I'
On 9 December 2016 at 11:48, Alex Bennée wrote:
> Before this is could seem a little quite when running as you had no
> indication stuff was happening (or how fast). I only dump on the master
> side as I want to minimise the amount of qemu logs to sift through.
Yeah, more progress info would be g
On 12/14/2016 10:03 PM, Joey Connelly wrote:
> Hey QEMU dev group,
>
> I have a few questions related to nesting QEMU processes, but first here is
> my system setup:
>
>
>
>- *HOST MACHINE:* GNU/Linux release 4.5.5 (KVM version follows), Distro
>Fedora 24, x86_64 arch, supports Intel
(added a couple of people to cc who might have an opinion on the i2c
protocol questions below)
On 29 November 2016 at 19:30, Fabio Urquiza wrote:
> ### Overview ###
>
> The TPM passthrough feature allow a developer to test TPM functionalities,
> like Measure Boot, without the need to tamper with
On 12/16/2016 05:48 PM, Peter Maydell wrote:
> On 29 November 2016 at 17:41, Cédric Le Goater wrote:
>> The Aspeed SoCs AST2400 and AST2500 have two FTGMAC100 ethernet
>> controllers. This serie proposes a model for this device and a way to
>> customize the bit definitions which are slightly diffe
On 29 November 2016 at 17:41, Cédric Le Goater wrote:
> The Aspeed SoCs AST2400 and AST2500 have two FTGMAC100 ethernet
> controllers. This serie proposes a model for this device and a way to
> customize the bit definitions which are slightly different from the
> Faraday definitions.
>
> The last
On 24 November 2016 at 16:08, Lena Djokic wrote:
> This commit adds implementation of fanotify_init and fanotify_mark.
> Second argument for fanotify_init needs conversion because of flags
> which can be FAN_NONBLOCK and FAN_CLOEXEC which rely on O_NONBLOCK
> and O_CLOEXEC and those can have diffe
> On 16 Dec 2016, at 15:52, Wouter Verhelst wrote:
>
> On Thu, Dec 15, 2016 at 05:34:48PM +, Alex Bligh wrote:
>>
>>> On 15 Dec 2016, at 16:49, Wouter Verhelst wrote:
>>>
Because the namespaces and leaf-names are already restricted to
non-whitespace characters. I thought having
On 12/16/2016 05:12 PM, Stefan Hajnoczi wrote:
>> You are not the first one complaining, so the sentence is definitively
>> bad. What disturbs me regarding your formulation is that we do not use
>> uint16_t to represent neither the ring size nor inuse.
>>
>> How about "Since max ring size < UINT1
* Thomas Huth (th...@redhat.com) wrote:
> On 18.11.2016 09:13, Thomas Huth wrote:
> > On 17.11.2016 04:45, David Gibson wrote:
> >> On Mon, Nov 14, 2016 at 07:34:59PM +0100, Juan Quintela wrote:
> >>> Thomas Huth wrote:
> qemu_savevm_state_iterate() expects the iterators to return 1
> wh
On 18.11.2016 09:13, Thomas Huth wrote:
> On 17.11.2016 04:45, David Gibson wrote:
>> On Mon, Nov 14, 2016 at 07:34:59PM +0100, Juan Quintela wrote:
>>> Thomas Huth wrote:
qemu_savevm_state_iterate() expects the iterators to return 1
when they are done, and 0 if there is still something
On Fri, Dec 16, 2016 at 02:27:42PM +0100, marcin.krzemin...@nokia.com wrote:
> From: Marcin Krzeminski
>
> Big flash chips (like mt25qu01g) are consisted from dies.
> Because of that some manufactures remove support for Chip
> Erase giving Die Erase command instead.To avoid unnecessary
> code com
On Fri, Dec 16, 2016 at 02:27:41PM +0100, marcin.krzemin...@nokia.com wrote:
> From: Marcin Krzeminski
>
> Some flash chips has additional page program opcode that
> takes only 4 byte address. This commit adds support
> for such command in Qemu.
>
> Signed-off-by: Marcin Krzeminski
Reviewed-by
On Fri, Dec 16, 2016 at 3:41 PM, Halil Pasic wrote:
> On 12/16/2016 11:25 AM, Stefan Hajnoczi wrote:
>> On Thu, Dec 15, 2016 at 04:43:30PM +0100, Halil Pasic wrote:
>>> Correct recalculation of vring->inuse after migration for
>>> the corner case where the avail_idx has already wrapped
>>> but use
Hi,
Your series seems to have some coding style problems. See output below for
more information:
Type: series
Subject: [Qemu-devel] [PATCH 0/2]block: m25p80: Improve mt25qu01g chip model
Message-id: 1481894862-14102-1-git-send-email-marcin.krzemin...@nokia.com
=== TEST SCRIPT BEGIN ===
#!/bin/ba
On Mon, Dec 05, 2016 at 21:57:45 -0200, Eduardo Habkost wrote:
> On Mon, Dec 05, 2016 at 07:18:47PM +0100, David Hildenbrand wrote:
> > Am 02.12.2016 um 22:18 schrieb Eduardo Habkost:
> > > The query-cpu-model-expand QMP command needs at least one static
> > > model, to allow the "static" expansion
On Thu, Dec 15, 2016 at 05:40:45PM -0800, Dave Hansen wrote:
> On 12/15/2016 05:38 PM, Li, Liang Z wrote:
> >
> > Use 52 bits for 'pfn', 12 bits for 'length', when the 12 bits is not long
> > enough for the 'length'
> > Set the 'length' to a special value to indicate the "actual length in next
>
From: Marcin Krzeminski
This series introduce some improvememnt targeting mt25qu01g.
Marcin Krzeminski (2):
block: m25p80: Add Quad Page Program 4byte version op
block: m25p80: Introduce Die Erase command
hw/block/m25p80.c | 37 +
1 file changed, 33 inse
On 12/15/2016 02:29 PM, Dr. David Alan Gilbert wrote:
>> +vmstate_handle_alloc(first_elem, field, opaque);
>> +if (field->flags & VMS_POINTER) {
>> +first_elem = *(void **)first_elem;
>> +assert(first_elem);
>> +}
>>
On Thu, Dec 15, 2016 at 05:34:48PM +, Alex Bligh wrote:
>
> > On 15 Dec 2016, at 16:49, Wouter Verhelst wrote:
> >
> >> Because the namespaces and leaf-names are already restricted to
> >> non-whitespace characters. I thought having tabs, line feeds,
> >> returns, em-space, en-space etc. was
On 12/16/2016 11:25 AM, Stefan Hajnoczi wrote:
> On Thu, Dec 15, 2016 at 04:43:30PM +0100, Halil Pasic wrote:
>> Correct recalculation of vring->inuse after migration for
>> the corner case where the avail_idx has already wrapped
>> but used_idx not yet.
>>
>> Signed-off-by: Halil Pasic
>> Fixes
On Fri, Dec 16, 2016 at 01:12:21AM +, Li, Liang Z wrote:
> There still exist the case if the MAX_ORDER is configured to a large value,
> e.g. 36 for a system
> with huge amount of memory, then there is only 28 bits left for the pfn,
> which is not enough.
Not related to the balloon but how w
Hi,
We are using dpdk's librte_vhost for the vhost-user backend of Virtio.
If the guest's memory map changes after the virtio device was started, qemu can
send the vhost-user backend a VHOST_USER_SET_MEM_TABLE message.
We observed this case in the following scenarios:
- We have a PCI pa
Hi,
Your series seems to have some coding style problems. See output below for
more information:
Type: series
Subject: [Qemu-devel] [PATCH] smbios: stop ignoring command line options for
TARGET_ARM
Message-id: 20161216152319.12494-1-leif.lindh...@linaro.org
=== TEST SCRIPT BEGIN ===
#!/bin/bash
This may be used for deprecated object properties that are kept for
backwards compatibility.
Signed-off-by: Greg Kurz
---
v3: - input visitor to error out if !siv->string
v2: - input visitor to reject non-empty strings
---
qapi/string-input-visitor.c | 11 +++
qapi/string-output-visi
Commit c30e1565 ("smbios: implement smbios support for mach-virt")
enabled automatic generation of SMBIOS tables for TARGET_ARM, and
actually provides data for the "virt" machine.
However, do_smbios_option() still had an #ifdef TARGET_I386, preventing
any -smbios command line options from being pa
From: Marcin Krzeminski
Some flash chips has additional page program opcode that
takes only 4 byte address. This commit adds support
for such command in Qemu.
Signed-off-by: Marcin Krzeminski
---
hw/block/m25p80.c | 4
1 file changed, 4 insertions(+)
diff --git a/hw/block/m25p80.c b/hw/b
On 24 November 2016 at 16:08, Lena Djokic wrote:
> This commit adds necessary conversion of argument passed to inotify_init1.
> inotify_init1 flags can be IN_NONBLOCK and IN_CLOEXEC which rely on O_NONBLOCK
> and O_CLOEXEC and those can have different values on different platforms.
>
> Signed-off-
On 24 November 2016 at 16:08, Lena Djokic wrote:
> Mips64 uses generic flock structure.
> See /arch/mips/include/uapi/asm/fcntl.h#L63 for reference.
>
> Signed-off-by: Lena Djokic
> ---
> linux-user/syscall_defs.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/linux-use
On 24 November 2016 at 16:08, Lena Djokic wrote:
Making the subject line "linux-user: fix F_GETSIG and F_SETSIG fcntls"
would be a bit more precise about what we're fixing here and I think
that will be helpful for people looking back in the git log later.
> F_GETSIG and F_SETSIG were implemented
On 24 November 2016 at 16:08, Lena Djokic wrote:
> If fourth argument is NULL it should be passed without
> using lock_user function which would, in that case, return
> EFAULT, and system call supports passing NULL as fourth argument.
>
> Signed-off-by: Lena Djokic
> ---
> linux-user/syscall.c |
On 24 November 2016 at 16:08, Lena Djokic wrote:
> Third argument represents lenght not second.
typo: "length"
> If second argument is NULL it should be passed without
> using lock_user function which would, in that case, return
> EFAULT, and system call supports passing NULL as second argument.
On 14.12.2016 16:54, Vladimir Sementsov-Ogievskiy wrote:
> 07.12.2016 23:51, Max Reitz wrote:
>> On 22.11.2016 18:26, Vladimir Sementsov-Ogievskiy wrote:
>>> Auto loading bitmaps are bitmaps in Qcow2, with the AUTO flag set. They
>>> are loaded when the image is opened and become BdrvDirtyBitmaps f
On Fri, Dec 16, 2016 at 4:48 AM, Stefan Hajnoczi wrote:
> On Thu, Dec 15, 2016 at 11:04:23AM -0500, Weiwei Jia wrote:
>> On Thu, Dec 15, 2016 at 3:06 AM, Stefan Hajnoczi wrote:
>> > On Thu, Dec 15, 2016 at 12:17:09AM -0500, Weiwei Jia wrote:
>> >> BTW, do we have an example to show users how to c
[adding qemu-devel, ALL patches should include the main list]
On 12/15/2016 11:47 PM, QingFeng Hao wrote:
> If TEST_DIR is set to /tmp, test case 144 will fail. The reason is that
> TEST_DIR duplicates with 144's test image name tmp.qcow2.
s/duplicates with/resembles/
> when 144 is testing $TEST
On 24 November 2016 at 16:08, Lena Djokic wrote:
> Calculation of 64-bit offset was not correct for all cases.
>
> Signed-off-by: Lena Djokic
> ---
> linux-user/syscall.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/linux-user/syscall.c b/linux-user/syscall.c
> index
On 14.12.2016 13:23, Vladimir Sementsov-Ogievskiy wrote:
> 07.12.2016 21:25, Max Reitz wrote:
>> On 22.11.2016 18:26, Vladimir Sementsov-Ogievskiy wrote:
>>> Add bitmap extension as specified in docs/specs/qcow2.txt.
>>> For now, just mirror extension header into Qcow2 state and check
>>> constrain
On 16 December 2016 at 13:22, wrote:
> From: Marcin Krzeminski
>
> In case of MultiCPU SoC M3 is not always CPU0.
> This commit add cpu_id property to allow set CPU
> number for NVIC model. Also address space that this used
> by NVIC is updated to mach CPU's one.
>
> Signed-off-by: Marcin Krzemi
Laurent Vivier writes:
> On 14/12/2016 20:30, Alvise Rigo wrote:
>> Hi all,
>>
>> I am looking at the possibility to add a new QEMU configuration option
>> to make TCG optional (in qemu-system-*). What I am exploring is a way
>> to exclude any of the TCG code not needed by KVM from the QEMU bina
Hi,
Your series seems to have some coding style problems. See output below for
more information:
Type: series
Subject: [Qemu-devel] [RFC 0/3] MultiCPU changes
Message-id: 1481894559-13974-1-git-send-email-marcin.krzemin...@nokia.com
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(gi
On 7 December 2016 at 17:06, wrote:
> From: Vijaya Kumar K
>
> Add helper API to read MIDR_EL1 registers to fetch
> cpu identification information. This helps in
> adding errata's and architecture specific features.
>
> This is implemented only for arm architecture.
>
> Signed-off-by: Vijaya Kum
From: Marcin Krzeminski
Big flash chips (like mt25qu01g) are consisted from dies.
Because of that some manufactures remove support for Chip
Erase giving Die Erase command instead.To avoid unnecessary
code complication, support for chip erase for mt25qu01g
is not removed.
Signed-off-by: Marcin Kr
From: Marcin Krzeminski
By introduction of CPUAddressSpace table it is not possible
to change address space for CPU from board code. In my case
Cortex-M3 core has it own address space that is created at board
level, then updated by changing cpu->as. For current code cpu->as
is used only at init,
From: Marcin Krzeminski
When Qemu boots directly ARM kernel the memory node in device
tree is automatically updated to mach guest RAM size assigned
to Qemu. This commit allow use case when user do not
want to pass all guest RAM to linux kernel by skipping
device tree mmory node update.
Signed-of
On Fri 16 Dec 2016 02:26:29 PM CET, Max Reitz wrote:
>>> int bdrv_open_backing_file(BlockDriverState *bs, QDict *parent_options,
>>> const char *bdref_key, Error **errp)
>>> {
>>> -char *backing_filename = g_malloc0(PATH_MAX);
>>> +char *backing_filename = NUL
On Fri, Dec 16, 2016 at 11:03:33AM +0100, Paolo Bonzini wrote:
> I'd like to make a few cleanups and add more documentation:
>
Looks good to me.
Reviewed-by: Eduardo Habkost
> diff --git a/hw/i386/kvm/clock.c b/hw/i386/kvm/clock.c
> index eacc9dc..f767ea9 100644
> --- a/hw/i386/kvm/clock.c
> +
From: Marcin Krzeminski
Those are changes that I made to create SoC model with 2xCortexA9
and Cortex-M3. Generally all are done to allow move work further,
not to upstreaming (especially patch 3). I would like to start
discossion if those modification could be upstreamed.
Marcin Krzeminski (3):
From: Marcin Krzeminski
In case of MultiCPU SoC M3 is not always CPU0.
This commit add cpu_id property to allow set CPU
number for NVIC model. Also address space that this used
by NVIC is updated to mach CPU's one.
Signed-off-by: Marcin Krzeminski
---
hw/intc/armv7m_nvic.c | 24 +++
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