On 10/05/2016 01:53 AM, Andrew Jeffery wrote:
> On Tue, 2016-09-27 at 13:57 +0200, Cédric Le Goater wrote:
>> The SMC controller on the Aspeed SoC has a set of registers to
>> configure the mapping of each flash module in the SoC address
>> space. Writing to these registers triggers a remap of the
On 10/05/2016 01:43 AM, David Gibson wrote:
> On Tue, Oct 04, 2016 at 01:36:09PM +0100, Peter Maydell wrote:
>> On 4 October 2016 at 13:17, Cédric Le Goater wrote:
>>> Some test scenarios require to access memory regions using a specific
>>> endianness, such as a device region, but the current qte
On 10/04/2016 06:44 PM, Laurent Vivier wrote:
> From: Cédric Le Goater
>
> Some test scenarios require to access memory regions using a specific
> endianness, such as a device region, but the current qtest memory
> accessors are done in native endian, which means that the values are
> byteswapped
On 10/05/2016 01:26 AM, David Gibson wrote:
> On Tue, Oct 04, 2016 at 02:17:28PM +0200, Cédric Le Goater wrote:
>> Some test scenarios require to access memory regions using a specific
>> endianness, such as a device region, but the current qtest memory
>> accessors are done in native endian, which
On 09/28/2016 10:12 PM, Richard Henderson wrote:
On 09/27/2016 10:45 PM, Rajalakshmi Srinivasaraghavan wrote:
+val = tcg_const_i64(10);\
Rename this "ten" for clarity?
+z = tcg_const_i64(0); \
On 09/28/2016 10:24 PM, Richard Henderson wrote:
On 09/27/2016 10:45 PM, Rajalakshmi Srinivasaraghavan wrote:
+#if defined(HOST_WORDS_BIGENDIAN)
+#define VEXTULX_DO(name, elem) \
+target_ulong glue(helper_, name)(target_ulong a, ppc_avr_t *b) \
+{
On Wed, Sep 28, 2016 at 12:13:32PM +0100, Stefan Hajnoczi wrote:
> On Tue, Sep 27, 2016 at 09:09:49PM -0700, Ashish Mittal wrote:
[...]
> > +/*
> > + * This is called by QEMU when a flush gets triggered from within
> > + * a guest at the block layer, either for IDE or SCSI disks.
> > + */
> > +st
> -Original Message-
> From: Stefan Hajnoczi [mailto:stefa...@redhat.com]
> Sent: Wednesday, October 05, 2016 12:16 AM
> Subject: Re: [Qemu-devel] [PATCH v11 1/2] virtio-crypto: Add virtio crypto
> device specification
>
> On Tue, Oct 04, 2016 at 12:24:02PM +, gong lei wrote:
> > On 2
> -Original Message-
> From: virtio-...@lists.oasis-open.org [mailto:virtio-...@lists.oasis-open.org]
> On Behalf Of Stefan Hajnoczi
> Sent: Tuesday, October 04, 2016 6:13 PM
> Subject: [virtio-dev] Re: [PATCH v4 00/13] virtio-crypto: introduce framework
> and device emulation
>
> On Wed,
> -Original Message-
> From: Stefan Hajnoczi [mailto:stefa...@redhat.com]
> Sent: Tuesday, October 04, 2016 6:09 PM
> Subject: Re: [PATCH v4 08/13] virtio-crypto: add control queue handler
>
> On Wed, Sep 28, 2016 at 04:25:47PM +0800, Gonglei wrote:
> > -static void virtio_crypto_handle_c
> -Original Message-
> From: virtio-...@lists.oasis-open.org [mailto:virtio-...@lists.oasis-open.org]
> On Behalf Of Stefan Hajnoczi
> Sent: Tuesday, October 04, 2016 5:46 PM
> Subject: [virtio-dev] Re: [PATCH v4 07/13] virtio-crypto: set capacity of
> algorithms supported
>
> On Wed, Sep
> From: Stefan Hajnoczi [mailto:stefa...@redhat.com]
> Sent: Tuesday, October 04, 2016 5:38 PM
> Subject: Re: [PATCH v4 05/13] virtio-crypto: add virtio crypto device
> emulation
>
> On Wed, Sep 28, 2016 at 04:25:44PM +0800, Gonglei wrote:
> > Introduce the virtio crypto realization, I'll
> > fin
> -Original Message-
> From: Stefan Hajnoczi [mailto:stefa...@redhat.com]
> Sent: Tuesday, October 04, 2016 12:32 AM
> Subject: Re: [PATCH v4 04/13] cryptodev: introduce a new cryptodev backend
>
> On Wed, Sep 28, 2016 at 04:25:43PM +0800, Gonglei wrote:
> > +/* Max number of symetrical s
> -Original Message-
> From: virtio-...@lists.oasis-open.org [mailto:virtio-...@lists.oasis-open.org]
> On Behalf Of Stefan Hajnoczi
> Sent: Tuesday, October 04, 2016 12:14 AM
> Subject: [virtio-dev] Re: [PATCH v4 02/13] cryptodev: add symmetric algorithm
> operation stuff
>
> On Wed, Sep
> -Original Message-
> From: Stefan Hajnoczi [mailto:stefa...@redhat.com]
> Sent: Tuesday, October 04, 2016 12:11 AM
> Subject: Re: [PATCH v4 01/13] cryptodev: introduce cryptodev backend
> interface
>
> On Wed, Sep 28, 2016 at 04:25:40PM +0800, Gonglei wrote:
> > diff --git a/backends/cr
On Tue, Oct 04, 2016 at 08:58:35AM +0200, Greg Kurz wrote:
> On Tue, 4 Oct 2016 11:24:54 +1100
> David Gibson wrote:
>
> > On Mon, Oct 03, 2016 at 04:03:14PM +0200, Greg Kurz wrote:
> > > On Mon, 3 Oct 2016 13:23:27 +0200
> > > Cédric Le Goater wrote:
> > >
> > > > On 09/29/2016 07:27 AM, Dav
On Tue, Oct 04, 2016 at 09:36:30AM +0200, Greg Kurz wrote:
> On Tue, 4 Oct 2016 08:58:35 +0200
> Greg Kurz wrote:
>
> > On Tue, 4 Oct 2016 11:24:54 +1100
> > David Gibson wrote:
> >
> > > On Mon, Oct 03, 2016 at 04:03:14PM +0200, Greg Kurz wrote:
> > > > On Mon, 3 Oct 2016 13:23:27 +0200
> >
On Tue, Oct 04, 2016 at 07:16:49PM +0200, Paolo Bonzini wrote:
>
>
> On 04/10/2016 16:18, Thomas Huth wrote:
> >>> >> Using only tcg has also some disadvantages: For some tests, it's
> >>> >> interesting to know whether they also work properly with KVM (e.g.
> >>> >> migration tests), and only us
On Tue, Oct 04, 2016 at 02:17:28PM +0200, Cédric Le Goater wrote:
> Some test scenarios require to access memory regions using a specific
> endianness, such as a device region, but the current qtest memory
> accessors are done in native endian, which means that the values are
> byteswapped in qtest
On Tue, Oct 04, 2016 at 02:55:44PM +0200, Thomas Huth wrote:
> A couple of distributors are compiling their distributions
> with "-mcpu=power8" for ppc64le these days, so the user sooner
> or later runs into a crash there when not explicitely specifying
> the "-cpu POWER8" option to QEMU. Due to th
On Tue, Oct 04, 2016 at 01:36:09PM +0100, Peter Maydell wrote:
> On 4 October 2016 at 13:17, Cédric Le Goater wrote:
> > Some test scenarios require to access memory regions using a specific
> > endianness, such as a device region, but the current qtest memory
> > accessors are done in native endi
On Tue, Oct 04, 2016 at 04:25:15PM -0300, Eduardo Habkost wrote:
> Instead of requiring clients to actually call the query-cpu-*
> commands to find out if they are implemented, remove them from
> the output of "query-commands", so clients know they are not
> available.
>
> This is implemented by a
On Tue, Oct 04, 2016 at 03:57:10PM -0500, Eric Blake wrote:
> On 10/04/2016 01:22 PM, Eduardo Habkost wrote:
> > On Mon, Oct 03, 2016 at 03:15:39PM -0500, Eric Blake wrote:
> > [...]
> >>> 3.2) Removing the unimplemented command from query-commands only
> >>>(by calling qmp_disable_command()),
On Fri, Sep 16, 2016 at 10:46:57 -0700, Richard Henderson wrote:
> Emulating LL/SC with cmpxchg is not correct, since it can
> suffer from the ABA problem. However, portable parallel
> code is writting assuming only cmpxchg which means that in
> practice this is a viable alternative.
s/writting/w
On Fri, Sep 16, 2016 at 10:46:56 -0700, Richard Henderson wrote:
(snip)
> - QEMU does not currently properly distinguish between code/data when
> - looking up addresses. To avoid having to address this issue, our
> - emulated PALcode will cheat and use the KSEG mapping for its code+data
> -
On Mon, Oct 03, 2016 at 20:42:43 +0100, Alex Bennée wrote:
>
> Richard Henderson writes:
>
> > Add all of cmpxchg, op_fetch, fetch_op, and xchg.
> > Handle both endian-ness, and sizes up to 8.
> > Handle expanding non-atomically, when emulating in serial.
> >
> > Signed-off-by: Richard Henderson
On Tue, 2016-09-27 at 13:57 +0200, Cédric Le Goater wrote:
> The SMC controller on the Aspeed SoC has a set of registers to
> configure the mapping of each flash module in the SoC address
> space. Writing to these registers triggers a remap of the memory
> region and the spec requires a certain num
On Tue, 2016-09-27 at 13:57 +0200, Cédric Le Goater wrote:
> The SMC controller on the Aspeed SoC has a set of registers to
> configure the mapping of each flash module in the SoC address
> space. These mapping windows are configurable even though no SPI slave
> is attached to the controller.
>
>
On Tue, 2016-09-27 at 13:57 +0200, Cédric Le Goater wrote:
> The SMC controllers on the Aspeed AST2500 SoC are very similar to the
> ones found on the AST2400. The differences are on the number of
> supported flash modules and their default mappings in the SoC address
> space.
>
> The Aspeed AST25
On Tue, 2016-09-27 at 13:57 +0200, Cédric Le Goater wrote:
> The AST2500 SoC has two. Let's prepare ground for the next changes
> which will add the required definitions for the second host SPI
> controller.
>
> Signed-off-by: Cédric Le Goater
Reviewed-by: Andrew Jeffery
> ---
> hw/arm/aspeed
On Tue, 2016-09-27 at 13:57 +0200, Cédric Le Goater wrote:
> This will ease the definition of the new controllers for the AST2500
> SoC and also ease the support of the segment registers, which provide
> a way to reconfigure the mapping window of each slave.
>
> Signed-off-by: Cédric Le Goater
R
On Tue, 2016-09-27 at 13:57 +0200, Cédric Le Goater wrote:
> The Aspeed SoC has three different types of SMC (Static Memory
> Controller) controllers: the SMC (legacy), the FMC (the new one) and
> the SPI for the host PNOR. The FMC and the SPI models are now
> converging on the AST2500 SoC and the
From: Fam Zheng
Upon each bit toggle, the corresponding bit in the meta bitmap will be
set.
Signed-off-by: Fam Zheng
[Amended text inline. --js]
Reviewed-by: Max Reitz
Signed-off-by: John Snow
---
include/qemu/hbitmap.h | 21 +++
util/hbitmap.c | 69 +
From: Vladimir Sementsov-Ogievskiy
Several functions to provide necessary access to BdrvDirtyBitmap for
block-migration.c
Signed-off-by: Vladimir Sementsov-Ogievskiy
[Add the "finish" parameters. - Fam]
Signed-off-by: Fam Zheng
Reviewed-by: John Snow
Reviewed-by: Max Reitz
Signed-off-by: Jo
From: Fam Zheng
Signed-off-by: Fam Zheng
[Fixed minor constant issue. --js]
Signed-off-by: John Snow
Signed-off-by: John Snow
---
tests/test-hbitmap.c | 155 +++
1 file changed, 155 insertions(+)
diff --git a/tests/test-hbitmap.c b/tests/test-
Key:
[] : patches are identical
[] : number of functional differences between upstream/downstream patch
[down] : patch is downstream-only
The flags [FC] indicate (F)unctional and (C)ontextual differences, respectively
001/10:[] [--] 'block: Hide HBitmap in block dirty bitmap interface'
From: Fam Zheng
Callers can create an iterator of meta bitmap with
bdrv_dirty_meta_iter_new(), then use the bdrv_dirty_iter_* operations on
it. Meta iterators are also counted by bitmap->active_iterators.
Also add a couple of functions to retrieve granularity and count.
Signed-off-by: Fam Zheng
From: Vladimir Sementsov-Ogievskiy
Functions to serialize / deserialize(restore) HBitmap. HBitmap should be
saved to linear sequence of bits independently of endianness and bitmap
array element (unsigned long) size. Therefore Little Endian is chosen.
These functions are appropriate for dirty bit
From: Fam Zheng
For dirty bitmap users to get the size and the name of a
BdrvDirtyBitmap.
Signed-off-by: Fam Zheng
Reviewed-by: John Snow
Reviewed-by: Max Reitz
Signed-off-by: John Snow
---
block/dirty-bitmap.c | 10 ++
include/block/dirty-bitmap.h | 2 ++
2 files changed,
From: Fam Zheng
Signed-off-by: Fam Zheng
Reviewed-by: John Snow
Reviewed-by: Max Reitz
Signed-off-by: John Snow
---
tests/test-hbitmap.c | 116 +++
1 file changed, 116 insertions(+)
diff --git a/tests/test-hbitmap.c b/tests/test-hbitmap.c
inde
From: Fam Zheng
The added group of operations enables tracking of the changed bits in
the dirty bitmap.
Signed-off-by: Fam Zheng
Reviewed-by: Max Reitz
Signed-off-by: John Snow
---
block/dirty-bitmap.c | 52
include/block/dirty-bitmap.h |
From: Fam Zheng
We use a loop over bs->dirty_bitmaps to make sure the caller is
only releasing a bitmap owned by bs. Let's also assert that in this case
the caller is releasing a bitmap that does exist.
Signed-off-by: Fam Zheng
Reviewed-by: Max Reitz
Signed-off-by: John Snow
---
block/dirty-
From: Fam Zheng
HBitmap is an implementation detail of block dirty bitmap that should be hidden
from users. Introduce a BdrvDirtyBitmapIter to encapsulate the underlying
HBitmapIter.
A small difference in the interface is, before, an HBitmapIter is initialized
in place, now the new BdrvDirtyBitm
On Thu, Sep 15, 2016 at 5:36 PM, Michael S. Tsirkin wrote:
> On Thu, Sep 15, 2016 at 05:23:28PM -0700, Ed Swierk wrote:
>> I'm wondering what it will take to finish up work on vmgenid.
>>
>> https://lists.gnu.org/archive/html/qemu-devel/2016-01/msg05599.html
>
> We have ACPI_BUILD_TPMLOG_FILE in t
On 10/04/2016 04:38 PM, Wei Huang wrote:
> This patchset adds a pmu=[on/off] option to enable/disable vPMU support
> for guest VM. There are several reasons to justify this option. First,
> vPMU can be problematic for cross-migration between different SoC as perf
> counters are architecture-depend
Hi,
Your series failed automatic build test. Please find the testing commands and
their output below. If you have docker installed, you can probably reproduce it
locally.
Type: series
Message-id: 1475605184-29375-1-git-send-email-eswi...@skyportsystems.com
Subject: [Qemu-devel] [PATCH v2] qcow2:
This patch adds a pmu=[on/off] option to enable/disable vPMU support
in guest vCPU. This option is only available for cortex-a57/cortex-53/
host under both TCG and KVM modes, but unavailable on ARMv7 and other
processors. It allows virt tools, such as libvirt, to determine the
exsitence of vPMU and
This patchset adds a pmu=[on/off] option to enable/disable vPMU support
for guest VM. There are several reasons to justify this option. First,
vPMU can be problematic for cross-migration between different SoC as perf
counters are architecture-dependent. It is more flexible to have an option
to tur
CPU vPMU is now turned off by default, but it was ON in virt-2.7
machine type. To solve this problem, this patch adds a PMU option
in machine state, which is used to control CPU's vPMU status. This
PMU option is not exposed to command line and is turned on in
virt-2.7 machine type to make sure it i
Hi all,
Ping!
https://patchwork.kernel.org/patch/9319729/
Best regards,
Jim
-Original Message-
From: Nutaro, James J.
Sent: Tuesday, September 20, 2016 11:23 AM
To: Greg Kurz
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v3] qqq: module for synchronizing with a
simulatio
Hello, Peter
I truly appreciate your review. The reason for this patch is LTP only, as far
as I know. I will address all your other concerns in the next version of the
patch.
Thanks,
Aleksandar
From: Peter Maydell [peter.mayd...@linaro.org]
Sent: Tuesda
Hi, Peter,
The file in question is arch/mips/kernel/scall32-o32.S. I'll correct this in
next version. Thank for the reviewing this patch. I am going to answer your
second question tomorrow. The quick answer is actually yes, but there are
caveats, that I will explain tomorrow.
Respectfully,
Ale
On 10/04/2016 01:22 PM, Eduardo Habkost wrote:
> On Mon, Oct 03, 2016 at 03:15:39PM -0500, Eric Blake wrote:
> [...]
>>> 3.2) Removing the unimplemented command from query-commands only
>>>(by calling qmp_disable_command()), but keeping it on the QAPI
>>>schema. I am not sure it's OK to do
On Tue, Oct 04, 2016 at 11:41:42PM +0530, rutu.shah...@gmail.com wrote:
> From: Rutuja Shah
>
> Hi,
> This patch allocates memory for txbuf in struct Stream rather than the stack.
> As a result, the stack frame size is reduced of stream_process_mem2s().
Hi Rutuja,
A nit-pick:
The commit message
On 10/04/2016 02:09 PM, Daniel P. Berrange wrote:
> On Tue, Oct 04, 2016 at 02:03:01PM +0300, Denis V. Lunev wrote:
>> From: Denis Plotnikov
>>
>> The NBD server socket was created by qemu-nbd code. This could lead to the
>> race issue when the management layer started qemu-nbd server and allowed
Hi,
Your series failed automatic build test. Please find the testing commands and
their output below. If you have docker installed, you can probably reproduce it
locally.
Type: series
Message-id: 1475604703-3381-1-git-send-email-rutu.shah...@gmail.com
Subject: [Qemu-devel] [PATCHv2] Reducing stac
On 4 October 2016 at 11:05, Aleksandar Markovic
wrote:
> From: Aleksandar Markovic
>
> By looking at the file arch/mips/kernel/sys.S in Linux kernel,
There doesn't appear to be a file by that name:
http://lxr.free-electrons.com/source/arch/mips/kernel/
> it can be deduced that, for Mips32 platf
On 4 October 2016 at 11:05, Aleksandar Markovic
wrote:
> From: Aleksandar Markovic
>
> This patch implements Qemu user mode sysfs() syscall support.
>
> Syscall sysfs() involves returning information about the filesystem types
> currently present in the kernel, and can operate in three distinct f
On 10/04/2016 08:38 AM, Daniel P. Berrange wrote:
> The test-io-channel-tls test was missing a call to qcrypto_init
> and test-crypto-hash was initializing it multiple times,
>
> Signed-off-by: Daniel P. Berrange
> ---
> tests/test-crypto-hash.c| 12 ++--
> tests/test-io-channel-tls.
On 10/04/2016 08:35 AM, Daniel P. Berrange wrote:
> If the ftrace backend is compiled into QEMU, any attempt
> to start QEMU while non-root will fail due to the
> inability to open /sys/kernel/debug/tracing/tracing_on.
>
> Add a fallback into the code so that it connects up the
> trace_marker_fd v
On 10/04/2016 03:49 AM, Paolo Bonzini wrote:
> Register the notifier using the specific API for block devices.
>
> Signed-off-by: Paolo Bonzini
> ---
> block/write-threshold.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
Reviewed-by: Eric Blake
>
> diff --git a/block/write-thres
Signed-off-by: Ed Maste
---
bsd-user/main.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/bsd-user/main.c b/bsd-user/main.c
index d803d3e..d8367bd 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -695,6 +695,16 @@ static void usage(void)
THREAD CPUState *thread_cpu;
+b
On Tue, Oct 04, 2016 at 02:48:41PM -0500, Eric Blake wrote:
> On 10/04/2016 12:22 PM, Jeff Cody wrote:
> > Commit 5c678ee8d9406b9baeec788530965483575db555 changed the qmp
> > dispatch and validation code, and the error output that test
> > 085 relied on changed. Update it to be correct.
> >
> > S
On 10/04/2016 11:27 AM, Peter Maydell wrote:
> The quiet-command make rule currently takes two arguments:
> the command and arguments to run, and a string to print if
> the V flag is not set (ie we are not being verbose).
> By convention, the string printed is of the form
> " NAME some args". Un
On 10/04/2016 12:22 PM, Jeff Cody wrote:
> Commit 5c678ee8d9406b9baeec788530965483575db555 changed the qmp
> dispatch and validation code, and the error output that test
> 085 relied on changed. Update it to be correct.
>
> Signed-off-by: Jeff Cody
> ---
> tests/qemu-iotests/085.out | 2 +-
> 1
Instead of requiring clients to actually call the query-cpu-*
commands to find out if they are implemented, remove them from
the output of "query-commands", so clients know they are not
available.
This is implemented by adding a new arch-specific hook:
arch_init_qmp_commands(), that can enable the
On 10/04/16 20:08, Laine Stump wrote:
> On 10/04/2016 12:43 PM, Laszlo Ersek wrote:
>> On 10/04/16 18:10, Laine Stump wrote:
>>> On 10/04/2016 11:40 AM, Laszlo Ersek wrote:
On 10/04/16 16:59, Daniel P. Berrange wrote:
> On Mon, Sep 05, 2016 at 06:24:48PM +0200, Laszlo Ersek wrote:
All
On Tue, 4 Oct 2016 14:08:45 -0400
Laine Stump wrote:
> On 10/04/2016 12:43 PM, Laszlo Ersek wrote:
> > On 10/04/16 18:10, Laine Stump wrote:
> >> On 10/04/2016 11:40 AM, Laszlo Ersek wrote:
> >>> On 10/04/16 16:59, Daniel P. Berrange wrote:
> On Mon, Sep 05, 2016 at 06:24:48PM +0200, L
On 10/03/2016 08:57 PM, Jeff Cody wrote:
On Fri, Sep 30, 2016 at 06:00:41PM -0400, John Snow wrote:
BlockJobs will begin hiding their state in preparation for some
refactorings anyway, so let's internalize the user_pause mechanism
instead of leaving it to callers to correctly manage.
Signed-o
On Mon, Oct 03, 2016 at 03:15:39PM -0500, Eric Blake wrote:
[...]
> > 3.2) Removing the unimplemented command from query-commands only
> >(by calling qmp_disable_command()), but keeping it on the QAPI
> >schema. I am not sure it's OK to do that. If it is, this
> >sounds like the simples
The optimal size of the qcow2 L2 cache depends on the working set size
and the cluster size of the virtual disk. If the cache is too small,
L2 tables are re-read from disk on every IO operation in the worst
case. The host's buffer cache can paper over this inefficiency, but
with cache=none or cache
From: Rutuja Shah
Hi,
This patch allocates memory for txbuf in struct Stream rather than the stack.
As a result, the stack frame size is reduced of stream_process_mem2s().
Signed-off-by: Rutuja Shah
---
hw/dma/xilinx_axidma.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff -
From: Aleksandar Markovic
By looking at the file arch/mips/kernel/sys.S in Linux kernel,
it can be deduced that, for Mips32 platform, syscall
corresponding to number _NR_fadvise64 translates to kernel
function sys_fadvise64_64, and that argument layout is as
follows:
0 32 0
From: Aleksandar Markovic
Update linux-user/mips/termbits.h with ioctl definitnions from kernel
file arch/mips/include/uapi/asm/ioctls.h.
Signed-off-by: Aleksandar Markovic
---
linux-user/mips/termbits.h | 12
1 file changed, 12 insertions(+)
diff --git a/linux-user/mips/termbits
On 10/04/2016 12:43 PM, Laszlo Ersek wrote:
On 10/04/16 18:10, Laine Stump wrote:
On 10/04/2016 11:40 AM, Laszlo Ersek wrote:
On 10/04/16 16:59, Daniel P. Berrange wrote:
On Mon, Sep 05, 2016 at 06:24:48PM +0200, Laszlo Ersek wrote:
All valid *high-level* topology goals should be permitted /
From: Aleksandar Markovic
linux-user/mips64/termbits.h and linux-user/mips/termbits.h
originate from the same files in Linux kernel. There is no plan
to separate original headers in Linux kernel into Mips32 and Mips64
versions any time soon. Therefore, it is better not to have separate
files in Q
From: Aleksandar Markovic
This patch implements Qemu user mode sysfs() syscall support.
Syscall sysfs() involves returning information about the filesystem types
currently present in the kernel, and can operate in three distinct flavors,
depending on its first argument.
Its specific is that its
From: Aleksandar Markovic
This is just a set of several Qemu Linux user patches that for various
reasons did not make their way to Qemu upstream, but they are all valid
and important in certain use case scenarios for Qemu Linux user mode.
Aleksandar Markovic (4):
linux-user: Add support for sy
On 10/04/2016 12:10 PM, Laine Stump wrote:
On 10/04/2016 11:40 AM, Laszlo Ersek wrote:
Small correction to your wording though: you don't want to attach the
DMI-PCI bridge to the PXB device, but to the extra root bus provided by
the PXB.
This made me realize something - the root bus on a pxb
/dagrh/qemu.git tags/pull-hmp-20161004
for you to fetch changes up to 456d97d364e34adc4e68cbd51c2ad6ecd548492d:
hmp: fix qemu crash due to ioapic state dump w/ split irqchip (2016-10-04
17:16:15 +0100)
HMP pull
Just Wanpeng&#x
From: Wanpeng Li
The qemu will crash when info ioapic through hmp if irqchip
is split. Below message is splat:
KVM_GET_IRQCHIP failed: Unknown error -6
This patch fix it by dumping the ioapic state from the qemu
emulated ioapic if irqchip is split.
Cc: Paolo Bonzini
Cc: Richard Henderson
Cc:
On 03.10.2016 20:46, Eric Blake wrote:
> On 09/28/2016 03:55 PM, Max Reitz wrote:
>> Right now, we have four possible options that conflict with specifying
>> an NBD filename, and a future patch will add another one ("address").
>> This future option is a nested QDict that is flattened at this poin
Commit 5c678ee8d9406b9baeec788530965483575db555 changed the qmp
dispatch and validation code, and the error output that test
085 relied on changed. Update it to be correct.
Signed-off-by: Jeff Cody
---
tests/qemu-iotests/085.out | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Tue, Oct 04, 2016 at 06:53:20PM +0530, Rutuja Shah wrote:
> Hi,
> Allocating txbuf in struct Stream seems to be good. I can see other
> pointers of struct Stream being allocated in xilinx_axidma_realize(),
> but I am not able to find their deallocation point anywhere?
Hi,
Actually, since the a
On 04/10/2016 16:18, Thomas Huth wrote:
>>> >> Using only tcg has also some disadvantages: For some tests, it's
>>> >> interesting to know whether they also work properly with KVM (e.g.
>>> >> migration tests), and only using tcg by default slows down the "make
>>> >> check" quite a bit - which m
On 04/10/2016 14:36, Peter Maydell wrote:
> > - first, convert the value to the required endianness in libqtest and
> > then use the memread/write routines so that qtest accesses the guest
> > memory without doing any supplementary byteswapping
> >
> > - an alternative method would be to hand
On 4 October 2016 at 18:02, Laurent Vivier wrote:
>
>
> Le 04/10/2016 à 15:13, Peter Maydell a écrit :
>> In commit 40df8c0c0722 support was added for target-specific
>
> I don't have commit 40df8c0c0722, I have
> ee8e76141b4dd00f8e97fda274876a17f9a46bbe.
>
> Is this something wrong with my repo?
Le 04/10/2016 à 15:13, Peter Maydell a écrit :
> In commit 40df8c0c0722 support was added for target-specific
I don't have commit 40df8c0c0722, I have
ee8e76141b4dd00f8e97fda274876a17f9a46bbe.
Is this something wrong with my repo?
Laurent
On Mon, Oct 3, 2016 at 1:25 PM, Seth K wrote:
> I have made a bare metal "Hello World" program for the Netduino2. I have
> pushed it here:
>
> https://github.com/skintigh/baremetal_netduino2
>
> It should output "Test 1/4" to USART 1, "Test 2/4" to USART 2, "Test 3/4"
> to USART 3 and "Test 4/4" t
Signed-off-by: Laurent Vivier
Reviewed-by: Greg Kurz
Reviewed-by: David Gibson
---
tests/e1000e-test.c | 2 +-
tests/i440fx-test.c | 2 +-
tests/ide-test.c| 2 +-
tests/ivshmem-test.c| 2 +-
tests/libqos/ahci.c | 2 +-
tests/libqos/libqos-pc.c
Signed-off-by: Laurent Vivier
---
tests/Makefile.include| 8 +++-
tests/usb-hcd-uhci-test.c | 27 +++
2 files changed, 26 insertions(+), 9 deletions(-)
diff --git a/tests/Makefile.include b/tests/Makefile.include
index 8b1c171..c46a32d 100644
--- a/tests/Makefile
On 10/04/2016 07:03 PM, John Snow wrote:
>
>
> On 10/04/2016 12:02 PM, Stefan Hajnoczi wrote:
>> On Tue, Oct 04, 2016 at 01:55:30PM +0200, Kevin Wolf wrote:
>>> Am 04.10.2016 um 12:41 hat Denis V. Lunev geschrieben:
On 10/04/2016 12:34 PM, Kevin Wolf wrote:
> Am 04.10.2016 um 11:23 hat Ste
Machine specific shutdown function can be registered by
the machine specific qtest_XXX_boot() if needed.
So we will not have to test twice the architecture (on boot and on
shutdown) if the test can be run on several architectures.
Signed-off-by: Laurent Vivier
Reviewed-by: Greg Kurz
Reviewed-by
Signed-off-by: Laurent Vivier
---
tests/Makefile.include | 1 +
tests/libqos/pci-pc.c| 22
tests/libqos/pci-spapr.c | 282 +++
tests/libqos/pci-spapr.h | 17 +++
tests/libqos/pci.c | 22 +++-
tests/libqos/rtas.c | 45
From: Cédric Le Goater
Some test scenarios require to access memory regions using a specific
endianness, such as a device region, but the current qtest memory
accessors are done in native endian, which means that the values are
byteswapped in qtest if the endianness of the guest and the host are
This series enables USB tests on PPC64, and for
that implements libqos SPAPR PCI support.
v5:
- Add Cédric's patch providing read/write accessors
with a specific endianness, and use it
- don't duplicate usb-hcd-uhci-test machine parameters
and exit gracefully for an unsupported machine
v4:
-
On 10/04/16 18:10, Laine Stump wrote:
> On 10/04/2016 11:40 AM, Laszlo Ersek wrote:
>> On 10/04/16 16:59, Daniel P. Berrange wrote:
>>> On Mon, Sep 05, 2016 at 06:24:48PM +0200, Laszlo Ersek wrote:
On 09/01/16 15:22, Marcel Apfelbaum wrote:
> +2.3 PCI only hierarchy
> +
On Tue, Oct 04, 2016 at 04:21:03PM +0100, Dr. David Alan Gilbert wrote:
> * Daniel P. Berrange (berra...@redhat.com) wrote:
> > The test-io-channel-tls test was missing a call to qcrypto_init
> > and test-crypto-hash was initializing it multiple times,
> >
> > Signed-off-by: Daniel P. Berrange
>
Hi,
Your series failed automatic build test. Please find the testing commands and
their output below. If you have docker installed, you can probably reproduce it
locally.
Type: series
Message-id: 1475594630-24758-1-git-send-email-arm...@redhat.com
Subject: [Qemu-devel] [PATCH 2.5/3] tests/test-qm
Add a list of known restrictions and future work that will fix these
restrictions.
Signed-off-by: Alistair Francis
---
V2:
- Extend header --- lines
docs/generic-loader.txt | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/docs/generic-loader.txt b/docs/generic
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