David Gibson writes:
> [ Unknown signature status ]
> On Mon, Sep 12, 2016 at 12:11:40PM +0530, Nikunj A Dadhania wrote:
>> From: Ravi Bangoria
>>
>> darn: Deliver A Random Number
>>
>> Currently return invalid random number for all the case. This needs
>> proper algorithm to provide cryptogra
2016-09-15 14:27 GMT+08:00 Paolo Bonzini :
[...]
>> +#define TYPE_APIC "apic"
>> +#define APIC(obj) \
>> +OBJECT_CHECK(APICCommonState, (obj), TYPE_APIC)
>
> This should be in apic.c. Also please replace the other occurrence of
> "apic" in apic.c by TYPE_APIC.
Will do, thanks for your review.
On Thu, Sep 15, 2016 at 04:22:31PM +1000, Benjamin Herrenschmidt wrote:
> On Thu, 2016-09-15 at 16:16 +1000, David Gibson wrote:
> > Oh, I see. Hmm. I don't know if that will make a real difference in
> > TCG or not.
>
> It will on 32-bit hosts.
Hm, yes, I guess it will. Ok, leave it has u32.
On 15/09/2016 02:43, Wanpeng Li wrote:
> From: Wanpeng Li
>
> Introduce a new APIC macro to replace APIC_COMMON macro in
> hw/intc/apic.c in order to capture access LAPIC in qemu
> even if LAPIC is emulated in kvm.
>
> Suggested-by: Paolo Bonzini
> Cc: Paolo Bonzini
> Cc: Radim Krčmář
> C
On Thu, Sep 15, 2016 at 11:32:39AM +0530, Nikunj A Dadhania wrote:
> David Gibson writes:
> > [ Unknown signature status ]
> > On Wed, Sep 14, 2016 at 11:24:01AM +0530, Nikunj A Dadhania wrote:
> >> We flush the qemu TLB lazily. check_tlb_flush is called whenever we hit
> >> a context synchronizin
Interrupt mask for legacy OTHER causes should
not apply to MSI-X OTHER cause.
Signed-off-by: Dmitry Fleytman
---
hw/net/e1000e_core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/net/e1000e_core.c b/hw/net/e1000e_core.c
index c38ed10..e70e669 100644
--- a/hw/net/e1000e_
This patch fixes 2 issues:
1. Bits set in EIAC register should be cleared
from IMS when EIAM is not used.
2. Only bit that corresonds to the interrupt being
raised should be cleared.
See spec. 10.2.4.7 Interrupt Auto Clear
Signed-off-by: Dmitry Fleytman
---
hw/net/e1000e_core.c | 14
On Thu, 2016-09-15 at 16:16 +1000, David Gibson wrote:
> Oh, I see. Hmm. I don't know if that will make a real difference in
> TCG or not.
It will on 32-bit hosts.
Cheers,
Ben.
Do not raise ACK interrupts when
RFCTL.ACKDIS bit is set (see spec. 10.2.5.16).
Signed-off-by: Dmitry Fleytman
---
hw/net/e1000e_core.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/net/e1000e_core.c b/hw/net/e1000e_core.c
index e70e669..f4ec79f 100644
--- a/hw/net/e10
Before this patch first netdev queue only was flushed.
Signed-off-by: Dmitry Fleytman
---
hw/net/e1000e.c | 2 +-
hw/net/e1000e_core.c | 2 +-
hw/net/e1000e_core.h | 3 +++
3 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/hw/net/e1000e.c b/hw/net/e1000e.c
index bad43f4..4994e1
This patch fixes incorrect check for
interrypt type being used.
PBSCLR register is valid for MSI-X only.
See spec. 10.2.3.13 MSI—X PBA Clear
Signed-off-by: Dmitry Fleytman
---
hw/net/e1000e_core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/net/e1000e_core.c b/hw/net
Signed-off-by: Dmitry Fleytman
---
hw/net/e1000e_core.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/net/e1000e_core.c b/hw/net/e1000e_core.c
index ade4d25..a9603e0 100644
--- a/hw/net/e1000e_core.c
+++ b/hw/net/e1000e_core.c
@@ -1807,6 +1807,7 @@ e1000e_core_set_link_status(E1000ECo
This series contains a few RX logic fixes for e1000e.
These fixes improve compliance to HW device specification
and fix occasional interruptions of RX traffic with
the latest linux driver.
Dmitry Fleytman (7):
e1000e: Flush all receive queues on receive enable
e1000e: Flush receive queue on l
CTRL_EXT.EIAME bit controls clearing of IAM bits,
but current code clears IMS bits instead.
See spec. 10.2.2.5 Extended Device Control Register.
Signed-off-by: Dmitry Fleytman
---
hw/net/e1000e_core.c | 4 ++--
hw/net/trace-events | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff
d1f6af6 "kvm-irqchip: simplify kvm_irqchip_add_msi_route" was a cleanup
of kvmchip routing configuration, that was mostly intended for x86.
However, it also contains a subtle change in behaviour which breaks EEH[1]
error recovery on certain VFIO passthrough devices on spapr guests. So far
it's onl
David Gibson writes:
> [ Unknown signature status ]
> On Wed, Sep 14, 2016 at 11:24:01AM +0530, Nikunj A Dadhania wrote:
>> We flush the qemu TLB lazily. check_tlb_flush is called whenever we hit
>> a context synchronizing event or instruction that requires a pending
>> flush to be performed.
>>
This patch adds a pmu=[on/off] option to enable/disable vPMU support
in guest vCPU. This option is only available for cortex-a57/cortex-53/
host under both TCG and KVM modes, but unavailable on ARMv7 and other
processors. It allows virt tools, such as libvirt, to determine the
exsitence of vPMU and
This patchset adds a pmu=[on/off] option to enable/disable vPMU support
for guest VM. There are several reasons to justify this option. First,
vPMU can be problematic for cross-migration between different SoC as perf
counters are architecture-dependent. It is more flexible to have an option
to tur
CPU vPMU is now turned off by default, but it was ON in virt-2.7
machine type. To solve this problem, this patch adds a PMU option
in machine state, which is used to control CPU's vPMU status. This
PMU option is not exposed to command line and is turned on in
virt-2.7 machine type to make sure it i
On Wed, Sep 14, 2016 at 11:16:12AM -0500, Brijesh Singh wrote:
> Hi Eric,
>
> Thanks for feedback.
>
> > > # @present: true if KVM acceleration is built into this executable
> > > #
> > > +# @sev: true if SEV is active
> >
> > Worth expanding what the acronym stands for. Also needs a '(since
On Thu, Sep 15, 2016 at 08:43:33AM +0800, Wanpeng Li wrote:
> From: Wanpeng Li
>
> Introduce a new APIC macro to replace APIC_COMMON macro in
> hw/intc/apic.c in order to capture access LAPIC in qemu
> even if LAPIC is emulated in kvm.
>
> Suggested-by: Paolo Bonzini
> Cc: Paolo Bonzini
> Cc
Hi Wei,
I am happy to queue up this for QEMU, but I'll wait for the first patch
to be committed to Xen before sending a pull request. Is that OK?
Cheers,
Stefano
On Wed, 14 Sep 2016, Paulina Szubarczyk wrote:
> Hi,
>
> It is a proposition for implementation of grant copy operation in qemu-qdis
On Mon, Sep 12, 2016 at 12:11:40PM +0530, Nikunj A Dadhania wrote:
> From: Ravi Bangoria
>
> darn: Deliver A Random Number
>
> Currently return invalid random number for all the case. This needs
> proper algorithm to provide cryptographically suitable random data.
> Reading from /dev/random can
On Mon, Sep 12, 2016 at 12:11:44PM +0530, Nikunj A Dadhania wrote:
> lxvb16x: Load VSX Vector Byte*16
> lxvh8x: Load VSX Vector Halfword*8
>
> Signed-off-by: Nikunj A Dadhania
> ---
> target-ppc/helper.h | 1 +
> target-ppc/mem_helper.c | 6
> target-ppc/trans
On Mon, Sep 12, 2016 at 12:11:46PM +0530, Nikunj A Dadhania wrote:
> stxvb16x: Store VSX Vector Byte*16
> stxvh8x: Store VSX Vector Halfword*8
>
> Signed-off-by: Nikunj A Dadhania
Basically the same comments as on the load side - this looks bogus to
me.
I think it would make sense to fold toge
On Mon, Sep 12, 2016 at 12:11:45PM +0530, Nikunj A Dadhania wrote:
> Manipulate data and store 8bytes instead of 4bytes.
>
> Signed-off-by: Nikunj A Dadhania
> ---
> target-ppc/translate/vsx-impl.inc.c | 27 +--
> 1 file changed, 13 insertions(+), 14 deletions(-)
>
> dif
On Mon, Sep 12, 2016 at 12:11:43PM +0530, Nikunj A Dadhania wrote:
> Load 8byte at a time and manipulate.
>
> Signed-off-by: Nikunj A Dadhania
> ---
> target-ppc/helper.h | 1 +
> target-ppc/mem_helper.c | 5 +
> target-ppc/translate/vsx-impl.inc.c | 34
On Wed, 09/14 16:48, Max Reitz wrote:
> On 2016-09-14 at 16:35, Stefan Hajnoczi wrote:
> > On Mon, Sep 05, 2016 at 10:50:42AM +0800, Fam Zheng wrote:
> > > v4: Remove unused variable in patch 1 and unwanted warning in patch 2.
> > > [Max]
> > >
> > > v3: Fix typo in copyright header. [Max]
> > >
On Thu, 2016-09-15 at 10:25 +1000, David Gibson wrote:
> > void helper_booke206_tlbivax(CPUPPCState *env, target_ulong
> address)
> > {
> > - PowerPCCPU *cpu = ppc_env_get_cpu(env);
> > + CPUState *cs;
> >
> > if (address & 0x4) {
> > /* flush all entries */
> > @@ -2774,11
On Fri, 2 Sep 2016, Olaf Hering wrote:
> Implement SUSE specific unplug protocol for emulated PCI devices
> in PVonHVM guests. Its a simple 'outl(1, (ioaddr + 4));'.
> This protocol was implemented and used since Xen 3.0.4.
> It is used in all SUSE/SLES/openSUSE releases up to SLES11SP3 and
> openS
On Wed, Sep 14, 2016 at 14:53:14 +0100, Alex Bennée wrote:
> Richard Henderson writes:
> > From: "Emilio G. Cota"
> > QEMU_CFLAGS += -I$(SRC_PATH)/tests
> > @@ -465,6 +466,7 @@ tests/test-qdist$(EXESUF): tests/test-qdist.o
> > $(test-util-obj-y)
> > tests/test-qht$(EXESUF): tests/test-qht.o $(
On Thu, Sep 15, 2016 at 10:56:56AM +1000, David Gibson wrote:
> On Mon, Sep 12, 2016 at 12:11:29PM +0530, Nikunj A Dadhania wrote:
> > 1) Consolidate Load/Store operations using tcg_gen_qemu_ld/st functions
> > 2) This series contains 10 new instructions for POWER9 ISA3.0
> >Use newer qemu load
On Fri, 2 Sep 2016, Olaf Hering wrote:
> Using 'vdev=sd[a-o]' will create an emulated LSI controller, which can
> be used by the emulated BIOS to boot from disk. If the HVM domU has also
> PV driver the disk may appear twice in the guest. To avoid this an
> unplug of the emulated hardware is needed
On Thu, Sep 15, 2016 at 11:41:01AM +1000, Benjamin Herrenschmidt wrote:
> On Thu, 2016-09-15 at 10:25 +1000, David Gibson wrote:
> > > void helper_booke206_tlbivax(CPUPPCState *env, target_ulong
> > address)
> > > {
> > > - PowerPCCPU *cpu = ppc_env_get_cpu(env);
> > > + CPUState *cs;
> > >
On Mon, Sep 12, 2016 at 12:11:35PM +0530, Nikunj A Dadhania wrote:
> Make byte-swap routines use the common GEN_QEMU_LOAD macro
s/GEN_QEMU_LOAD/GEN_QEMU_STORE/
> Signed-off-by: Nikunj A Dadhania
> ---
> target-ppc/translate.c | 32 ++--
> 1 file changed, 10 insertion
On Mon, Sep 12, 2016 at 12:11:29PM +0530, Nikunj A Dadhania wrote:
> 1) Consolidate Load/Store operations using tcg_gen_qemu_ld/st functions
> 2) This series contains 10 new instructions for POWER9 ISA3.0
>Use newer qemu load/store tcg helpers and optimize stxvw4x and lxvw4x.
>
> Patches:
> 0
On Mon, Sep 12, 2016 at 12:11:30PM +0530, Nikunj A Dadhania wrote:
> Implement macro to consolidate store operations using newer
> tcg_gen_qemu_ld functions.
s/store/load/, but I can fix that as I apply if I don't find anything
else in the series which requires a respin.
>
> Signed-off-by: Nikun
Hi,
Your series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 1473890265-3304-1-git-send-email-hpous...@reactos.org
Subject: [Qemu-devel] [PATCH 0/5] ps2: fix keyboard set 3 and misc improvements
=== TEST SCRIPT BEGIN ===
#!/bin/bash
B
From: Wanpeng Li
Introduce a new APIC macro to replace APIC_COMMON macro in
hw/intc/apic.c in order to capture access LAPIC in qemu
even if LAPIC is emulated in kvm.
Suggested-by: Paolo Bonzini
Cc: Paolo Bonzini
Cc: Radim Krčmář
Cc: Michael S. Tsirkin
Cc: Eduardo Habkost
Signed-off-by: Wa
On Wed, Aug 17, 2016 at 10:27:48PM -0400, John Arbuckle wrote:
> The old pc scancode translation is replaced with QEMU's QKeyCode. This is just
> a mechanical substitution, which a number of broken mappings left in.
>
> Signed-off-by: John Arbuckle
> ---
> *v5 changes
> Merged Power key patch wit
On Wed, Sep 14, 2016 at 08:48:22PM +0200, Laurent Vivier wrote:
> Define and use trace_spapr_XXX functions instead of
> DPRINTF to trace some SPAPR devices: spapr_vio, spapr_drc, spapr_rtas,
> spapr_llan, spapr_vscsi.
>
> This allows to enable dynamically (instead of recompiling the source)
> the
On Wed, Sep 14, 2016 at 11:24:00AM +0530, Nikunj A Dadhania wrote:
You need some sort of commit message here.
I'd ignore and apply anyway, except that there are some other things
in later patches that will need a respin.
> Signed-off-by: Nikunj A Dadhania
> ---
> target-ppc/cpu.h | 1 +
On Wed, Sep 14, 2016 at 11:24:02AM +0530, Nikunj A Dadhania wrote:
> tlbie (BookS) and tlbivax (BookE) plus the H_CALLs(pseries) should have
> a global effect.
>
> Introduces TLB_NEED_GLOBAL_FLUSH flag. During lazy tlb flush, after
> taking care of pending local flushes, check broadcast flush(at c
On Wed, Sep 14, 2016 at 01:23:57PM +0200, Greg Kurz wrote:
> Signed-off-by: Greg Kurz
Applied to ppc-for-2.8, thanks.
> ---
> MAINTAINERS |4
> 1 file changed, 4 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 13b882ba01ce..6552ccde3ee1 100644
> --- a/MAINTAINERS
> ++
On Wed, Sep 14, 2016 at 09:56:47PM +0200, Thomas Huth wrote:
> On 14.09.2016 20:48, Laurent Vivier wrote:
> > Signed-off-by: Laurent Vivier
> > ---
> > hw/scsi/spapr_vscsi.c | 89
> > +--
> > hw/scsi/trace-events | 27
> > 2 files
On Wed, Sep 14, 2016 at 11:24:01AM +0530, Nikunj A Dadhania wrote:
> We flush the qemu TLB lazily. check_tlb_flush is called whenever we hit
> a context synchronizing event or instruction that requires a pending
> flush to be performed.
>
> However, we fail to handle broadcast TLB flush operations
On Wed, Sep 14, 2016 at 03:09:31PM -0500, Eric Blake wrote:
> On 09/14/2016 01:48 PM, Laurent Vivier wrote:
> > Signed-off-by: Laurent Vivier
> > ---
> > hw/scsi/spapr_vscsi.c | 89
> > +--
> > hw/scsi/trace-events | 27
> > 2 fil
Daniel P Berrange writes:
> Instead of having a global dstate array, declare a single
> 'uint16 TRACE_${EVENT_NAME}_DSTATE' variable for each
> trace event. Record a pointer to this variable in the
> TraceEvent struct too.
> By turning trace_event_get_state_dynamic_by_id into a
> macro, this stil
Daniel P Berrange writes:
> The TraceEvent struct vcpu_id field uses the constant
> TRACE_VCPU_EVENT_COUNT as a magic value to indicate this
> is not a per-VCPU event. The max count value will be
> different for each event group though, so this is no
> longer suitable. Instead use the value (size_
Daniel P Berrange writes:
> Since there will shortly be multiple event groups allowed,
> we can no longer use the TraceEventID and TraceEventVCPUID
> enums in the trace control APIs. There will in fact be
> multiple distinct enums, and the enum values will only be
> required to be unique per group
Hi,
Your series failed automatic build test. Please find the testing commands and
their output below. If you have docker installed, you can probably reproduce it
locally.
Type: series
Message-id: 1473890265-3304-1-git-send-email-hpous...@reactos.org
Subject: [Qemu-devel] [PATCH 0/5] ps2: fix keyb
So looking at code, i have impression that write will go through the
cpu_physical_memory_write_rom but the read will still go through
address_space_rw which will eventually invoke address_space_read.
Yes, you'd have to modify it a bit. Something like
Sure this will works, thanks for the snip
On 15/09/2016 00:06, Brijesh Singh wrote:
>
> here is what I see:
>
> int cpu_memory_rw_debug(CPUState *cpu, target_ulong addr,
> uint8_t *buf, int len, int is_write)
> {
>
>
>if (is_write)
>cpu_physical_memory_write_rom_internal()
> else
Daniel P Berrange writes:
> The trace_event_count, trace_event_id and
> trace_event_pattern methods are no longer required
> now that everything is using the iterator APIs
> The trace_event_set_state and trace_event_set_vcpu_state
> macros were also unused.
> Signed-off-by: Daniel P. Berrange
Daniel P Berrange writes:
> This converts the HMP/QMP monitor API implementations
> and some internal trace control methods to use the new
> trace event iterator APIs.
> Reviewed-by: Stefan Hajnoczi
> Signed-off-by: Daniel P. Berrange
> ---
> monitor.c | 16 ++
> trace/control.c
On 08/19/2016 11:50 AM, Kevin Wolf wrote:
> We just added the option to use qdev device names in all device related
> block QMP commands. This patch converts some of the test cases in 118 to
> use qdev device names instead of BlockBackend names to cover the new
> way. It converts cases for each of
On 08/19/2016 11:50 AM, Kevin Wolf wrote:
> In order to remove the necessity to use BlockBackend names in the
> external API, we want to allow qdev device names in all device related
> commands.
>
> This converts block_set_io_throttle to accept a qdev device name.
>
> Signed-off-by: Kevin Wolf
>
On 09/14/2016 04:52 PM, Paolo Bonzini wrote:
On 14/09/2016 23:47, Brijesh Singh wrote:
On 09/14/2016 04:00 PM, Paolo Bonzini wrote:
On 14/09/2016 22:59, Brijesh Singh wrote:
I will look into hooking up the callback into ROM read/write ops. I was
thinking about adding a new argument in
On Wed, Sep 14, 2016 at 02:35:41PM -0300, Eduardo Habkost wrote:
> On Wed, Sep 14, 2016 at 06:46:20PM +0300, Michael S. Tsirkin wrote:
> > On Wed, Sep 14, 2016 at 04:06:33PM +0100, Daniel P. Berrange wrote:
> > > On Wed, Sep 14, 2016 at 05:48:17PM +0300, Michael S. Tsirkin wrote:
> > > > On Wed, Se
On 08/19/2016 11:50 AM, Kevin Wolf wrote:
> In order to remove the necessity to use BlockBackend names in the
> external API, we want to allow qdev device names in all device related
> commands.
>
> This converts blockdev-change-medium to accept a qdev device name.
>
> Signed-off-by: Kevin Wolf
Hi,
This patchset is a welcome cleanup of scancodes used in PS/2 keyboard emulation.
- Patches 1 and 2 are fixes to let Linux use set 3 if instructed so.
- Patch 3 makes scancodes untranslated by default and translates them if
required,
instead of receiving translated scancodes by default and
This fixes problems with translated set 1, where most make code were wrong.
This fixes problems with set 3 for extended keys (like arrows) and lot of other
keys.
Added a FIXME for set 3, where most keys must not (by default) deliver a break
code.
Detailed list of changes on untranslated set 2:
-
When getting scancode, current scancode must be preceded from reply ack.
When setting scancode, we must reject invalid scancodes.
Signed-off-by: Hervé Poussineau
---
hw/input/ps2.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/hw/input/ps2.c b/hw/input/ps2.c
index 0
Instead, print a warning message.
Signed-off-by: Hervé Poussineau
---
hw/input/ps2.c | 19 ++-
1 file changed, 6 insertions(+), 13 deletions(-)
diff --git a/hw/input/ps2.c b/hw/input/ps2.c
index 3d7205d..5acd3ed 100644
--- a/hw/input/ps2.c
+++ b/hw/input/ps2.c
@@ -605,7 +605,8 @
Change ps2_put_keycode to get an untranslated scancode, which is translated if
needed.
As qemu_input_key_value_to_scancode() gives translated scancodes, untranslate
them
in ps2_keyboard_event first before giving them to ps2_put_keycode.
Results are not changed, except for some keys in translate
Signed-off-by: Hervé Poussineau
---
hw/input/ps2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/input/ps2.c b/hw/input/ps2.c
index a8aa36f..00a1792 100644
--- a/hw/input/ps2.c
+++ b/hw/input/ps2.c
@@ -290,7 +290,7 @@ void ps2_write_keyboard(void *opaque, int val)
Daniel P Berrange writes:
> Currently methods which want to iterate over trace events,
> do so using the trace_event_count() and trace_event_id()
> methods. This leaks the concept of a single ID enum to
> the callers. There is an alternative trace_event_pattern()
> method which can be used in an i
On 09/14/2016 09:03 AM, Kevin Wolf wrote:
Am 05.09.2016 um 17:55 hat Kevin Wolf geschrieben:
Am 19.08.2016 um 18:50 hat Kevin Wolf geschrieben:
In order to remove the necessity to use BlockBackend names in the external API,
we already converted all block layer QMP commands on the node level t
On 14/09/2016 23:47, Brijesh Singh wrote:
>
>
> On 09/14/2016 04:00 PM, Paolo Bonzini wrote:
>>
>>
>> On 14/09/2016 22:59, Brijesh Singh wrote:
>>> I will look into hooking up the callback into ROM read/write ops. I was
>>> thinking about adding a new argument in
>>> cpu_physical_memory_write_r
On 09/14/2016 04:00 PM, Paolo Bonzini wrote:
On 14/09/2016 22:59, Brijesh Singh wrote:
I will look into hooking up the callback into ROM read/write ops. I was
thinking about adding a new argument in
cpu_physical_memory_write_rom_internal()
void cpu_physical_memory_write_rom(AddressSpace *as
On Wed, Sep 14, 2016 at 10:44:58PM +0200, Paolo Bonzini wrote:
>
>
> On 14/09/2016 22:36, Michael S. Tsirkin wrote:
> > Specifically with debug, if you have debug then clearly you
> > can dump guest memory. This is what this feature is about.
> > If we want a hypervisor that can not dump guest me
On 09/14/2016 04:02 PM, Thomas Huth wrote:
> Well, /bin/bash is also not really portable ... I've seen systems in the
> past where bash was installed in another directory or not at all...
True, but we already liberally use /bin/bash scripts elsewhere in
qemu.git, so at least you wouldn't be the fi
The physical TB cache is split into 2^E caches, where E is the number of
events with the "vcpu" and without the "disable" properties.
The virtual TB cache on each vCPU uses a (potentially) different
physical TB cache.
This is later exploited to support different tracing event states on a
per-vCPU
Avoids generating TCG code to call guest code tracing events in vCPUs that are
not dynamically tracing that event.
Currently, events with the 'tcg' property always generate TCG code to trace that
event at guest code execution time, when their dynamic tracing state is checked.
This series adds a p
The function is reused in later patches.
Signed-off-by: Lluís Vilanova
---
cputlb.c|2 +-
include/exec/exec-all.h |6 ++
translate-all.c |9 +++--
3 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/cputlb.c b/cputlb.c
index d068ee5..686a09
On 09/14/2016 03:44 PM, Paolo Bonzini wrote:
On 14/09/2016 22:36, Michael S. Tsirkin wrote:
Specifically with debug, if you have debug then clearly you
can dump guest memory. This is what this feature is about.
If we want a hypervisor that can not dump guest memory, let's
add a flag like tha
If an event is dynamically disabled, the TCG code that calls the
execution-time tracer is not generated.
Removes the overheads of execution-time tracers for dynamically disabled
events. As a bonus, also avoids checking the event state when the
execution-time tracer is called from TCG-generated cod
On 09/14/2016 03:38 PM, Paolo Bonzini wrote:
On 14/09/2016 22:29, Brijesh Singh wrote:
Does the guest have to check the measured data (e.g. with a hash) too,
to check that it hasn't been tampered with outside the secure
processor's control? Of course this would result in garbage written to
Uses the per-vCPU event state in CPUState->trace_dstate (a bitmap) as an
index to a physical TB cache that will contain code specific to the set
of dynamically enabled events.
Two vCPUs tracing different events will execute code from different
physical TB caches. Two vCPUs tracing the same events
On 14/09/2016 23:09, Michael S. Tsirkin wrote:
> > > > Does the guest have to check the measured data (e.g. with a hash) too,
> > > > to check that it hasn't been tampered with outside the secure
> > > > processor's control? Of course this would result in garbage written to
> > > > the modified
On 08/19/2016 11:50 AM, Kevin Wolf wrote:
> In order to remove the necessity to use BlockBackend names in the
> external API, we want to allow qdev device names in all device related
> commands.
>
> This converts eject to accept a qdev device name.
>
> Signed-off-by: Kevin Wolf
> ---
> blockdev
On Wed, Sep 14, 2016 at 10:38:58PM +0200, Paolo Bonzini wrote:
>
>
> On 14/09/2016 22:29, Brijesh Singh wrote:
> >> Does the guest have to check the measured data (e.g. with a hash) too,
> >> to check that it hasn't been tampered with outside the secure
> >> processor's control? Of course this w
On 13/09/2016 09:11, Alexey Kardashevskiy wrote:
> The tap backend is already using qemu-bridge-helper to attach tap
> interface to a bridge but (unlike the bridge backend) it always uses
> the default bridge name - br0.
>
> This adds a "br" property support to the tap backend.
>
> Signed-off-b
On 08/19/2016 11:50 AM, Kevin Wolf wrote:
> In order to remove the necessity to use BlockBackend names in the
> external API, we want to allow qdev device names in all device related
> commands.
>
> This converts x-blockdev-remove-medium to accept a qdev device name.
>
> Signed-off-by: Kevin Wolf
On 14.09.2016 16:44, Eric Blake wrote:
> On 09/14/2016 05:35 AM, Thomas Huth wrote:
>> Erik,
>
> It's Eric, but don't sweat it (you're not the first, and probably not
> the last, to typo names)
Oops, big sorry! I must have been confused by the German spelling of
that name :-(
> +while [ $# -
On 14/09/2016 22:59, Brijesh Singh wrote:
> I will look into hooking up the callback into ROM read/write ops. I was
> thinking about adding a new argument in
> cpu_physical_memory_write_rom_internal()
>
> void cpu_physical_memory_write_rom(AddressSpace *as, hwaddr addr,
>
Hi Paolo,
On 09/13/2016 06:05 PM, Paolo Bonzini wrote:
On 13/09/2016 16:49, Brijesh Singh wrote:
+/* Register SEV read/write ops for the guest RAM */
+if (kvm_sev_enabled())
+memory_region_set_ram_ops(ram, kvm_sev_get_ram_ops());
If you don't actually need this one except f
On 08/19/2016 11:50 AM, Kevin Wolf wrote:
> In order to remove the necessity to use BlockBackend names in the
> external API, we want to allow qdev device names in all device related
> commands.
>
> This converts x-blockdev-insert-medium to accept a qdev device name.
>
Since this command is expe
On 08/19/2016 11:50 AM, Kevin Wolf wrote:
> In order to remove the necessity to use BlockBackend names in the
> external API, we want to allow qdev device names in all device related
> commands.
>
> This converts blockdev-open/close-tray to accept a qdev device name.
>
> Signed-off-by: Kevin Wolf
On 14/09/2016 22:36, Michael S. Tsirkin wrote:
> Specifically with debug, if you have debug then clearly you
> can dump guest memory. This is what this feature is about.
> If we want a hypervisor that can not dump guest memory, let's
> add a flag like that. Does everyone have to disable debugging
On 14/09/2016 22:29, Brijesh Singh wrote:
>> Does the guest have to check the measured data (e.g. with a hash) too,
>> to check that it hasn't been tampered with outside the secure
>> processor's control? Of course this would result in garbage written to
>> the modified page, but that might be a
Closing according to comment #2.
** Changed in: qemu
Status: New => Invalid
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https://bugs.launchpad.net/bugs/1596009
Title:
config/build problem due to libncursesw on Xenial
S
On Wed, Sep 14, 2016 at 09:58:25PM +0200, Paolo Bonzini wrote:
>
>
> On 14/09/2016 21:24, Michael S. Tsirkin wrote:
> > Well limited protection is of a limited use :) Seriously, the point of
> > mitigation should be blocking classes of vulenrabilities not making
> > things more complex.
>
> No,
*/
#define MEMTXATTRS_UNSPECIFIED ((MemTxAttrs) { .unspecified = 1 })
+/* Access the guest memory for debug purposes */
+#define MEMTXATTRS_SEV_DEBUG ((MemTxAttrs) { .sev_debug = 1 })
#endif
Just make it "debug" and MEMTXATTRS_DEBUG.
Thanks, will fix in v2.
From: Aleksandar Markovic
This patch implements Qemu user mode ustat() syscall support.
Syscall ustat() returns information about a mounted filesystem.
The implementation is similar to the implementations of statfs(),
fstatfs() and other related syscalls. It is based on invocation of
host's ust
On Wed, Sep 14, 2016 at 01:46:09PM -0500, Brijesh Singh wrote:
> 7) Guest owner validates the measurement. If measurement matches then we are
> good to launch the guest. This should ensure that bootcode was not
> compromised by hypervisor.
As hypervisor can e.g. execute said code in any order (wit
On 09/13/2016 05:59 PM, Paolo Bonzini wrote:
On 13/09/2016 16:50, Brijesh Singh wrote:
In SEV-enabled mode we need to reload the BIOS image on loader reset, this
will ensure that BIOS image gets encrypted and included as part of launch
meausrement on guest reset.
Just to check if I underst
From: Aleksandar Markovic
There are currently several problems related to syslog() support.
For example, if the second argument "bufp" of target syslog() syscall
is NULL, the current implementation always returns error code EFAULT.
However, NULL is a perfectly valid value for the second argument
From: Aleksandar Markovic
There is a duplicate item in strace.list. It is benign, but it
shouldn't be there. It is the only duplicate in strace.list. This
patch removes it.
Signed-off-by: Aleksandar Markovic
---
linux-user/strace.list | 3 ---
1 file changed, 3 deletions(-)
diff --git a/linux
From: Aleksandar Markovic
do_socketcall() function in Qemu's syscalls.c is implemented to mirror
corespondant implementation of socketcall() in Linux kernel. (see kernel
source file net/socket.c, definition of socketcall).
However, error codes are wrong for the cases of invalid values of the fir
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