Re: [Qemu-devel] [PATCH v6 0/5] target-tilegx: Implement floating point instructions

2016-06-04 Thread Chen Gang
Hello Maintainers: Please help check this patch when you have time. Thanks. On 5/15/16 07:40, cheng...@emindsoft.com.cn wrote: > From: Chen Gang > > These patches are the normal floating point implementation, instead of > the original temporary one. > > It passes building, and gcc testsuite.

[Qemu-devel] [Bug 1588328] Re: Qemu 2.6 Solaris 9 Sparc Segmentation Fault

2016-06-04 Thread Zhen Ning Lim
Hi Mark, I have uploaded a copy of it to mega.nz https://mega.nz/#!94ZVXBra -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1588328 Title: Qemu 2.6 Solaris 9 Sparc Segmentation Fault Status in QEM

Re: [Qemu-devel] [PATCH 07/10] target-avr: adding instruction decoder

2016-06-04 Thread Michael Rolnik
1. no more custings. 2. yes, it is generated code. I would like to commit the generator. however it is not very ripe yet. and it has a dependency on yaml-cpp and xsltproc. 3. the generator does not assume that same bits are extracted. it will be fixed later. 4. 0 is no longer returned. On Sun, Jun

Re: [Qemu-devel] [PATCH 05/10] target-avr: adding AVR interrupt handling

2016-06-04 Thread Michael Rolnik
fixed. On Sun, Jun 5, 2016 at 1:26 AM, Richard Henderson wrote: > On 06/02/2016 01:06 PM, Michael Rolnik wrote: > >> +} else if (env->intsrc != 0) { >> +vector = __builtin_ffs(env->intsrc); >> +} >> > > Use either ffs (no __builtin) or, preferably, ctz32 from qemu/host-utils.h.

Re: [Qemu-devel] [PATCH 06/10] target-avr: adding helpers for IN, OUT, SLEEP, WBR & unsupported instructions

2016-06-04 Thread Michael Rolnik
switched to qemu_log. it will be removed after a while. On Sun, Jun 5, 2016 at 1:48 AM, Richard Henderson wrote: > On 06/02/2016 01:06 PM, Michael Rolnik wrote: > >> +voidhelper_unsupported( >> +CPUAVRState*env) >> +{ >> +CPUState *cs

Re: [Qemu-devel] [PATCH 04/10] target-avr: adding instructions encodings

2016-06-04 Thread Michael Rolnik
1. The code was generated. Every instruction has its own extractors. there are several reasons 1. I don't have to think and gather the instructions into the group. 2. I don't have to remember what group an instruction is in 3. there is no performance penalty. 2. done. On Sun, Jun 5,

Re: [Qemu-devel] [PATCH v7 3/6] smbios: Move table build tools into an include file.

2016-06-04 Thread Corey Minyard
On 06/03/2016 11:15 AM, Michael S. Tsirkin wrote: On Tue, May 24, 2016 at 12:37:19PM -0500, miny...@acm.org wrote: From: Corey Minyard This will let things in other files (like IPMI) build SMBIOS tables. Signed-off-by: Corey Minyard --- hw/smbios/smbios.c | 70 ---

Re: [Qemu-devel] [PATCH 10/10] target-avr: fixing code style

2016-06-04 Thread Richard Henderson
On 06/02/2016 01:07 PM, Michael Rolnik wrote: Signed-off-by: Michael Rolnik --- target-avr/cpu-qom.h| 38 + target-avr/cpu.c| 100 +--- target-avr/cpu.h| 74 target-avr/gdb

Re: [Qemu-devel] [PATCH 09/10] target-avr: updating translate.c to use instructions translation

2016-06-04 Thread Richard Henderson
On 06/02/2016 01:07 PM, Michael Rolnik wrote: +uint32_tget_opcode( +uint8_t const *code, +unsignedbitBase, +unsignedbitSize) +{ +return *(uint16_t *)co

Re: [Qemu-devel] [PATCH 08/10] target-avr: adding instruction translation

2016-06-04 Thread Richard Henderson
On 06/02/2016 01:07 PM, Michael Rolnik wrote: Signed-off-by: Michael Rolnik --- target-avr/translate-inst.c | 2443 +++ Is there a reason this code isn't going into translate.c? You wouldn't need the declarations in translate-inst.h or translate.h. +/*

Re: [Qemu-devel] [PATCH 07/10] target-avr: adding instruction decoder

2016-06-04 Thread Richard Henderson
On 06/02/2016 01:06 PM, Michael Rolnik wrote: +uint32_tavr_decode(uint32_t pc, uint32_t *length, uint32_t code, translate_function_t *translate) +{ +uint32_topcode = extract32(code, 0, 16); +switch (opcode & 0xd000) { +case0x: { +uint32_to

Re: [Qemu-devel] [PATCH 06/10] target-avr: adding helpers for IN, OUT, SLEEP, WBR & unsupported instructions

2016-06-04 Thread Richard Henderson
On 06/02/2016 01:06 PM, Michael Rolnik wrote: +voidhelper_unsupported( +CPUAVRState*env) +{ +CPUState *cs = CPU(avr_env_get_cpu(env)); + +cs->exception_index = EXCP_DEBUG; +cpu_dump_state(cs, stderr, fprintf, 0); +cpu_loop_

Re: [Qemu-devel] [PATCH 10/10] target-avr: fixing code style

2016-06-04 Thread Richard Henderson
On 06/04/2016 11:34 AM, Michael Rolnik wrote: understood. but I am totally lost now. what should I do now. I've sent a set of patches last Friday, they should include all the fixes. For the next round: git format-patch --cover-letter --subject-prefix='PATCH v4' master Edit -cover-letter

Re: [Qemu-devel] [PATCH 05/10] target-avr: adding AVR interrupt handling

2016-06-04 Thread Richard Henderson
On 06/02/2016 01:06 PM, Michael Rolnik wrote: +} else if (env->intsrc != 0) { +vector = __builtin_ffs(env->intsrc); +} Use either ffs (no __builtin) or, preferably, ctz32 from qemu/host-utils.h. +env->pc = base + vector * size; +env->pc = base + vector * size;

Re: [Qemu-devel] [PATCH 04/10] target-avr: adding instructions encodings

2016-06-04 Thread Richard Henderson
On 06/02/2016 01:06 PM, Michael Rolnik wrote: Signed-off-by: Michael Rolnik --- target-avr/translate-inst.h | 838 1 file changed, 838 insertions(+) create mode 100644 target-avr/translate-inst.h diff --git a/target-avr/translate-inst.h b/target-av

[Qemu-devel] [RFC 12/14] contrib: add vhost-user-gpu

2016-06-04 Thread marcandre . lureau
From: Marc-André Lureau Add a vhost-user gpu backend example, based on virtio-gpu/3d device. It is to be associated with a vhost-user-backend object, ex: -object vhost-user-backend,id=vug,cmd="vhost-user-gpu" Signed-off-by: Marc-André Lureau --- Makefile |3 +

[Qemu-devel] [RFC 06/14] contrib: add vhost-user-input

2016-06-04 Thread marcandre . lureau
From: Marc-André Lureau Add a vhost-user input backend example, based on virtio-input-host device. It takes an evdev path as argument, and can be associated with a vhost-user-backend object, ex: -object vhost-user-backend,id=vuid,cmd="vhost-user-input /dev/input/event0" Signed-off-by: Marc-Andr

[Qemu-devel] [RFC 04/14] vhost-user: add vhost_user_input_get_config()

2016-06-04 Thread marcandre . lureau
From: Marc-André Lureau Signed-off-by: Marc-André Lureau --- docs/specs/vhost-user.txt | 9 ++ hw/virtio/vhost-user.c| 58 +++ include/hw/virtio/vhost-backend.h | 4 +++ 3 files changed, 71 insertions(+) diff --git a/docs/specs/vhos

[Qemu-devel] [RFC 14/14] Add virtio-gpu vhost-user backend

2016-06-04 Thread marcandre . lureau
From: Marc-André Lureau Add to virtio-gpu devices a "vhost-user" property. When set, the associated vhost-user backend is used to handle the virtio rings. For now, a socketpair is created for the backend to share the rendering results with qemu via a simple VHOST_GPU protocol. Example usage: -o

[Qemu-devel] [RFC 13/14] vhost-user: add vhost_user_gpu_set_socket()

2016-06-04 Thread marcandre . lureau
From: Marc-André Lureau Add a new vhost-user message to give a unix socket for gpu updates to a vhost-user backend. Signed-off-by: Marc-André Lureau --- contrib/libvhost-user/libvhost-user.h | 1 + hw/virtio/vhost-user.c| 11 +++ include/hw/virtio/vhost-backend.h |

[Qemu-devel] [RFC 10/14] qemu-char: block during sync read

2016-06-04 Thread marcandre . lureau
From: Marc-André Lureau A sync read should block until data is available, instead of retrying. Change the channel to blocking during read. Signed-off-by: Marc-André Lureau --- qemu-char.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/qemu-char.c b/qemu-char.c index efa1e2a..ce09226 100

[Qemu-devel] [RFC 01/14] Add qemu_chr_open_socket()

2016-06-04 Thread marcandre . lureau
From: Marc-André Lureau Create a CharDriver from an existing socket fd. Is there a better way to do that? Signed-off-by: Marc-André Lureau --- include/sysemu/char.h | 2 ++ qemu-char.c | 37 - 2 files changed, 38 insertions(+), 1 deletion(-) diff

[Qemu-devel] [RFC 05/14] Add vhost-user backend to virtio-input-host

2016-06-04 Thread marcandre . lureau
From: Marc-André Lureau Learn to use a vhost-user as a virtio-input backend. Usage: -object vhost-user-backend,id=vuid -device virtio-input-host-pci,vhost-user=vuid Signed-off-by: Marc-André Lureau --- hw/input/virtio-input-host.c | 67 ++-- hw/input/vi

[Qemu-devel] [RFC 11/14] console: add dpy_gl_scanout2()

2016-06-04 Thread marcandre . lureau
From: Marc-André Lureau Add a new scanout callback that doesn't require any gl context in qemu (importing a dmabuf fd would require qemu egl&gl contexts, and would be unnecessary when using spice anyway) Signed-off-by: Marc-André Lureau --- include/ui/console.h | 10 ++ ui/console.c

[Qemu-devel] [RFC 08/14] vhost: make sure call fd has been received

2016-06-04 Thread marcandre . lureau
From: Marc-André Lureau vhost switches between masked notifier and guest notifier when unmasking. virtio_pci_vq_vector_unmask() checks if there was pending notification, but at the time it is checked, vhost-user backend doesn't guarantee that the switch happened yet, so it may lose some events.

[Qemu-devel] [Bug 1589153] [NEW] qemu-system-x86_64 version 2.5.0 freezes during windows 7 installation in lubuntu 16.04

2016-06-04 Thread Phil Troy
Public bug reported: Hi! I have been using qemu - kvm for several years in different versions of ubuntu (lubuntu). I am trying to migrate from 15.04 to 16.04 and am having a problem. In particular, on my machine (a samsung series 9 with dual core i7 processor and 8gb ram) the following commands w

[Qemu-devel] [RFC 09/14] qemu-char: use READ_RETRIES

2016-06-04 Thread marcandre . lureau
From: Marc-André Lureau The define was introduced with qemu_chr_fe_read_all() in 7b0bfdf52d, however never used. Signed-off-by: Marc-André Lureau --- qemu-char.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/qemu-char.c b/qemu-char.c index caa737d..efa1e2a 100644 ---

[Qemu-devel] [RFC 07/14] misc: rename virtio-gpu.h header guard

2016-06-04 Thread marcandre . lureau
From: Marc-André Lureau Signed-off-by: Marc-André Lureau --- include/hw/virtio/virtio-gpu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index 1602a13..0cc8e67 100644 --- a/include/hw/virtio/virtio-gpu.h

[Qemu-devel] [RFC 02/14] Add vhost-user-backend

2016-06-04 Thread marcandre . lureau
From: Marc-André Lureau Create a vhost-user-backend object that holds a connection to a vhost-user backend and can be referenced from virtio devices that support it. Currently, you may specify the executable to spawn directly from command line, ex: -object vhost-user-backend,id=vui,cmd="./vhost-

[Qemu-devel] [RFC 03/14] vhost-user: split vhost_user_read()

2016-06-04 Thread marcandre . lureau
From: Marc-André Lureau Split vhost_user_read(), so only header can be read with vhost_user_read_header(). Signed-off-by: Marc-André Lureau --- hw/virtio/vhost-user.c | 28 +++- 1 file changed, 19 insertions(+), 9 deletions(-) diff --git a/hw/virtio/vhost-user.c b/hw/v

[Qemu-devel] [RFC 00/14] vhost-user backends for gpu & input virtio devices

2016-06-04 Thread marcandre . lureau
From: Marc-André Lureau Hi, vhost-user allows to drive a virtio device in a seperate process. So far, it has been mainly used with virtio-net. It can work with other devices such as input and gpu, as shown in this series. Some of the benefits of using vhost-user are: - parallelism, since the ba

[Qemu-devel] [PATCH 5/6] contrib: add libvhost-user

2016-06-04 Thread marcandre . lureau
From: Marc-André Lureau Add a library to help implementing vhost-user backend (or slave). Dealing with vhost-user as an application developper isn't so easy: you have all the trouble with any protocol: validation, unix ancillary data, shared memory, eventfd, logging, and on top of that you need

[Qemu-devel] [PATCH 6/6] test/vubr: use contrib/libvhost-user

2016-06-04 Thread marcandre . lureau
From: Marc-André Lureau Use the libvhost-user library. This ended up being a rather large patch that cannot be easily splitted, due to massive code move and API changes. Signed-off-by: Marc-André Lureau --- tests/Makefile|2 +- tests/vhost-user-bridge.c | 1167 +---

[Qemu-devel] [PATCH 3/6] vubr: indicate peer disconnected

2016-06-04 Thread marcandre . lureau
From: Marc-André Lureau Signed-off-by: Marc-André Lureau --- tests/vhost-user-bridge.c | 1 - 1 file changed, 1 deletion(-) diff --git a/tests/vhost-user-bridge.c b/tests/vhost-user-bridge.c index b9bf018..b7bb79a 100644 --- a/tests/vhost-user-bridge.c +++ b/tests/vhost-user-bridge.c @@ -388,7

[Qemu-devel] [PATCH 4/6] vubr: do not accept more than one connection

2016-06-04 Thread marcandre . lureau
From: Marc-André Lureau Signed-off-by: Marc-André Lureau --- tests/vhost-user-bridge.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/vhost-user-bridge.c b/tests/vhost-user-bridge.c index b7bb79a..c21cd79 100644 --- a/tests/vhost-user-bridge.c +++ b/tests/vhost-user-bridge.c @@ -1196

[Qemu-devel] [PATCH 1/6] vubr: remove false comment

2016-06-04 Thread marcandre . lureau
From: Marc-André Lureau dispatcher_remove() is in use. Signed-off-by: Marc-André Lureau --- tests/vhost-user-bridge.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/tests/vhost-user-bridge.c b/tests/vhost-user-bridge.c index 0779ba2..7d548d8 100644 --- a/tests/vhost-user-bridge.c +++ b/t

[Qemu-devel] [PATCH 0/6] Start a contrib/libvhost-user

2016-06-04 Thread marcandre . lureau
From: Marc-André Lureau Hi vhost-user & virtio are not so simple and evolve regularly. There isn't a reference code that would help you get started either. And the backends duplicate most of the effort. Furthermore, due to usage of ancillary data, shared memory, eventfd, atomics, it is not so s

[Qemu-devel] [PATCH 2/6] vubr: remove unnecessary dispatcher_remove

2016-06-04 Thread marcandre . lureau
From: Marc-André Lureau The call fd is not watched Signed-off-by: Marc-André Lureau --- tests/vhost-user-bridge.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/tests/vhost-user-bridge.c b/tests/vhost-user-bridge.c index 7d548d8..b9bf018 100644 --- a/tests/vhost-user-bridge.c +++ b/tests

Re: [Qemu-devel] [PATCH 02/10] target-avr: adding AVR CPU features/flavors

2016-06-04 Thread Richard Henderson
On 06/02/2016 01:06 PM, Michael Rolnik wrote: Signed-off-by: Michael Rolnik --- target-avr/cpu.c | 326 ++- target-avr/cpu.h | 59 ++ 2 files changed, 383 insertions(+), 2 deletions(-) diff --git a/target-avr/cpu.c b/target-avr/cpu.c

Re: [Qemu-devel] [PATCH 01/10] target-avr: AVR cores support is added. 1. basic CPU structure 2. registers 3. no instructions

2016-06-04 Thread Richard Henderson
On 06/02/2016 01:06 PM, Michael Rolnik wrote: diff --git a/disas/avr.c b/disas/avr.c new file mode 100644 index 000..f916e72 --- /dev/null +++ b/disas/avr.c @@ -0,0 +1,10 @@ +#include "qemu/osdep.h" +#include "qemu-common.h" +#include "disas/bfd.h" + +int print_insn_avr(bfd_vma addr, disassem

Re: [Qemu-devel] [kvm-unit-tests PATCH v2 00/10] arm/arm64: add gic framework

2016-06-04 Thread Alex Bennée
Andrew Jones writes: > v2: > Rebased on on latest master + my "populate argv[0]" series (will > send a REPOST for that shortly. Additionally a few patches got > fixes/features; > 07/10 got same fix as kernel 7c9b973061 "irqchip/gic-v3: Configure >all interrupts as non-secure Group-1"

Re: [Qemu-devel] [PATCH 10/10] target-avr: fixing code style

2016-06-04 Thread Michael Rolnik
understood. but I am totally lost now. what should I do now. I've sent a set of patches last Friday, they should include all the fixes. Michael On Sat, Jun 4, 2016 at 8:41 PM, Richard Henderson wrote: > On 06/02/2016 04:10 PM, Peter Maydell wrote: > >> PS: it would be good if you could provide

[Qemu-devel] [kvm-unit-tests PATCH v2 08/10] arm/arm64: gicv2: add an IPI test

2016-06-04 Thread Andrew Jones
Signed-off-by: Andrew Jones --- v2: add more details in the output if a test fails, report spurious interrupts if we get them --- arm/Makefile.common | 6 +- arm/gic.c | 194 arm/unittests.cfg | 7 ++ 3 files changed, 204 in

[Qemu-devel] [kvm-unit-tests PATCH v2 10/10] arm/arm64: gic: don't just use zero

2016-06-04 Thread Andrew Jones
Allow user to select who sends ipis and with which irq, rather than just always sending irq=0 from cpu0. Signed-off-by: Andrew Jones --- v2: actually check that the irq received was the irq sent, and (for gicv2) that the sender is the expected one. --- arm/gic.c | 80 +++

[Qemu-devel] [kvm-unit-tests PATCH v2 01/10] lib: xstr: allow multiple args

2016-06-04 Thread Andrew Jones
Signed-off-by: Andrew Jones --- lib/libcflat.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/libcflat.h b/lib/libcflat.h index 582e3fc60e287..e5e588c742763 100644 --- a/lib/libcflat.h +++ b/lib/libcflat.h @@ -27,8 +27,8 @@ #define __unused __attribute__((__unused_

[Qemu-devel] [kvm-unit-tests PATCH v2 07/10] arm/arm64: add initial gicv3 support

2016-06-04 Thread Andrew Jones
Signed-off-by: Andrew Jones --- v2: configure irqs as NS GRP1 --- lib/arm/asm/arch_gicv3.h | 184 ++ lib/arm/asm/gic-v3.h | 321 + lib/arm/asm/gic.h | 1 + lib/arm/gic.c | 73 +++ lib/arm

[Qemu-devel] [kvm-unit-tests PATCH v2 09/10] arm/arm64: gicv3: add an IPI test

2016-06-04 Thread Andrew Jones
Signed-off-by: Andrew Jones --- v2: use IRM for gicv3 broadcast --- arm/gic.c | 157 ++ arm/unittests.cfg | 6 +++ 2 files changed, 154 insertions(+), 9 deletions(-) diff --git a/arm/gic.c b/arm/gic.c index cf7ec1c90413c..fc7ef241de3

[Qemu-devel] [kvm-unit-tests PATCH v2 03/10] arm/arm64: smp: support more than 8 cpus

2016-06-04 Thread Andrew Jones
Signed-off-by: Andrew Jones --- arm/run | 19 --- arm/selftest.c| 5 - lib/arm/asm/processor.h | 9 +++-- lib/arm/asm/setup.h | 4 ++-- lib/arm/setup.c | 12 +++- lib/arm64/asm/processor.h | 9 +++-- 6 files c

[Qemu-devel] [kvm-unit-tests PATCH v2 02/10] arm64: fix get_"sysreg32" and make MPIDR 64bit

2016-06-04 Thread Andrew Jones
mrs is always 64bit, so we should always use a 64bit register. Sometimes we'll only want to return the lower 32, but not for MPIDR, as that does define fields in the upper 32. Signed-off-by: Andrew Jones --- lib/arm64/asm/processor.h | 15 +-- 1 file changed, 9 insertions(+), 6 delet

[Qemu-devel] [kvm-unit-tests PATCH v2 05/10] arm/arm64: irq enable/disable

2016-06-04 Thread Andrew Jones
Signed-off-by: Andrew Jones --- lib/arm/asm/processor.h | 10 ++ lib/arm64/asm/processor.h | 10 ++ 2 files changed, 20 insertions(+) diff --git a/lib/arm/asm/processor.h b/lib/arm/asm/processor.h index afc903ca7d4ab..75a8d08b89330 100644 --- a/lib/arm/asm/processor.h +++ b/lib

[Qemu-devel] [kvm-unit-tests PATCH v2 06/10] arm/arm64: add initial gicv2 support

2016-06-04 Thread Andrew Jones
Add some gicv2 support. This just adds init and enable functions, allowing unit tests to start messing with it. Signed-off-by: Andrew Jones --- arm/Makefile.common| 1 + lib/arm/asm/gic-v2.h | 74 ++ lib/arm/asm/gic.h | 20 +

[Qemu-devel] [kvm-unit-tests PATCH v2 04/10] arm/arm64: add some delay routines

2016-06-04 Thread Andrew Jones
Allow a thread to wait some specified amount of time. Can specify in cycles, usecs, and msecs. Signed-off-by: Andrew Jones --- lib/arm/asm/processor.h | 19 +++ lib/arm/processor.c | 15 +++ lib/arm64/asm/processor.h | 19 +++ lib/arm64/process

[Qemu-devel] [kvm-unit-tests PATCH v2 00/10] arm/arm64: add gic framework

2016-06-04 Thread Andrew Jones
v2: Rebased on on latest master + my "populate argv[0]" series (will send a REPOST for that shortly. Additionally a few patches got fixes/features; 07/10 got same fix as kernel 7c9b973061 "irqchip/gic-v3: Configure all interrupts as non-secure Group-1" in order to continue working

Re: [Qemu-devel] [PATCH 10/10] target-avr: fixing code style

2016-06-04 Thread Richard Henderson
On 06/02/2016 04:10 PM, Peter Maydell wrote: PS: it would be good if you could provide a cover letter when you send out the next round of these patches; that provides a handy way to deal with the series as a whole (for both automated tools and people), so we tend to prefer multi-patch sets to hav

Re: [Qemu-devel] [PATCH 3/4] target-tricore: Added new MOV instruction variant

2016-06-04 Thread Richard Henderson
On 05/29/2016 03:59 PM, peer.ad...@c-lab.de wrote: +tcg_gen_mov_tl(cpu_gpr_d[r3], cpu_gpr_d[r1]); +tcg_gen_mov_tl(cpu_gpr_d[(r3 + 1)], cpu_gpr_d[r2]); Don't add pointless parenthesis. But more importantly, you need to worry about overlap between r3 and r2. In the general case y

Re: [Qemu-devel] [PATCH 2/4] target-tricore: Added MADD.F and MSUB.F instructions

2016-06-04 Thread Richard Henderson
On 05/29/2016 03:59 PM, peer.ad...@c-lab.de wrote: +flags = f_get_excp_flags(env); +f_result = float32_muladd(-arg1, arg2, arg3, flags, &env->fp_status); Bastian already pointed out that flags here is being used wrong, but I thought I'd reinforce that "-arg1" is not how floating-point n

[Qemu-devel] Cocoa front-end not displaying guest anymore

2016-06-04 Thread Programmingkid
When I start qemu-system-ppc, the OpenBIOS screen is not displayed. If I switch to the serial console and then back to the VGA console, I see this message on the screen: "Guest has not initialized the display (yet)." Command-line used: ./ppc-softmmu/qemu-system-ppc Using this commit: commit 6b

Re: [Qemu-devel] What should qemu do when ACPI's OST event happen.

2016-06-04 Thread Igor Mammedov
On Sat, 4 Jun 2016 18:05:12 +0900 Ren Kimura wrote: > When user add new DIMM to memory slot by using qemu hotplug function, under > ACPI mode, SCI interrupt will happen and then guest OS may issue _OST event > 0x01. > Is it correct? > And in such moment, what should QEMU do? > (i.e. What does the

Re: [Qemu-devel] [PATCH 1/4] target-tricore: Added FTOUZ instruction

2016-06-04 Thread Richard Henderson
On 05/29/2016 03:59 PM, peer.ad...@c-lab.de wrote: +uint32_t helper_ftouz(CPUTriCoreState *env, uint32_t arg) ... +uint32_t result; ... +return (uint32_t)result; Don't add pointless casts. r~

Re: [Qemu-devel] [PATCH RFC 1/8] target-i386: cpu: move features logic that requires CPUState to realize time

2016-06-04 Thread Igor Mammedov
On Fri, 3 Jun 2016 16:26:22 -0300 Eduardo Habkost wrote: > On Fri, Jun 03, 2016 at 12:13:18PM +0200, Igor Mammedov wrote: > > On Thu, 2 Jun 2016 14:34:27 -0300 > > Eduardo Habkost wrote: > > > > > On Thu, Jun 02, 2016 at 06:56:55PM +0200, Igor Mammedov wrote: > > > > On Thu, 2 Jun 2016 11:3

Re: [Qemu-devel] [PATCH v2 0/8] virtio-blk: multiqueue support

2016-06-04 Thread Roman Penyaev
Hi, On Sat, Jun 4, 2016 at 12:26 AM, Stefan Hajnoczi wrote: > On Thu, Jun 02, 2016 at 05:19:41PM -0700, Stefan Hajnoczi wrote: >> On Mon, May 30, 2016 at 06:25:58PM -0700, Stefan Hajnoczi wrote: >> > v2: >> > * Simplify s->rq live migration [Paolo] >> > * Use more efficient bitmap ops for batch

Re: [Qemu-devel] [RFC v2 PATCH 11/13] target-arm: Generate fences in ARMv7 frontend

2016-06-04 Thread Pranith Kumar
On Thu, Jun 2, 2016 at 3:37 PM, Sergey Fedorov wrote: > On 31/05/16 21:39, Pranith Kumar wrote: >> Signed-off-by: Pranith Kumar >> Signed-off-by: Richard Henderson >> --- >> target-arm/translate.c | 7 +-- >> 1 file changed, 5 insertions(+), 2 deletions(-) >> >> diff --git a/target-arm/tran

Re: [Qemu-devel] [RFC v3 00/19] Base enabling patches for MTTCG

2016-06-04 Thread Pranith Kumar
Hi Alex, On Fri, Jun 3, 2016 at 4:40 PM, Alex Bennée wrote: > This is the third iteration of the RFC patch set which aims to provide > the basic framework for MTTCG. There have been some considerable > changes since the last extensive review (thanks to all the reviewers). > >- many updates to

[Qemu-devel] [Bug 1588328] Re: Qemu 2.6 Solaris 9 Sparc Segmentation Fault

2016-06-04 Thread Mark Cave-Ayland
If you can verify that the media is correct and you still see problems, I'd be interested to take a look if you are able to provide me a copy of the media for debugging. -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.lau

[Qemu-devel] [Bug 833658] Re: Qemu ppc does not boot Debian 3.1r8

2016-06-04 Thread Mark Cave-Ayland
FWIW the text becomes visible again if you switch QEMU to 8-bit mode rather than 32-bit mode, e.g. adding -g 800x600x8 to the command line. -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/833658 Title:

[Qemu-devel] [Bug 833658] Re: Qemu ppc does not boot Debian 3.1r8

2016-06-04 Thread Mark Cave-Ayland
Just to add here: from my local tests with other older images, the text is there on the black screen but just extremely faint. My guess is that it's an endian-related bug in OpenBIOS programming the VGA registers but haven't had much time to dig into it. -- You received this bug notification beca

[Qemu-devel] [Bug 1581796] Re: console-gl.c:96:surface_gl_create_texture:code should not be reached

2016-06-04 Thread luigiburdo
here is the result qemu-2.5.1.1/i386-softmmu$ ./qemu-system-i386 -display sdl,gl=on Pixel format = 0x20020888 ** ERROR:ui/console-gl.c:96:surface_gl_create_texture: code should not be reached Aborted (core dumped) In case is needed this is my ldd linux-vdso32.so.1 => (0x0010) libv

[Qemu-devel] [Bug 1581796] Re: console-gl.c:96:surface_gl_create_texture:code should not be reached

2016-06-04 Thread luigiburdo
Will report soon -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1581796 Title: console-gl.c:96:surface_gl_create_texture:code should not be reached Status in QEMU: New Bug description: Facing

[Qemu-devel] [Bug 1555076] Re: Qemu 2.5 dont start with sdl, gl=on or gtk, gl=on

2016-06-04 Thread luigiburdo
Sorry T, i forget had been reported and duplicate the bug report. can merge or close this one. i will check with your suggestion and report. -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1555076 Ti

Re: [Qemu-devel] [PATCH v3 1/2] target-i386: KVM: add basic Intel LMCE support

2016-06-04 Thread Boris Petkov
Haozhong Zhang wrote: >This patch adds the support to inject SRAR and SRAO as LMCE, i.e. they >will be injected to only one VCPU rather than broadcast to all >VCPUs. As KVM reports LMCE support on Intel platforms, this features is >only available on Intel platforms. > >Signed-off-by: Ashok Raj >

Re: [Qemu-devel] [PATCH v3 1/2] target-i386: KVM: add basic Intel LMCE support

2016-06-04 Thread Boris Petkov
Haozhong Zhang wrote: >This patch adds the support to inject SRAR and SRAO as LMCE, i.e. they >will be injected to only one VCPU rather than broadcast to all >VCPUs. As KVM reports LMCE support on Intel platforms, this features is >only available on Intel platforms. > >Signed-off-by: Ashok Raj >

[Qemu-devel] [Bug 1588473] Re: Qemu Mate 16.10 and Gtk dont build

2016-06-04 Thread T. Huth
I think this should be fixed with this commit here: http://git.qemu.org/?p=qemu.git;a=commitdiff;h=bb732ee78cee8688e74b0f67ff8 If possible, please give it a try! -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.n

[Qemu-devel] What should qemu do when ACPI's OST event happen.

2016-06-04 Thread Ren Kimura
When user add new DIMM to memory slot by using qemu hotplug function, under ACPI mode, SCI interrupt will happen and then guest OS may issue _OST event 0x01. Is it correct? And in such moment, what should QEMU do? (i.e. What does the comment "/* TODO: handle device insert OST event */" in acpi_memo

[Qemu-devel] [Bug 1555076] Re: Qemu 2.5 dont start with sdl, gl=on or gtk, gl=on

2016-06-04 Thread T. Huth
Is this the same issue as the bug reported here: https://bugs.launchpad.net/qemu/+bug/1581796 ? -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1555076 Title: Qemu 2.5 dont start with sdl,gl=on or gt

[Qemu-devel] [Bug 1581796] Re: console-gl.c:96:surface_gl_create_texture:code should not be reached

2016-06-04 Thread T. Huth
Could you please add a printf("Pixel format = 0x%x\n", surface->format); in front of the g_assert_not_reached() in that function, and report which value is printed when you run it again? -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QE

[Qemu-devel] [Bug 1399939] Re: Qemu build with -faltivec and maltivec support in

2016-06-04 Thread T. Huth
Closing this ticket since adding CPPFLAGS to configure is possible. ** Changed in: qemu Status: New => Invalid -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1399939 Title: Qemu build with -

[Qemu-devel] [Bug 1568356] Re: ERROR:ui/sdl2-2d.c:120:sdl2_2d_switch:

2016-06-04 Thread T. Huth
Looking at the changelog, the patch has been pull in yesterday: http://git.qemu.org/?p=qemu.git;a=commitdiff;h=435deffefbb07d9a0cafef4 So marking this bug as fixed. ** Changed in: qemu Status: New => Fix Committed -- You received this bug notification because you are a member of qemu- dev

Re: [Qemu-devel] [PATCH 3/3] ppc: fix hrfid, tlbia and slbia privilege

2016-06-04 Thread Thomas Huth
On 03.06.2016 14:11, Cédric Le Goater wrote: > commit 74693da98894 ('ppc: tlbie, tlbia and tlbisync are HV only') > introduced some extra checks on the instruction privilege. slbia was > changed wrongly and hrfid, tlbia were forgotten. > > Signed-off-by: Cédric Le Goater > --- > target-ppc/trans

[Qemu-devel] [PATCH v2 0/6] Drop the qemu_char_get_next_serial function

2016-06-04 Thread xiaoqiang zhao
This patch series's main idea is to drop the use of qemu_char_get_next_serial. patches 1-5 QOM'ify the related device model and the affected board code. Most of them are arm related. The patch 6 get rid of the function from the code base. I only test the code with ARM versatilepb machine. The oth

[Qemu-devel] [PATCH v2 6/6] char: get rid of qemu_char_get_next_serial

2016-06-04 Thread xiaoqiang zhao
since there is no user of qemu_char_get_next_serial any more, it's time to let it go away. Acked-by: Paolo Bonzini Signed-off-by: xiaoqiang zhao --- include/sysemu/char.h | 1 - qemu-char.c | 16 2 files changed, 17 deletions(-) diff --git a/include/sysemu/char.h b/

[Qemu-devel] [PATCH v2 1/6] hw/char: QOM'ify pl011 model

2016-06-04 Thread xiaoqiang zhao
* drop qemu_char_get_next_serial and use chardev prop * add pl011_create wrapper function to create pl011 uart device * change affected board code to use the new way Signed-off-by: xiaoqiang zhao --- hw/arm/bcm2835_peripherals.c | 16 +++--- hw/arm/highbank.c| 3 ++- hw/arm/

[Qemu-devel] [PATCH v2 5/6] hw/char: QOM'ify xilinx_uartlite model

2016-06-04 Thread xiaoqiang zhao
* drop qemu_char_get_next_serial and use chardev prop * create xilinx_uartlite_create wrapper function to create xilinx_uartlite device * change affected board code to use the new way Signed-off-by: xiaoqiang zhao --- hw/char/xilinx_uartlite.c| 10 + hw/microblaze/petal

[Qemu-devel] [PATCH v2 2/6] hw/char: QOM'ify cadence_uart model

2016-06-04 Thread xiaoqiang zhao
* drop qemu_char_get_next_serial and use chardev prop * create cadence_uart_create wrapper function to create cadence_uart_device * change affected board code to use the new way Signed-off-by: xiaoqiang zhao --- hw/arm/xilinx_zynq.c | 5 +++-- hw/arm/xlnx-zynqmp.c | 1 +

[Qemu-devel] [PATCH v2 4/6] hw/char: QOM'ify stm32f2xx_usart model

2016-06-04 Thread xiaoqiang zhao
* drop qemu_char_get_next_serial and use chardev prop * change affected board code to use the new way Signed-off-by: xiaoqiang zhao --- hw/arm/stm32f205_soc.c| 1 + hw/char/stm32f2xx_usart.c | 15 +++ 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/hw/arm/stm32f2

[Qemu-devel] [PATCH v2 3/6] hw/char: QOM'ify digic-uart model

2016-06-04 Thread xiaoqiang zhao
* drop qemu_char_get_next_serial and use chardev prop * change affected board code to use the new way Signed-off-by: xiaoqiang zhao --- hw/arm/digic.c | 2 ++ hw/char/digic-uart.c | 10 ++ 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/hw/arm/digic.c b/hw/arm/digic

[Qemu-devel] [PATCH 2/2] tcg/i386: Use segment for 32-bit guest base on linux

2016-06-04 Thread Richard Henderson
From: Richard Henderson This saves 3 bytes per memory operation. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.inc.c | 44 +--- 1 file changed, 37 insertions(+), 7 deletions(-) diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i386/tcg-target.inc.

[Qemu-devel] [PATCH 1/2] tcg/i386: Reserve register for guest_base if a segment isn't available

2016-06-04 Thread Richard Henderson
This saves 2 insns and 10 bytes from the implementation of each memory operation. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.inc.c | 143 +- 1 file changed, 66 insertions(+), 77 deletions(-) diff --git a/tcg/i386/tcg-target.inc.c b/tcg/i

[Qemu-devel] [PATCH 0/2] tcg/i386 guest_base improvements

2016-06-04 Thread Richard Henderson
The first change does two things: (1) improve bsd-user so that it doesn't continually reload guest_base into a temp register and (2) extract the bulk of the guest_base logic to a routine that is run once at startup. The second change adds segmentation support to 32-bit linux. There, if we're usin

Re: [Qemu-devel] [PATCH 0/6] Drop the qemu_char_get_next_serial function

2016-06-04 Thread xiaoqiang zhao
> 在 2016年6月4日,02:24,Peter Maydell 写道: > >> On 25 May 2016 at 11:58, xiaoqiang zhao wrote: >> This patch series's main idea is to drop the use of >> qemu_char_get_next_serial. patches 1-5 QOM'ify the related >> device model and the affected board code. Most of them >> are arm related. The patch

Re: [Qemu-devel] [PATCH] e1000e: Fix build with ust trace backend

2016-06-04 Thread Dmitry Fleytman
> On 3 Jun 2016, at 16:47 PM, Peter Maydell wrote: > > On 3 June 2016 at 12:03, Peter Maydell wrote: >> Thanks, applied to master as a build fix. > > ...which reveals another build issue: > > https://travis-ci.org/qemu/qemu/jobs/135006245 > > hw/net/e1000e.c: In function ‘e1000e_io_write’: >

[Qemu-devel] [PATCH] e1000e: Fix build with gcc 4.6.3 and ust tracing

2016-06-04 Thread Dmitry Fleytman
This patch fixes used-uninitialized false positive while compiling with ust tracing backend plus gcc 4.6.3: hw/net/e1000e.c: In function ‘e1000e_io_write’: hw/net/e1000e.c:170:39: error: ‘idx’ may be used uninitialized in this function [-Werror=uninitialized] hw/net/e1000e.c: In function ‘e1000e_