On 02/05/2016 11:58 AM, Vladimir Sementsov-Ogievskiy wrote:
The new feature for qcow2: storing bitmaps.
This patch adds new header extension to qcow2 - Bitmaps Extension. It
provides an ability to store virtual disk related bitmaps in a qcow2
image. For now there is only one type of such bitmaps
There is a possibility to hit an assert in qcow2_get_specific_info that
s->qcow_version is undefined. This happens when VM in starting from
suspended state, i.e. it processes incoming migration, and in the same
time 'info block' is called.
The problem is that qcow2_invalidate_cache() closes the im
There is a possibility to hit an assert in qcow2_get_specific_info that
s->qcow_version is undefined. This happens when VM in starting from
suspended state, i.e. it processes incoming migration, and in the same
time 'info block' is called.
The problem is that qcow2_invalidate_cache() closes the im
There is a possibility to hit an assert in qcow2_get_specific_info that
s->qcow_version is undefined. This happens when VM in starting from
suspended state, i.e. it processes incoming migration, and in the same
time 'info block' is called.
The problem is that qcow2_invalidate_cache() closes the im
On Thu, Feb 11, 2016 at 07:34:52PM +0200, Marcel Apfelbaum wrote:
> On 02/11/2016 06:30 PM, Michael S. Tsirkin wrote:
> >On Thu, Feb 11, 2016 at 04:16:05PM +0100, Igor Mammedov wrote:
> >>On Tue, 9 Feb 2016 14:17:44 +0200
> >>"Michael S. Tsirkin" wrote:
> >>
> >>>On Tue, Feb 09, 2016 at 11:46:08AM
On Thu, Feb 11, 2016 at 04:53:40PM +, Dr. David Alan Gilbert wrote:
> * Greg Kurz (gk...@linux.vnet.ibm.com) wrote:
> > On Mon, 08 Feb 2016 16:59:47 +0100
> > Greg Kurz wrote:
> > > Since QEMU 2.4, we have a configuration section in the migration stream.
> > > This must be skipped for older ma
On 02/12/2016 03:01 AM, Bastian Koppelmann wrote:
+static inline void
+generate_trap(DisasContext *ctx, int class, int tin)
+{
+TCGv_i32 classtemp = tcg_const_i32(class);
+gen_save_pc(ctx->pc);
+/* upper context cannot be saved, if the context list is empty */
+if (class != TRAPC_
On 02/12/2016 03:01 AM, Bastian Koppelmann wrote:
Add the infrastructure needed to generate and handle traps.
Signed-off-by: Bastian Koppelmann
---
target-tricore/cpu-qom.h | 2 +-
target-tricore/cpu.c | 2 +-
target-tricore/cpu.h | 1 +
target-tricore/helper.c| 52 +++
Hi
On Mon, Jan 11, 2016 at 10:13 AM, Paolo Bonzini wrote:
>
>
> On 11/01/2016 09:33, Michael Tokarev wrote:
>> 11.12.2015 14:29, Ashley Jonathan wrote:
>>> I have experienced a minor difficulty using QEMU with the "-serial pty"
>>> option:
>>>
>>> If a process opens the slave pts device, writes
On Thu, Feb 11, 2016 at 01:47:21PM +0100, Thomas Huth wrote:
> This hypercall either initializes a page with zeros, or copies
> another page.
> According to LoPAPR, the i-cache of the page should also be
> flushed if using H_ICACHE_INVALIDATE or H_ICACHE_SYNCHRONIZE,
> and the d-cache should be syn
On Thu, Feb 11, 2016 at 01:47:17PM +0100, Thomas Huth wrote:
> While we were recently debugging a problem with the H_SET_DABR
> call [1], I noticed that some hypercalls from the chapter 14.5.4.3
> ("Processor Register Hypervisor Resource Access") from the LoPAPR
> spec [2] are still missing in QEMU
On 02/10/2016 11:40 AM, Daniel P. Berrange wrote:
> The QMP monitor code has two helper methods object_add
> and qmp_object_del that are called from several places
> in the code (QMP, HMP and main emulator startup).
>
> The HMP and main emulator startup code also share
> further logic that extract
Generate an ACPI DSDT node for fw_cfg on pc and arm guests.
New since v7:
- edited commit blurb on 3/5 to match updated content, i.e. that
the ACPI node is now inserted into the DSDT (no longer the SSDT).
(Thanks to Igor Mammedov for catching that!)
Thanks,
--Gabrie
Signed-off-by: Gabriel Somlo
Reviewed-by: Laszlo Ersek
Reviewed-by: Marc Marí
---
docs/specs/fw_cfg.txt | 9 +
1 file changed, 9 insertions(+)
diff --git a/docs/specs/fw_cfg.txt b/docs/specs/fw_cfg.txt
index 2099ad9..5414140 100644
--- a/docs/specs/fw_cfg.txt
+++ b/docs/specs/fw_cfg.tx
Add a fw_cfg device node to the ACPI DSDT. This is mostly
informational, as the authoritative fw_cfg MMIO region(s)
are listed in the Device Tree. However, since we are building
ACPI tables, we might as well be thorough while at it...
Signed-off-by: Gabriel Somlo
Reviewed-by: Laszlo Ersek
Tested
Move BIOS_CFG_IOPORT define from pc.c to pc.h, and rename
it to FW_CFG_IO_BASE.
Cc: Marc Marí
Signed-off-by: Gabriel Somlo
Reviewed-by: Laszlo Ersek
Reviewed-by: Marc Marí
---
hw/i386/pc.c | 5 ++---
include/hw/i386/pc.h | 2 ++
2 files changed, 4 insertions(+), 3 deletions(-)
diff -
Expose the size of the control register (FW_CFG_CTL_SIZE) in fw_cfg.h.
Add comment to fw_cfg_io_realize() pointing out that since the
8-bit data register is always subsumed by the 16-bit control
register in the port I/O case, we use the control register width
as the *total* width of the (classic, n
Add a fw_cfg device node to the ACPI DSDT. While the guest-side
firmware can't utilize this information (since it has to access
the hard-coded fw_cfg device to extract ACPI tables to begin with),
having fw_cfg listed in ACPI will help the guest kernel keep a more
accurate inventory of in-use IO por
On 11/02/2016 14:44, Andrey Smetanin wrote:
> VMBus hypercall codes inside Hyper-V UAPI header will
> be used by QEMU to implement VMBus host devices support.
>
> Signed-off-by: Andrey Smetanin
> Acked-by: K. Y. Srinivasan
> Reviewed-by: Roman Kagan
> CC: Gleb Natapov
> CC: Paolo Bonzini
>
Stefan Hajnoczi writes:
> On Tue, Feb 09, 2016 at 09:24:04PM +0100, Lluís Vilanova wrote:
>> While starting the softmmu version of QEMU, the simple backend waits for the
>> writeout thread to signal a condition variable when initializing the output
>> file
>> path. But since the writeout thread h
On 11/02/2016 17:33, Michael S. Tsirkin wrote:
>> They won't start unless the QEMU command-line is changed, because
>> they are using a feature QEMU won't support anymore. Why is that
>> a problem?
>
> We don't support installing one machine type, then switching.
Uhm, we definitely support peop
On 11/02/2016 17:33, Michael S. Tsirkin wrote:
>> They won't start unless the QEMU command-line is changed, because
>> they are using a feature QEMU won't support anymore. Why is that
>> a problem?
>
> We don't support installing one machine type, then switching.
Uhm, we definitely support peop
On 10.02.2016 14:08, Daniel P. Berrange wrote:
> On Wed, Feb 10, 2016 at 01:45:22PM +0100, Samuel Thibault wrote:
>> Thomas Huth, on Wed 10 Feb 2016 12:39:10 +0100, wrote:
+if (!vprefix6) {
+vprefix6 = "fec0::";
>>>
>>> Site-local prefixes have already been deprecated (see rfc
From: "Alexey V. Kostyushko"
With Hyper-V enabled CPU hotplug stops working. The CPU appears in device
manager on Windows but does not appear in peformance monitor and control
panel.
The root of the problem is the following. Windows checks
HV_X64_CPU_DYNAMIC_PARTITIONING_AVAILABLE bit in CPUID.
On Fri, Feb 05, 2016 at 09:51:07AM +0200, Marcel Apfelbaum wrote:
> On 02/05/2016 09:49 AM, Markus Armbruster wrote:
> >"Michael S. Tsirkin" writes:
> >
> >>On Thu, Feb 04, 2016 at 12:55:22PM +0100, Paolo Bonzini wrote:
> >>>
> >>>
> >>>On 04/02/2016 12:41, Andreas Färber wrote:
> You're talki
On Thu, Feb 11, 2016 at 08:49:25PM +0200, Marcel Apfelbaum wrote:
> On 02/11/2016 08:31 PM, Eduardo Habkost wrote:
> >On Mon, Feb 08, 2016 at 01:54:29PM +0200, Marcel Apfelbaum wrote:
> >>Commit e1ce0c3cb(vl.c: fix regression when reading machine type from config
> >>file)
> >>fixed the error mess
The SRS instruction is:
* UNDEFINED in Hyp mode
* UNPREDICTABLE in User or System mode
* UNPREDICTABLE if the specified mode isn't accessible
* trapped to EL3 if EL3 is AArch64 and we are at Secure EL1
Clean up the code to handle all these cases cleanly, including
picking UNDEF as our choice o
The SRS instruction is a bit of an oddity because it isn't
used by Linux these days. Nonetheless it has a bunch of
UNPREDICTABLE, UNDEF and trapping behaviour that we weren't
correctly implementing:
- trap to EL3 if EL3 is AArch64 and we are at Secure EL1
- UNDEFINED in Hyp mode
- UNPREDICTABLE
Make get_r13_banked() raise an exception at runtime for the
corner case of SRS from System mode, so that we can UNDEF it;
this brings us in to line with the ARM ARM's set of permitted
CONSTRAINED UNPREDICTABLE choices.
Signed-off-by: Peter Maydell
---
target-arm/op_helper.c | 8
target-
I can confirm that building QEMU 2.5.0 from source, all the multi-thread
issues seem to be fixed.
Specifically, the mentioned dotprod_mutex.c example, even when modified
to use 100 threads, is always running in the qemu-arm User mode
emulator.
Tested in Ubuntu 14.04 x86_64, with all the updates i
The user-mode versions of get/set_r13_banked() exist just to assert
if they're ever called -- the translate time code should never
emit calls to them because SRS from user mode always UNDEF.
There's no code in the softmmu versions that can't compile in
CONFIG_USER_ONLY, so combine the two functions
Move get/set_r13_banked() from helper.c to op_helper.c. This will
let us add exception-raising code to them, and also puts them
in the same file as get/set_user_reg(), which makes some conceptual
sense.
(The original reason for the helper.c/op_helper.c split was that
only op_helper.c had access to
On 02/11/2016 08:31 PM, Eduardo Habkost wrote:
On Mon, Feb 08, 2016 at 01:54:29PM +0200, Marcel Apfelbaum wrote:
Commit e1ce0c3cb(vl.c: fix regression when reading machine type from config
file)
fixed the error message when the machine type was supplied inside the
config file. However now the o
On Mon, Feb 08, 2016 at 01:54:29PM +0200, Marcel Apfelbaum wrote:
> Commit e1ce0c3cb(vl.c: fix regression when reading machine type from config
> file)
> fixed the error message when the machine type was supplied inside the
> config file. However now the option name is not displayed correctly if
>
Eric Blake, on Thu 11 Feb 2016 10:56:30 -0700, wrote:
> On 02/10/2016 02:20 AM, Samuel Thibault wrote:
> > Thomas Huth, on Wed 10 Feb 2016 09:42:04 +0100, wrote:
> >> On 08.02.2016 11:28, Samuel Thibault wrote:
> >>> Signed-off-by: Guillaume Subiron
> >>> Signed-off-by: Samuel Thibault
> >>> ---
On 02/10/2016 02:20 AM, Samuel Thibault wrote:
> Thomas Huth, on Wed 10 Feb 2016 09:42:04 +0100, wrote:
>> On 08.02.2016 11:28, Samuel Thibault wrote:
>>> Signed-off-by: Guillaume Subiron
>>> Signed-off-by: Samuel Thibault
>>> ---
>>> slirp/tcp_input.c | 99
>>> +++-
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
On 11/02/2016 17:49, Dimitris Aragiorgis wrote:
>> Perhaps when the logfile is opened you can replace the straight
>> fopen with
>>
>> qemu_logfile = fopen(...); if (daemonized) {
>> dup2(fileno(qemu_logfile), STDERR_FILENO); fclose(qemu_logfile)
Dear Sir,
I am looking for help regarding address translation in user mode emulation.
I intend to grab the address from where a function is called after its
original address from ".exe" is translated.
For Example, in my sample program when a certain function is called 30
times, that is called fr
On 02/11/2016 06:30 PM, Michael S. Tsirkin wrote:
On Thu, Feb 11, 2016 at 04:16:05PM +0100, Igor Mammedov wrote:
On Tue, 9 Feb 2016 14:17:44 +0200
"Michael S. Tsirkin" wrote:
On Tue, Feb 09, 2016 at 11:46:08AM +0100, Igor Mammedov wrote:
So the linker interface solves this rather neatly:
bio
On Thu, Feb 11, 2016 at 06:33:14PM +0200, Michael S. Tsirkin wrote:
> On Thu, Feb 11, 2016 at 01:51:30PM -0200, Eduardo Habkost wrote:
> > On Sat, Feb 06, 2016 at 08:34:07PM +0200, Michael S. Tsirkin wrote:
> > > On Fri, Feb 05, 2016 at 12:46:11PM -0200, Eduardo Habkost wrote:
> > > > On Fri, Feb 0
On 11 February 2016 at 12:18, Michael Tokarev wrote:
> Here's yet another trivial-patches pull request. There aren't many
> patches in there this time, even if the previous pull request was
> quite some time ago.
>
> Speaking of the pull requests. Maybe it is better to use the
> same tag all the
Dear Eric,
Eric Blake writes:
>>> tr '\n' '\t' \
>>> | sed -e
>>> 's/{\s*"timestamp":\s*{[^}]*},\s*"event":[^,}]*\(,\s*"data":\s*{[^}]*}\)\?\s*}\s*//g'
>>> \
>>> | tr '\t' '\n'
>>
>> Nice trick. Why didn't I come up with it? ;)
>
> Mishandles any event whose data includes nested dicts. But
* Greg Kurz (gk...@linux.vnet.ibm.com) wrote:
> On Mon, 08 Feb 2016 16:59:47 +0100
> Greg Kurz wrote:
> > Since QEMU 2.4, we have a configuration section in the migration stream.
> > This must be skipped for older machines, like it is already done for x86.
> >
>
> Ouch ! It is more complex than
Hi,
* Paolo Bonzini [2016-02-11 13:31:17 +0100]:
>
>
> On 11/02/2016 13:12, Dimitris Aragiorgis wrote:
> > Besides that, when one executes a daemon, shell redirection is
> > hardly, if ever, used. More so if the daemon already has a logfile
> > option.
> >
> > So, we decided to give it a go a
On Thu, Feb 11, 2016 at 01:51:30PM -0200, Eduardo Habkost wrote:
> On Sat, Feb 06, 2016 at 08:34:07PM +0200, Michael S. Tsirkin wrote:
> > On Fri, Feb 05, 2016 at 12:46:11PM -0200, Eduardo Habkost wrote:
> > > On Fri, Feb 05, 2016 at 12:14:16AM +0200, Michael S. Tsirkin wrote:
> > > > On Thu, Feb 0
Alvise Rigo writes:
> The new helpers rely on the legacy ones to perform the actual read/write.
>
> The LoadLink helper (helper_ldlink_name) prepares the way for the
> following StoreCond operation. It sets the linked address and the size
> of the access. The LoadLink helper also updates the TLB
Dear Markus,
Markus Armbruster writes:
> Sascha Silbe writes:
>
>> Sort the alias table by typename so it's easier to see which aliases
>> exist.
[...]
[qdev-monitor.c]
>
> Suggest to add
>
>/* Please keep this table sorted */
Good idea. I've amended the following locally:
/* Please k
On Thu, Feb 11, 2016 at 04:16:05PM +0100, Igor Mammedov wrote:
> On Tue, 9 Feb 2016 14:17:44 +0200
> "Michael S. Tsirkin" wrote:
>
> > On Tue, Feb 09, 2016 at 11:46:08AM +0100, Igor Mammedov wrote:
> > > > So the linker interface solves this rather neatly:
> > > > bios allocates memory, bios pass
Correct some corner cases we were getting wrong for
CNTFRQ access rights:
* should UNDEF from 32-bit Secure EL1
* only writable from the highest implemented exception level,
which might not be EL1 now
To clarify the code, provide a new utility function
arm_highest_el() which returns the highe
Implement trapping of the "debug ROM" registers, which are controlled
by MDCR_EL2.TDRA for EL2 but by the more general MDCR_EL3.TDA for EL3.
Signed-off-by: Peter Maydell
Reviewed-by: Sergey Fedorov
---
target-arm/helper.c | 27 ---
1 file changed, 24 insertions(+), 3 del
We weren't quite implementing the handling of SCR.SMD correctly.
The condition governing whether the SMD bit should apply only
for NS state is "is EL3 is AArch32", not "is the current EL AArch32".
Fix the condition, and clarify the comment both to reflect this and
to expand slightly on what's going
If access to FPEXC32_EL2 is trapped by CPTR_EL2.TFP or CPTR_EL3.TFP,
this should be reported with a syndrome register indicating an
FP access trap, not one indicating a system register access trap.
Signed-off-by: Peter Maydell
Reviewed-by: Sergey Fedorov
---
target-arm/cpu.h | 5 +
t
Implement the traps to EL2 and EL3 controlled by the bits
MDCR_EL2.TDOSA MDCR_EL3.TDOSA. These can configurably trap
accesses to the "powerdown debug" registers.
Signed-off-by: Peter Maydell
Reviewed-by: Sergey Fedorov
---
target-arm/cpu.h| 12
target-arm/helper.c | 23
This patchset fixes or implements a lot of traps to EL3 as
listed in the ARM ARM section D1.15.4 "EL3 configurable controls".
Most of the rest we already had implemented.
NB: where the trap I was implementing for EL3 had an
obvious equivalent in EL2 I included the EL2 check in this
series, but I h
On Thu, Feb 11, 2016 at 04:19:59PM +0100, Igor Mammedov wrote:
> On Wed, 10 Feb 2016 15:41:38 -0500
> "Gabriel L. Somlo" wrote:
>
> > Add a fw_cfg device node to the ACPI SSDT. While the guest-side
> > firmware can't utilize this information (since it has to access
> > the hard-coded fw_cfg devic
Dear Conny,
Cornelia Huck writes:
> On Thu, 11 Feb 2016 10:01:35 +0100
> Markus Armbruster wrote:
>
>> Sascha Silbe writes:
>
>> > This leaves out
>> > virtio-{gpu,input,input-hid,input-host,keyboard,mouse,tablet} because
>> > they're currently only implemented using PCI, so there's no immedia
On Fri, Feb 05, 2016 at 05:14:41PM +0100, Igor Mammedov wrote:
> On Fri, 5 Feb 2016 13:28:31 -0200
> Eduardo Habkost wrote:
>
> > On Thu, Feb 04, 2016 at 12:47:32PM +0100, Igor Mammedov wrote:
> > > do not assume that all lapics in range 0..apic_id_limit
> > > are valid and do not create lapic en
Implement the debug register traps controlled by MDCR_EL2.TDA
and MDCR_EL3.TDA.
Signed-off-by: Peter Maydell
Reviewed-by: Sergey Fedorov
---
target-arm/helper.c | 39 ++-
1 file changed, 30 insertions(+), 9 deletions(-)
diff --git a/target-arm/helper.c b/tar
Signed-off-by: Bastian Koppelmann
---
target-tricore/translate.c | 175 -
1 file changed, 156 insertions(+), 19 deletions(-)
diff --git a/target-tricore/translate.c b/target-tricore/translate.c
index 775d4c6..83e0927 100644
--- a/target-tricore/transla
On 11.02.2016 19:03, Peter Maydell wrote:
> Correct some corner cases we were getting wrong for
> CNTFRQ access rights:
> * should UNDEF from 32-bit Secure EL1
> * only writable from the highest implemented exception level,
>which might not be EL1 now
>
> To clarify the code, provide a new ut
Add the infrastructure needed to generate and handle traps.
Signed-off-by: Bastian Koppelmann
---
target-tricore/cpu-qom.h | 2 +-
target-tricore/cpu.c | 2 +-
target-tricore/cpu.h | 1 +
target-tricore/helper.c| 52 +++
target-tricore/helper.h
Signed-off-by: Bastian Koppelmann
---
target-tricore/op_helper.c | 27 ---
1 file changed, 24 insertions(+), 3 deletions(-)
diff --git a/target-tricore/op_helper.c b/target-tricore/op_helper.c
index fbe2be0..d7aafd1 100644
--- a/target-tricore/op_helper.c
+++ b/target-tri
On Fri, Feb 05, 2016 at 05:44:49PM +0100, Igor Mammedov wrote:
> On Fri, 5 Feb 2016 17:19:50 +0100
> Igor Mammedov wrote:
>
> > On Fri, 5 Feb 2016 13:39:07 -0200
> > Eduardo Habkost wrote:
> >
> > > On Thu, Feb 04, 2016 at 12:47:33PM +0100, Igor Mammedov wrote:
> > > > cpu->found_cpus bitmap
If an instruction uses a 64 bit register which consists of an even-odd pair
of 32 bit registers and if the register specifier in the instruction is
odd an opd trap is raised.
Signed-off-by: Bastian Koppelmann
---
target-tricore/translate.c | 285 +++--
1 f
Exceptions that can occur during CSA operations need the PC as
the return address of the exception.
Signed-off-by: Bastian Koppelmann
---
target-tricore/translate.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/target-tricore/translate.c b/target-tricore/translate.c
index 7
Hi,
this series add the infrastructure to generate and handle tricore exceptions
and adds three types of exceptions (context management,illegal opcodes, and
register-pair) which I tested so far. However more patches will follow that add
the missing exceptions that make sense to QEMU.
Cheers,
Bast
On Sat, Feb 06, 2016 at 08:34:07PM +0200, Michael S. Tsirkin wrote:
> On Fri, Feb 05, 2016 at 12:46:11PM -0200, Eduardo Habkost wrote:
> > On Fri, Feb 05, 2016 at 12:14:16AM +0200, Michael S. Tsirkin wrote:
> > > On Thu, Feb 04, 2016 at 05:09:44PM -0200, Eduardo Habkost wrote:
> > > > On Thu, Feb 0
On Tue, Feb 09, 2016 at 07:49:05PM +0300, Denis V. Lunev wrote:
> we should call trace_init_backends() before trace_init_file() for
> CONFIG_TRACE_SIMPLE There is no difference for other cases.
>
> This problem was introduced by the commit
> commit 41fc57e44ed64cd4ab5393d83624afd897dabd4f
>
How to set cache.direct = on if using aio=native with qemu 2.3
while mounting with nbd
executing 'info mtree' from monitor prompt causes infinite loop
printing it over and over.
to reproduce build current master adn run:
qemu-system-x86_64 -monitor stdio
and then execute 'info mtree' in monitor prompt
Also on quickly connecting to the ports via the netcat tool (hoping that it
would make qemu to change its state from disconnected)
I see the following error "Error in getpeername: Transport endpoint is not
connected"
pharidos@uks2:~/$ qemu-system-x86_64 --enable-kvm -hda Sisk.qcow2 -serial
teln
On Wed, 10 Feb 2016 15:41:38 -0500
"Gabriel L. Somlo" wrote:
> Add a fw_cfg device node to the ACPI SSDT. While the guest-side
> firmware can't utilize this information (since it has to access
> the hard-coded fw_cfg device to extract ACPI tables to begin with),
> having fw_cfg listed in ACPI wil
On Tue, Feb 09, 2016 at 09:24:04PM +0100, Lluís Vilanova wrote:
> While starting the softmmu version of QEMU, the simple backend waits for the
> writeout thread to signal a condition variable when initializing the output
> file
> path. But since the writeout thread has not been created, it just wa
On Tue, 9 Feb 2016 14:17:44 +0200
"Michael S. Tsirkin" wrote:
> On Tue, Feb 09, 2016 at 11:46:08AM +0100, Igor Mammedov wrote:
> > > So the linker interface solves this rather neatly:
> > > bios allocates memory, bios passes memory map to guest.
> > > Served us well for several years without need
Hi
Probably due to my less then stellar patch to mail handling i think this
patch got forgotten. I think its ok to resend.
The patch itself is unchanged. It should incorperate all sugestions but the
one of Peter due not beeing mainlined:
https://lists.gnu.org/archive/html/qemu-devel/2015-10/msg0
On 10 February 2016 at 19:37, John Snow wrote:
> The following changes since commit c9f19dff101e2c2cf3fa3967eceec2833e845e40:
>
> Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into
> staging (2016-02-09 19:34:46 +)
>
> are available in the git repository at:
>
> https:/
On Thu, Feb 11, 2016 at 04:52:42PM +0300, Pavel Dovgalyuk wrote:
> > From: Stefan Hajnoczi [mailto:stefa...@redhat.com]
> > On Wed, Feb 10, 2016 at 12:13:23PM +0300, Pavel Dovgalyuk wrote:
> > > @@ -784,7 +798,11 @@ BlockAIOCB *blk_aio_flush(BlockBackend *blk,
> > > return blk_abort_aio_re
Lluís Vilanova writes:
> The current code forces the use of a chain of ".original" dereferences,
> which looks odd.
> Signed-off-by: Lluís Vilanova
> ---
> scripts/tracetool/__init__.py|4 +---
> scripts/tracetool/format/events_h.py |4 ++--
> scripts/tracetool/format/tcg_h.py
> From: Stefan Hajnoczi [mailto:stefa...@redhat.com]
> On Wed, Feb 10, 2016 at 12:13:23PM +0300, Pavel Dovgalyuk wrote:
> > @@ -784,7 +798,11 @@ BlockAIOCB *blk_aio_flush(BlockBackend *blk,
> > return blk_abort_aio_request(blk, cb, opaque, -ENOMEDIUM);
> > }
> >
> > -return bdrv_a
On Wed, Feb 10, 2016 at 12:13:23PM +0300, Pavel Dovgalyuk wrote:
> @@ -784,7 +798,11 @@ BlockAIOCB *blk_aio_flush(BlockBackend *blk,
> return blk_abort_aio_request(blk, cb, opaque, -ENOMEDIUM);
> }
>
> -return bdrv_aio_flush(blk->bs, cb, opaque);
> +if (replay_mode == REPLAY
Currently we do not support Hyper-V hypercall continuation
so reject it.
Signed-off-by: Andrey Smetanin
Reviewed-by: Roman Kagan
CC: Gleb Natapov
CC: Paolo Bonzini
CC: Joerg Roedel
CC: "K. Y. Srinivasan"
CC: Haiyang Zhang
CC: Roman Kagan
CC: Denis V. Lunev
CC: qemu-devel@nongnu.org
---
a
The patch implements userspace exit 'KVM_EXIT_HYPERV'
for Hyper-V VMBus hypercalls(postmsg, signalevent)
to handle these hypercalls by QEMU.
Changes v3:
* use vcpu->arch.complete_userspace_io to setup hypercall
result
* rebase for 'next-20160211'
Changes v2:
* use KVM_EXI
The patch implements KVM_EXIT_HYPERV userspace exit
functionality for Hyper-V VMBus hypercalls:
HV_X64_HCALL_POST_MESSAGE, HV_X64_HCALL_SIGNAL_EVENT.
Changes v3:
* use vcpu->arch.complete_userspace_io to setup hypercall
result
Changes v2:
* use KVM_EXIT_HYPERV for hypercalls
Signed-off-by: Andre
Pass the return code from kvm_emulate_hypercall on to the caller,
in order to allow it to indicate to the userspace that
the hypercall has to be handled there.
Also adjust all the existing code paths to return 1 to make sure the
hypercall isn't passed to the userspace without setting kvm_run
appro
Rename HV_X64_HV_NOTIFY_LONG_SPIN_WAIT
by HV_X64_HCALL_NOTIFY_LONG_SPIN_WAIT. So
the name better reflects hypercall codes accessory.
Signed-off-by: Andrey Smetanin
Reviewed-by: Roman Kagan
CC: Gleb Natapov
CC: Paolo Bonzini
CC: Joerg Roedel
CC: "K. Y. Srinivasan"
CC: Haiyang Zhang
CC: Roman
VMBus hypercall codes inside Hyper-V UAPI header will
be used by QEMU to implement VMBus host devices support.
Signed-off-by: Andrey Smetanin
Acked-by: K. Y. Srinivasan
Reviewed-by: Roman Kagan
CC: Gleb Natapov
CC: Paolo Bonzini
CC: Joerg Roedel
CC: "K. Y. Srinivasan"
CC: Haiyang Zhang
CC:
Alvise Rigo writes:
> The excl_protected_range is a hwaddr range set by the VCPU at the
> execution of a LoadLink instruction. If a normal access writes to this
> range, the corresponding StoreCond will fail.
>
> Each architecture can set the exclusive range when issuing the LoadLink
> operation
You are right, the for loop with i < DIRTY_MEMORY_NUM works just fine.
Thank you,
alvise
On Thu, Feb 11, 2016 at 2:00 PM, Alex Bennée wrote:
>
> Alvise Rigo writes:
>
>> The purpose of this new bitmap is to flag the memory pages that are in
>> the middle of LL/SC operations (after a LL, before
Alvise Rigo writes:
> Add a new TLB flag to force all the accesses made to a page to follow
> the slow-path.
>
> The TLB entries referring guest pages with the DIRTY_MEMORY_EXCLUSIVE
> bit clean will have this flag set.
>
> Suggested-by: Jani Kokkonen
> Suggested-by: Claudio Fontana
> Signed-o
Alvise Rigo writes:
> Attempting to simplify the helper_*_st_name, wrap the code relative to a
> RAM access into an inline function.
>
> Based on this work, Alex proposed the following patch series
> https://lists.gnu.org/archive/html/qemu-devel/2016-01/msg01136.html
> that reduces code duplicat
Alvise Rigo writes:
> Attempting to simplify the helper_*_st_name, wrap the MMIO code into an
> inline function.
>
> Based on this work, Alex proposed the following patch series
> https://lists.gnu.org/archive/html/qemu-devel/2016-01/msg01136.html
> that reduces code duplication of the softmmu_h
Alvise Rigo writes:
> Attempting to simplify the helper_*_st_name, wrap the
> do_unaligned_access code into an inline function.
> Remove also the goto statement.
How are you generating your CC list? get_maintainer.pl shows Peter
Croshwaite (CC'ed) should also be CC'ed on these patches. If we wa
On 05/02/2016 14:56, Amit Shah wrote:
> Commit 8304402033e8dbe8e379017d51ed1dd8344f1dce changed the name of the
> e1000-82540em device to e1000. This was flagged:
>
>Section "e1000-82540em" does not exist in dest
>
> Add the mapping to the changed section names dictionary so the checker
>
> 22:38:24 +)
>
> are available in the git repository at:
>
> git://git.linaro.org/people/pmaydell/qemu-arm.git
> tags/pull-target-arm-20160211
>
> for you to fetch changes up to f0afa73164778570083504a185d7498884c68d65:
>
> bcm2835_property: implement
On 11 February 2016 at 12:46, Aurelio Remonda
wrote:
> On Fri, Feb 5, 2016 at 2:00 PM, Peter Maydell
> wrote:
>> The right way to do this is to set the MachineClass default_ram_size
>> to what you want your default value to be. Then you should calculate
>> the dc0 etc values to expose to the gue
Alvise Rigo writes:
> The purpose of this new bitmap is to flag the memory pages that are in
> the middle of LL/SC operations (after a LL, before a SC). For all these
> pages, the corresponding TLB entries will be generated in such a way to
> force the slow-path for all the VCPUs (see the follow
This hypercall either initializes a page with zeros, or copies
another page.
According to LoPAPR, the i-cache of the page should also be
flushed if using H_ICACHE_INVALIDATE or H_ICACHE_SYNCHRONIZE,
and the d-cache should be synchronized to the RAM if the
H_ICACHE_SYNCHRONIZE flag is used. For this
The H_SET_XDABR hypercall is similar to H_SET_DABR, but also sets
the extended DABR (DABRX) register.
Signed-off-by: Thomas Huth
---
hw/ppc/spapr_hcall.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 0004ca5..6e9b6be
According to LoPAPR, h_set_dabr should simply set DABRX to 3
(if the register is available), and load the parameter into DABR.
If DABRX is not available, the hypervisor has to check the
"Breakpoint Translation" bit of the DABR register first.
Signed-off-by: Thomas Huth
---
hw/ppc/spapr_hcall.c |
This is a very simple hypercall that only sets up the SPRG0
register for the guest (since writing to SPRG0 was only permitted
to the hypervisor in older versions of the PowerISA).
Signed-off-by: Thomas Huth
---
hw/ppc/spapr_hcall.c | 15 +--
1 file changed, 13 insertions(+), 2 deleti
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