Fix an issue with single-stepping branch likely instructions incorrectly
nullifying (in the next step) the instruction immediately following the
delay slot, when the branch is not taken.
The underlying cause of the issue is the MIPS_HFLAG_BL flag is cleared
when the branch is determined to be n
On 12/12/2014 08:38 PM, Alexey Kardashevskiy wrote:
> At the moment sPAPR only supports 512MB window for MMIO BARs. However
> modern devices might want bigger 64bit BARs.
>
> This extends MMIO window from 512MB to 62GB (aligned to
> SPAPR_PCI_WINDOW_SPACING) and advertises it in 2 records in
> the
On Fri, 2014-12-12 at 22:38 +0100, Peter Lieven wrote:
> Hi,
>
> we have a Cisco UCS infrastructure where we have fnic Fibre-Channel Adapters
> that we expose to guests. The UCS
> infrastruture allows to create virtual HBAs that can be exposed to a host so
> its possible to have quite a lot of t
Hi,
we have a Cisco UCS infrastructure where we have fnic Fibre-Channel Adapters
that we expose to guests. The UCS
infrastruture allows to create virtual HBAs that can be exposed to a host so
its possible to have quite a lot of them.
We ran into a strange issue when we started having more than
On 12/12/2014 09:31 AM, Bastian Koppelmann wrote:
> +#define MUL_H_OP(ARG00, ARG01, ARG10, ARG11)\
> +uint64_t helper_mulh_##ARG00 ##_##ARG01 ##_##ARG10 ##_##ARG11( \
> + CPUTriCoreState *env, target_ulong arg1, target_ulong arg2,\
> +
On 12/12/2014 09:31 AM, Bastian Koppelmann wrote:
> Fix gen_mtcr using wrong register.
> Fix gen_mtcr/mfcr using sign extended offsets.
> Fix B format insn using not sign extendend offsets.
>
> Signed-off-by: Bastian Koppelmann
> ---
Reviewed-by: Richard Henderson
r~
On 12/12/2014 09:31 AM, Bastian Koppelmann wrote:
> Some of the 1.6 ISA instructions were still missing. So let's add them.
>
> Signed-off-by: Bastian Koppelmann
Reviewed-by: Richard Henderson
r~
On 12/12/2014 09:31 AM, Bastian Koppelmann wrote:
> +uint32_t helper_parity(target_ulong r1)
> +{
> +uint32_t ret;
> +uint32_t nOnes, i;
> +
> +ret = 0;
> +nOnes = 0;
> +for (i = 0; i < 8; i++) {
> +ret ^= (r1 & 1);
> +r1 = r1 >> 1;
> +}
> +/* second byte
On 12/12/2014 09:31 AM, Bastian Koppelmann wrote:
> Add instructions of RR opcode format, that have 0x1 as the first opcode.
>
> Signed-off-by: Bastian Koppelmann
> ---
> target-tricore/translate.c | 97
> ++
> 1 file changed, 97 insertions(+)
Review
On 12/12/2014 09:31 AM, Bastian Koppelmann wrote:
> +DEF_HELPER_1(clo, i32, i32)
> +DEF_HELPER_1(clo_h, i32, i32)
> +DEF_HELPER_1(clz, i32, i32)
> +DEF_HELPER_1(clz_h, i32, i32)
> +DEF_HELPER_1(cls, i32, i32)
> +DEF_HELPER_1(cls_h, i32, i32)
> +/* sh */
> +DEF_HELPER_2(sh, i32, i32, i32)
> +DEF_HEL
On 12/12/2014 09:31 AM, Bastian Koppelmann wrote:
> +#define SSOV16(env, hw0, hw1) do { \
> +int32_t max_pos = INT16_MAX;\
> +int32_t max_neg = INT16_MIN;\
...
> +#define SUOV16(env, hw0, hw1) do { \
> +int32_t ma
Don't make separate checks for the trailing significand to be non-zero
where the check for the quiet bit being 1 already covers it.
The point of the whole expression is to tell inifinities and NaN data
apart while also checking for the expected value of the quiet bit, and
the quiet bit being 1
Add support for switching between legacy NaN and IEEE 754-2008 NaN modes
where required, currently for the MIPS target only. Also handle the
saving and restoration of the `nan2008_mode' status flag.
Use qNaN bit patterns for the 2008 NaN mode as from revision 5.00 [1][2]
of the MIPS Architectu
Mechanically replace `*_default_nan' variables with inline functions and
convert references accordingly. Use `__inline__' rather than `inline'
so that the latter does not cause the definitions to become static as a
result of macro expansion, the functions are best inlined when referred
to from
Precompute the possible results, and then pick the suitable one. The
calculation of the unused result will be optimized away by the compiler
at any reasonable optimization level, so no run-time performance loss.
Signed-off-by: Thomas Schwinge
Signed-off-by: Maciej W. Rozycki
---
Changes from
* Paolo Bonzini (pbonz...@redhat.com) wrote:
>
>
> On 12/12/2014 18:30, Dr. David Alan Gilbert wrote:
> > OK, let me just check that I get this
> >
> > It gets reset to 0 already in kvm_apic_realize
>
> (before this patch -- after this patch it's only done in reset)
>
> > then we do the co
On 12/12/2014 09:31 AM, Bastian Koppelmann wrote:
> -#define SSOV(env, ret, arg, len) do { \
> -int64_t max_pos = INT##len ##_MAX; \
> -int64_t max_neg = INT##len ##_MIN; \
> +#define SSOV32(env, ret, arg) do { \
> +int64_t max_po
From: Corey Minyard
Run the IPMI BMC in a separate thread. This provides a little better
simulation, since a BMC will normally be asynchronous to the rest of
the system.
Signed-off-by: Corey Minyard
---
hw/ipmi/ipmi.c| 33 +
hw/ipmi/ipmi.h| 47 +
From: Corey Minyard
Add a function that can extend the contents of a given
ACPI table to add on new entries. This way devices that
have ACPI entries can add them.
Signed-off-by: Corey Minyard
---
hw/acpi/core.c | 106 +
include/hw/acpi/a
From: Corey Minyard
Add an IPMI table entry to the SMBIOS.
Signed-off-by: Corey Minyard
---
hw/ipmi/isa_ipmi.c | 43 +++
1 file changed, 43 insertions(+)
diff --git a/hw/ipmi/isa_ipmi.c b/hw/ipmi/isa_ipmi.c
index e62f744..83ea706 100644
--- a/hw/ipmi/is
From: Corey Minyard
There was no way to directly add a table entry to the SMBIOS table,
even though the BIOS supports this. So add a function to do this.
This is in preparation for the IPMI handler adding it's SMBIOS table
entry.
Signed-off-by: Corey Minyard
---
hw/i386/smbios.c | 149
From: Corey Minyard
Use the new ACPI table construction tools to create an ACPI
entry for IPMI.
Signed-off-by: Corey Minyard
---
hw/ipmi/isa_ipmi.c | 145 +
1 file changed, 145 insertions(+)
diff --git a/hw/ipmi/isa_ipmi.c b/hw/ipmi/isa_ipmi
From: Corey Minyard
Add a set of functions to allow construction of ACPI elements
dynamically.
Signed-off-by: Corey Minyard
---
hw/acpi/Makefile.objs | 1 +
hw/acpi/acpi-elements.c | 470
include/hw/acpi/acpi-elements.h | 80 +++
From: Corey Minyard
Signed-off-by: Corey Minyard io_length = 3;
memory_region_init_io(&s->io, NULL, &ipmi_bt_io_ops, bt, "ipmi-bt", 3);
+vmstate_register(NULL, 0, &vmstate_ipmi_bt, bt);
}
static void ipmi_bt_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ipmi/ipmi_exter
From: Corey Minyard
Test the KCS interface with a local BMC and a BT interface with an
external BMC.
Signed-off-by: Corey Minyard
---
tests/Makefile| 4 +
tests/ipmi-bt-test.c | 440 ++
tests/ipmi-kcs-test.c | 294 +
From: Corey Minyard
Postpone the addition of the ACPI and SMBIOS tables until after
device initialization. This allows devices to add entries to these
tables.
Signed-off-by: Corey Minyard
---
hw/i386/pc.c | 58 --
1 file changed, 40 inse
From: Corey Minyard
Add some basic documentation for the IPMI device.
Signed-off-by: Corey Minyard
---
qemu-options.hx | 35 +++
1 file changed, 35 insertions(+)
diff --git a/qemu-options.hx b/qemu-options.hx
index 10b9568..84c3a5d 100644
--- a/qemu-options.hx
From: Corey Minyard
This provides a minimal local BMC, basically enough to comply with the
spec and provide a complete watchdog timer (including a sensor, SDR,
and event).
Signed-off-by: Corey Minyard
---
default-configs/i386-softmmu.mak |1 +
default-configs/x86_64-softmmu.mak |1 +
From: Corey Minyard
This adds an interface for IPMI that connects to a remote
BMC over a chardev (generally a TCP socket). The OpenIPMI
lanserv simulator describes this interface, see that for
interface details.
Signed-off-by: Corey Minyard
---
default-configs/i386-softmmu.mak | 1 +
defa
From: Corey Minyard
This provides the base infrastructure to tie IPMI low-level
interfaces into a PC ISA bus.
Signed-off-by: Corey Minyard
---
default-configs/i386-softmmu.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
hw/ipmi/Makefile.objs | 1 +
hw/ipmi/isa_ipmi.c
From: Corey Minyard
This provides the simulation of the BT hardware interface for
IPMI.
Signed-off-by: Corey Minyard
---
default-configs/i386-softmmu.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
hw/ipmi/Makefile.objs | 1 +
hw/ipmi/ipmi_bt.c | 374
From: Corey Minyard
This provides the simulation of the KCS hardware interface.
Signed-off-by: Corey Minyard
---
default-configs/i386-softmmu.mak | 1 +
default-configs/x86_64-softmmu.mak | 1 +
hw/ipmi/Makefile.objs | 1 +
hw/ipmi/ipmi_kcs.c | 337
From: Corey Minyard
Add the basic IPMI types and infrastructure to QEMU. Low-level
interfaces and simulation interfaces will register with this; it's
kind of the go-between to tie them together.
Signed-off-by: Corey Minyard
---
default-configs/i386-softmmu.mak | 1 +
default-configs/x86_6
This set of patches adds an IPMI device to qemu. This is good for
systems that require an IPMI device to work correctly, for simulating
scenarios that require IPMI and testing software that uses IPMI, and
of course, for the Linux IPMI driver maintainer to use to reproduce
issues that could not be
On 12/12/2014 18:30, Dr. David Alan Gilbert wrote:
> OK, let me just check that I get this
>
> It gets reset to 0 already in kvm_apic_realize
(before this patch -- after this patch it's only done in reset)
> then we do the common init
Then as part of starting up auxiliary processors we se
Rework the MIPS ABIs and CPU emulations available according to the
following target list:
- mips|mipsel -- 32-bit CPUs only, system and user emulation mode,
o32 user ABI,
- mips64|mips64el -- 32-bit and 64-bit CPUs, system and user emulation
On Wed, Dec 10, 2014 at 07:44:04PM +, Peter Maydell wrote:
> On 10 December 2014 at 19:26, Eduardo Habkost wrote:
> > Signed-off-by: Eduardo Habkost
> > ---
> > exec.c | 1 -
> > hw/virtio/virtio.c | 1 -
> > include/exec/exec-all.h | 2 ++
> > 3 files changed, 2 insert
Merge of the v8_el2_cp_reginfo and el3_cp_reginfo ARMCPRegInfo lists.
Previously, some EL3 registers were restricted to the ARMv8 list under the
impression that they were not needed on ARMv7. However, this is not the case
as the ARMv7/32-bit variants rely on the ARMv8/64-bit variants to handle
mig
Is exec-shield protection on the QEMU/KVM host relevant for VM memory
protection?
Regards,
When stopping an audio voice, call the audio backend's fini
method before calling audio_pcm_hw_free_resources_ rather than
afterwards. This allows backends which use helper threads (like
pulseaudio) to terminate those threads before the conv_buf or
mix_buf are freed and avoids race conditions where
Is anyone even looking at this? been years and the problem still
persists!
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1025244
Title:
qcow2 image increasing disk size above the virtual limit
Sta
* Paolo Bonzini (pbonz...@redhat.com) wrote:
> The wait_for_sipi field is set back to 1 after an INIT, so it was not
> effective to reset it in kvm_apic_realize. Introduce a reset callback
> and reset wait_for_sipi there.
> Reported-by: Igor Mammedov
> Signed-off-by: Paolo Bonzini
OK, let me
From: Paolo Bonzini
Avoid that unplug submits requests when io_submit reported that it
couldn't accept more; at the same time, try more io_submit calls if it
could handle the whole set of requests that were passed, so that the
"blocked" flag is reset as soon as possible.
After the previous patch
From: Fam Zheng
Change the message printing code to output a separator for each option
string before it instead of after, then we don't one more extra ' ' in
the end.
To update qemu-iotests output files, most of the times one would just
copy the *.out.bad to *.out. With this change we will not h
From: Max Reitz
Test 039 used qemu-io -c abort for simulating a qemu crash; however,
abort() generally results in a core dump and ulimit -c 0 is no reliable
way of preventing that. Use "sigraise $(kill -l KILL)" instead to have
it crash without a core dump.
Signed-off-by: Max Reitz
Reviewed-by:
From: Paolo Bonzini
There is no need to do another O(n) pass on the list; the iocb to
split the list at is already available through the array we passed to
io_submit.
Signed-off-by: Paolo Bonzini
Reviewed-by: Kevin Wolf
Message-id: 1418305950-30924-6-git-send-email-pbonz...@redhat.com
Signed-o
From: Paolo Bonzini
These are unused.
Suggested-by: Kevin Wolf
Signed-off-by: Paolo Bonzini
Reviewed-by: Kevin Wolf
Message-id: 1418305950-30924-5-git-send-email-pbonz...@redhat.com
Signed-off-by: Stefan Hajnoczi
---
block/linux-aio.c | 15 +--
block/raw-aio.h | 2 +-
2 files
From: Max Reitz
abort() has the sometimes undesirable side-effect of generating a core
dump. If that is not needed, SIGKILL has the same effect of abruptly
crash qemu; without a core dump.
Thus, -c abort is not always useful to simulate a qemu-io crash;
therefore, this patch adds a new sigraise
From: Paolo Bonzini
Keep a queue of requests that were not submitted; pass them to
the kernel when a completion is reported, unless the queue is
plugged.
The array of iocbs is rebuilt every time from scratch. This
avoids keeping the iocbs array and list synchronized.
Signed-off-by: Paolo Bonzi
From: Jeff Cody
The 0.95 VHDX spec defined PAYLOAD_BLOCK_UNMAPPED to be 5. The 1.00
VHDX spec redefines PAYLOAD_BLOCK_UNMAPPED to be 3 instead.
The original value of 5 is now an undefined state in the spec, but it
should be safe to treat it the same and return zeros for data read.
This way, we
The bdrv_clear_incoming_migration_all() function has not existed since
commit 7ea2d269cb84ca7a2f4b7c3735634176f7c1dc35 ("block/migration:
Disable cache invalidate for incoming migration").
Signed-off-by: Stefan Hajnoczi
Reviewed-by: Max Reitz
Message-id: 1418212937-2-1-git-send-email-stefa..
From: Max Reitz
_filter_qemu_io already filters out the process ID when qemu-io is
aborted; the same should be done when it is killed.
Signed-off-by: Max Reitz
Reviewed-by: Fam Zheng
Message-id: 1418032092-16813-3-git-send-email-mre...@redhat.com
Signed-off-by: Stefan Hajnoczi
---
tests/qemu
From: Jeff Cody
Now that new VHDX images will default to BAT block states of
PAYLOAD_BLOCK_ZERO, we can indicate that VHDX has zero init.
Signed-off-by: Jeff Cody
Reviewed-by: Max Reitz
Message-id:
5e582703e36450b9ca939e2e5c9fa3930030f7fe.1418018421.git.jc...@redhat.com
Signed-off-by: Stefan
From: Fam Zheng
This is simply:
$ cd tests/qemu-iotests; sed -i -e 's/ *$//' *.out
Signed-off-by: Fam Zheng
Reviewed-by: Eric Blake
Reviewed-by: Markus Armbruster
Message-id: 1418110684-19528-2-git-send-email-f...@redhat.com
Signed-off-by: Stefan Hajnoczi
---
tests/qemu-iotests/001.out |
From: Max Reitz
If vmdk blindly tries to use path_combine() using bs->file->filename as
the base file name, this will result in a bad error message for JSON
file names when calling bdrv_open(). It is better to only try
bs->file->exact_filename; if that is empty, bs->file->filename will be
useless
From: Jeff Cody
The VHDX spec specifies that the default new block state is
PAYLOAD_BLOCK_NOT_PRESENT for a dynamic VHDX image, and
PAYLOAD_BLOCK_FULLY_PRESENT for a fixed VHDX image.
However, in order to create space-efficient VHDX images with qemu-img
convert, it is desirable to be able to set
From: Jeff Cody
Minor cleanup.
Signed-off-by: Jeff Cody
Reviewed-by: Max Reitz
Message-id:
e8718ae3fd3e40a527e46a00e394973fbaab4d53.1418018421.git.jc...@redhat.com
Signed-off-by: Stefan Hajnoczi
---
block/vhdx.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/blo
From: Gary R Hook
Modify block_save_iterate() to return positive/zero/negative
(success/not done/failure) return status. The computation of
the blocks transferred (an int64_t) exceeds the size of an
int return value.
Signed-off-by: Gary R Hook
Reviewed-by: ChenLiang
Reviewed-by: Stefan Hajnocz
The following changes since commit 99c9c3cb24e566258a0a141178934f9cb5198842:
Merge remote-tracking branch
'remotes/mjt/tags/pull-trivial-patches-2014-12-11' into staging (2014-12-11
18:27:02 +)
are available in the git repository at:
git://github.com/stefanha/qemu.git tags/block-pull-r
From: Paolo Bonzini
It does not identify an index in an array anymore.
Signed-off-by: Paolo Bonzini
Reviewed-by: Kevin Wolf
Message-id: 1418305950-30924-4-git-send-email-pbonz...@redhat.com
Signed-off-by: Stefan Hajnoczi
---
block/linux-aio.c | 12 ++--
1 file changed, 6 insertions(+
From: Max Reitz
Add a test for vmdk files which use a file with a JSON file name, and
which then try to open extents. That should fail and the error message
should at least try to look helpful.
Signed-off-by: Max Reitz
Reviewed-by: Fam Zheng
Message-id: 1417615043-26174-3-git-send-email-mre...
From: Gonglei
Variable local_err going out of scope
leaks the storage it points to.
Cc: Markus Armbruster
Signed-off-by: Gonglei
Reviewed-by: Amos Kong
Message-id: 1417674851-6248-1-git-send-email-arei.gong...@huawei.com
Signed-off-by: Stefan Hajnoczi
---
block/rbd.c | 8
1 file ch
On Thu, Dec 11, 2014 at 02:52:25PM +0100, Paolo Bonzini wrote:
> This series rewrites the io_submit code to avoid having to
> synchronize the iocbs in two places (qemu_laiocb and LaioQueue).
> Instead, the queue of pending I/O requests is kept in a list.
>
> This fixes the problems with io_submit
On Wed, Dec 10, 2014 at 12:02:17PM +, Stefan Hajnoczi wrote:
> The bdrv_clear_incoming_migration_all() function has not existed since
> commit 7ea2d269cb84ca7a2f4b7c3735634176f7c1dc35 ("block/migration:
> Disable cache invalidate for incoming migration").
>
> Signed-off-by: Stefan Hajnoczi
>
On Tue, Dec 09, 2014 at 03:38:02PM +0800, Fam Zheng wrote:
> This will make it easier to keep checkpatch.pl happy.
>
> Fam Zheng (2):
> qemu-iotests: Remove traling whitespaces in *.out
> block: Don't add trailing space in "Formating..." message
>
> block.c| 4 +-
> inc
On 12/12/2014 17:38, Eduardo Habkost wrote:
> The code that calculates the legacy ACPI table size for migration
> compatibility uses max_cpus when calculating legacy_aml_len (the size of
> the DSDT and SSDT tables). However, the SSDT grows according to APIC ID
> limit, not max_cpus.
>
> The bug
On 12/12/2014 15:53, Peter Maydell wrote:
> On 12 December 2014 at 15:52, Leon Alrae wrote:
>> On 12/12/2014 14:51, Peter Maydell wrote:
>>> Failing that, the best source for a mips16 disassembler is
>>> going to be "fix the bugs in the currently disabled code we
>>> have in the tree", in which ca
There seems to be a race condition in the pulseaudio backend on
closing of a voice...
There are two threads involved here. The first one is a worker
thread that just sits executing our qpa_thread_in() function
to get input audio from PA and feed it to us. The second thread
is QEMU itself (the cpu
This array is used by print_mips16_insn_arg() which is guarded by #if 0.
Therefore doing the same with the array as it generates clang warnings.
Signed-off-by: Leon Alrae
---
disas/mips.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/disas/mips.c b/disas/mips.c
index b94d
On Mon, Dec 08, 2014 at 10:48:09AM +0100, Max Reitz wrote:
> Test 039 used to fail because qemu-io -c abort may generate core dumps
> even with ulimit -c 0 (and the output then contains "(core dumped)").
> Fix this by adding a new qemu-io command "sigraise" which invokes
> raise(). Using this comma
The code that calculates the legacy ACPI table size for migration
compatibility uses max_cpus when calculating legacy_aml_len (the size of
the DSDT and SSDT tables). However, the SSDT grows according to APIC ID
limit, not max_cpus.
The bug is not triggered very often because of the 4k alignment on
Add instructions of RR opcode format, that have 0xb as the first opcode.
Add helper functions, for hword and byte arithmetics:
* add_h_ssov/suov: Add two halfword and saturate on overflow.
* sub_h_ssov/suov: Sub two halfword and saturate on overflow.
* absdif_h_ssov: Compute absolute di
Some of the 1.6 ISA instructions were still missing. So let's add them.
Signed-off-by: Bastian Koppelmann
---
target-tricore/translate.c | 49 +++-
target-tricore/tricore-opcodes.h | 6 +
2 files changed, 54 insertions(+), 1 deletion(-)
diff --git
Those makros are exclusively used for 32 bit arithmetics and won't work for 16
bit with two halfwords.
So lets get rid of the len parameter and make them always use 32 bit.
Signed-off-by: Bastian Koppelmann
---
target-tricore/op_helper.c | 34 +-
1 file changed,
Add instructions of RR opcode format, that have 0x4b as the first opcode.
Add helper functions:
* parity: Calculates the parity bits for every byte of a 32 int.
* bmerge/bsplit: Merges two regs into one bitwise/Splits one reg into two
bitwise.
* unpack: unpack a IEEE 754 single precisi
Add instructions of RR opcode format, that have 0xf as the first opcode.
Add helper functions:
* clo/z/s: Counts leading ones/zeros/signs.
* clo/z/s_h: Count leading ones/zeros/signs in two haflwords.
* sh/_h: Shifts one/two word/hwords.
* sha/_h: Shifts one/two word/hwords arithmet
Add instructions of RR opcode format, that have 0x1 as the first opcode.
Signed-off-by: Bastian Koppelmann
---
target-tricore/translate.c | 97 ++
1 file changed, 97 insertions(+)
diff --git a/target-tricore/translate.c b/target-tricore/translate.c
in
Hi,
here is the next patchset for the TriCore ISA, which steadily moves towards
being a usable qemu guest.
This patchset first cleans up the SSOV/SUOV makros, which were only suitable
for 32 bit arithmetic,
to make room for 16bit SSOV/SUOV arithmetic used for the RR insn. These are
splitted int
Fix gen_mtcr using wrong register.
Fix gen_mtcr/mfcr using sign extended offsets.
Fix B format insn using not sign extendend offsets.
Signed-off-by: Bastian Koppelmann
---
target-tricore/translate.c | 6 --
target-tricore/tricore-opcodes.h | 2 ++
2 files changed, 6 insertions(+), 2 de
Add instructions of RR1 opcode format, that have 0xb3 as first opcode.
Add helper functions mulh, mulmh and mulrh in four variants, that compute
multiplication,
with multiprecision (mulmh) or rounding (mulrh) of 4 halfwords, being either
low or high parts
of two 32 bit regs.
Signed-off-by: Basti
On 12/12/2014 17:10, Thomas Monjalon wrote:
> > Ok, this looks specific enough that an out-of-band solution within DPDK
> > sounds like the best approach. It seems unnecessary to involve the
> > hypervisor (neither KVM nor QEMU).
>
> Paolo, I don't understand why you don't imagine controlling fr
2014-12-12 15:50, Paolo Bonzini:
> On 12/12/2014 14:00, Carew, Alan wrote:
> > The problem is deterministic control of host CPU frequency and the DPDK
> > usage
> > model.
> > A hands-off power governor will scale based on workload, whether this is a
> > host
> > application or VM, so no problems
If the board code overlaps the (currently only byte-wide) data I/O port
with the high byte of the selector I/O port, we install the "comb_iomem"
MemoryRegion.
Generalize the check to see if *any* byte of the data I/O port overlaps
with the high byte of the selector I/O port. If that's the case:
-
Introduce the new boolean field "arm_boot_info.firmware_loaded". When this
field is set, it means that the portion of guest DRAM that the VCPU
normally starts to execute, or the pflash chip that the VCPU normally
starts to execute, has been populated by board-specific code with
full-fledged guest f
The virt board already ensures mutual exclusion between -bios and -pflash
unit#0; we only need to set "bootinfo.firmware_loaded", introduced in the
previous patch, if either of those options was used to load the guest
firmware.
Signed-off-by: Laszlo Ersek
Reviewed-by: Peter Maydell
---
Notes:
Please find my comments inline
Thanks,
Amulya
-Original Message-
From: Jeff Cody [mailto:jc...@redhat.com]
Sent: Friday, December 12, 2014 8:48 PM
To: Lokesha, Amulya
Cc: Max Reitz; qemu-devel@nongnu.org; kw...@redhat.com; stefa...@redhat.com
Subject: Re: [PATCH 4/4] block: vhdx - set .b
The "data_memwidth" property is capable of changing the maximum valid
access size to the MMIO data register, and (corresponding to the previous
patch) resizes the memory region similarly, at device realization time.
(Because "data_iomem" is configured and installed dynamically now, we must
delay t
fw_cfg already supports exposure over MMIO (used in ppc/mac_newworld.c,
ppc/mac_oldworld.c, sparc/sun4m.c); we can easily add it to the "virt"
board.
Because MMIO access is slow on ARM KVM, we enable the guest, with
fw_cfg_init_data_memwidth(), to transfer up to 8 bytes with a single
access. This
We rebase fw_cfg_init() to the new function for compatibility with current
callers.
Signed-off-by: Laszlo Ersek
---
Notes:
v4:
- unchanged
v3:
- new in v3 [Drew Jones]
include/hw/nvram/fw_cfg.h | 3 +++
hw/nvram/fw_cfg.c | 15 +++
2 files changed, 14 i
In the next patch we'd like to reuse the image decompression facility
without installing the output as a ROM at a specific guest-phys address.
In addition, expose LOAD_IMAGE_MAX_GUNZIP_BYTES, because that's a
straightforward "max_sz" argument for the new load_image_gzipped_buffer().
Signed-off-by
Make it clear that the maximum access size to the MMIO data register
determines the full size of the memory region.
Currently the max access size is 1. Ensure that if a larger size were used
in "fw_cfg_data_mem_ops.valid.max_access_size", the memory subsystem would
split the access to byte-sized a
Addressing Peter's review comments for v3.
Patch #2 is new; I thought recognizing & rejecting the overlapping I/O
ports in case the data port was wider than 1 byte merited a separate
patch.
Other changes are noted per-patch.
Rebased the series and ran checkpatch on all patches.
Thanks
Laszlo
L
Hi,
We are experiencing random errors with communication with VMs with QMP via
unix sockets. At some moment of time the QMP socket keeps on returning
-EAGAIN and never recovering from this state unless the qemu process is
stopped then started. This socket hickup happens specfically when
connecting
On 12 December 2014 at 15:52, Leon Alrae wrote:
> On 12/12/2014 14:51, Peter Maydell wrote:
>> Failing that, the best source for a mips16 disassembler is
>> going to be "fix the bugs in the currently disabled code we
>> have in the tree", in which case deleting it all would be
>> a backwards step.
On 12/12/2014 14:51, Peter Maydell wrote:
> On 12 December 2014 at 14:28, Leon Alrae wrote:
>> On 12/12/2014 12:25, Peter Maydell wrote:
>>> On 12 December 2014 at 09:30, Leon Alrae wrote:
The array was "used" in a block of code which has never been enabled.
Therefore
removing the
On Mon, Dec 08, 2014 at 01:07:41AM -0500, Jeff Cody wrote:
> A couple of VHDX fixes in this series:
> * updating the driver to reflect the 1.00 spec for the value of
>PAYLOAD_BLOCK_UNMAPPED (thanks Kevin)
> * enabling VHDX to support zero init in qemu-img convert
>
> 1/4: compiling: e8718ae:
On 12/12/2014 02:10 PM, Alex Zuepke wrote:
Signed-off-by: Alex Zuepke
---
target-tricore/translate.c | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/target-tricore/translate.c b/target-tricore/translate.c
index e3eeedb..d1b845b 100644
--- a/target-tric
Define new VFIO data structure for VT-d Posted-Interrupts.
Signed-off-by: Feng Wu
---
linux-headers/linux/kvm.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index 1937afa..6463b28 100644
--- a/linux-headers/linux/kvm.h
+++
VT-d Posted-Interrupts(PI) is an enhancement to CPU side Posted-Interrupt.
With VT-d Posted-Interrupts enabled, external interrupts from
direct-assigned devices can be delivered to guests without VMM
involvement when guest is running in non-root mode.
If VT-d PI is supported by KVM, we need to upd
Maybe bdrv_snapshot_create() should take s->lock but it's not clear yet
what causes all qcow2 cache entries to be referenced.
How do you reproduce this crash? Please give exact steps including what
commands to run inside the guest and what QEMU monitor commands to run.
Is the crash deterministic
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