Signed-off-by: Richard Henderson
---
tcg/ia64/tcg-target.c | 156 +++---
tcg/ia64/tcg-target.h | 2 +-
2 files changed, 97 insertions(+), 61 deletions(-)
diff --git a/tcg/ia64/tcg-target.c b/tcg/ia64/tcg-target.c
index ea24e83..9fd176d 100644
--- a/t
Signed-off-by: Richard Henderson
---
tcg/ia64/tcg-target.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/tcg/ia64/tcg-target.c b/tcg/ia64/tcg-target.c
index 3e96af9..8057f40 100644
--- a/tcg/ia64/tcg-target.c
+++ b/tcg/ia64/tcg-target.c
@@
On Thu, 5 Sep 2013 19:17:50 +0100
Peter Maydell wrote:
> On 5 September 2013 08:52, Antony Pavlov wrote:
> > +static int uart_can_rx(void *opaque)
> > +{
> > +DigicUartState *s = opaque;
> > +
> > +return !(s->regs[R_ST] & ST_RX_RDY);
> > +}
> > +
> > +static void uart_rx(void *opaque, c
Signed-off-by: Richard Henderson
---
tcg/ia64/tcg-target.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/tcg/ia64/tcg-target.c b/tcg/ia64/tcg-target.c
index 23be46c..819bca3 100644
--- a/tcg/ia64/tcg-target.c
+++ b/tcg/ia64/tcg-target.c
@@ -1569,7
Saving at least two cycles per store, and cleaning up the code.
Signed-off-by: Richard Henderson
---
tcg/ia64/tcg-target.c | 96 +--
1 file changed, 32 insertions(+), 64 deletions(-)
diff --git a/tcg/ia64/tcg-target.c b/tcg/ia64/tcg-target.c
index
Signed-off-by: Richard Henderson
---
tcg/ia64/tcg-target.c | 35 ---
1 file changed, 16 insertions(+), 19 deletions(-)
diff --git a/tcg/ia64/tcg-target.c b/tcg/ia64/tcg-target.c
index de81593..3e96af9 100644
--- a/tcg/ia64/tcg-target.c
+++ b/tcg/ia64/tcg-target.c
Being able to "extend" from 64-bits (with a mov) simplifies
a few places where the conditional breaks the train of thought.
Signed-off-by: Richard Henderson
---
tcg/ia64/tcg-target.c | 54 +++
1 file changed, 24 insertions(+), 30 deletions(-)
diff
This sequencing requires 5 stop bits instead of 6, and has room left
over to pre-load the tlb addend, and bswap data prior to being stored.
Signed-off-by: Richard Henderson
---
tcg/ia64/tcg-target.c | 77 ---
1 file changed, 54 insertions(+), 23 de
Avoids a wasted cycle loading up small constants.
Simplify the code assuming the tcg optimizer is going to work
and don't expect the first operand of the add to be constant.
Signed-off-by: Richard Henderson
---
tcg/ia64/tcg-target.c | 20
1 file changed, 16 insertions(+), 4
We can and/or/xor/andcm small constants, saving one cycle.
Signed-off-by: Richard Henderson
---
tcg/ia64/tcg-target.c | 52 +++
1 file changed, 32 insertions(+), 20 deletions(-)
diff --git a/tcg/ia64/tcg-target.c b/tcg/ia64/tcg-target.c
index cc8c
We can subtract from more small constants that just 0 with one insn,
and we can add the negative for most small constants.
Signed-off-by: Richard Henderson
---
tcg/ia64/tcg-target.c | 25 +++--
1 file changed, 23 insertions(+), 2 deletions(-)
diff --git a/tcg/ia64/tcg-target
There's no need to go through the full opcode-to-insn function call
to generate nops. This makes the source a bit more readable.
Signed-off-by: Richard Henderson
---
tcg/ia64/tcg-target.c | 251 +-
1 file changed, 127 insertions(+), 124 deletions(
Since the move away from the global areg0, we're no longer globally
reserving areg0. Which means our use of R7 clobbers a call-saved
register. Shift areg0 into the windowed registers. Indeed, choose
the incoming parameter register that it comes to us by.
This requires moving the register holdin
Signed-off-by: Richard Henderson
---
tcg/ia64/tcg-target.c | 171 ++
1 file changed, 90 insertions(+), 81 deletions(-)
diff --git a/tcg/ia64/tcg-target.c b/tcg/ia64/tcg-target.c
index cd4f1ae..dcf4dd3 100644
--- a/tcg/ia64/tcg-target.c
+++ b/tcg/ia
The AREG0 to R32 patch fixes a real bug, and if anyone
cared should be applied to stable.
Most of the patches are pure cleanup and improvementm
rearranging generated code to use fewer stop bits, and
therefore reduce execute cycles.
Finally, convert to out-of-line ldst handlers. All of
this is on
There was a misconception that a stop bit is required between a compare
and the branch that uses the predicate set by the compare. This lead to
the usage of an extra bundle in which to perform the compare. The extra
bundle left room for constants to be loaded for use with the compare insn.
If we
On 09/06/2013 04:22 PM, Alexander Graf wrote:
>
>
> Am 06.09.2013 um 07:04 schrieb Alexey Kardashevskiy :
>
>> On 09/06/2013 12:24 AM, Alexey Kardashevskiy wrote:
>>> On 09/05/2013 11:08 PM, Alexander Graf wrote:
On 05.09.2013, at 14:49, Alexey Kardashevskiy wrote:
> On 09/05/
On Thu, 09/05 14:43, Lluís Vilanova wrote:
> Fam Zheng writes:
>
> > Add module_load_all to load all DSO modules under:
> > /usr/lib/qemu/block/
> > /usr/lib/qemu/net/
> > /usr/lib/qemu/ui/
> > when starting process.
>
> This should probably be based on a define with the prefix set at
Am 06.09.2013 um 07:04 schrieb Alexey Kardashevskiy :
> On 09/06/2013 12:24 AM, Alexey Kardashevskiy wrote:
>> On 09/05/2013 11:08 PM, Alexander Graf wrote:
>>>
>>> On 05.09.2013, at 14:49, Alexey Kardashevskiy wrote:
>>>
On 09/05/2013 10:16 PM, Alexander Graf wrote:
>
> On 05.09
Il 05/09/2013 23:02, Aurelien Jarno ha scritto:
> It would be nice if you can get the pcnet fix in your tree. For the ne2k
> patch, as reported it might break the non-PCI version. I have to look at
> that more in details, probably this week-end.
No, that's fine. The non-PCI version is also little
On Thu, 09/05 12:24, Richard Henderson wrote:
> On 09/05/2013 03:20 AM, Fam Zheng wrote:
> > 1) %.o in $(common-obj-m) is compiled to %.o, with
> > "QEMU_CFLAGS += -shared -fPIC". Then "linked" to %.mo, which is an
> > incremental object with "ln -r". This step is for consistency with
>
The local spice renderer assumes the primary surface is located at the
start of the "ram" bar. This used to be a requirement in qxl hardware
revision 1. In revision 2+ this is relaxed. Nevertheless guest drivers
continued to use the traditional location, for historical and backward
compatibility
On 09/06/2013 12:24 AM, Alexey Kardashevskiy wrote:
> On 09/05/2013 11:08 PM, Alexander Graf wrote:
>>
>> On 05.09.2013, at 14:49, Alexey Kardashevskiy wrote:
>>
>>> On 09/05/2013 10:16 PM, Alexander Graf wrote:
On 05.09.2013, at 14:04, Alexey Kardashevskiy wrote:
> On 09/05/2013
On Thu, 05 Sep 2013 23:38:26 +0200
Andreas Färber wrote:
> Am 05.09.2013 23:23, schrieb Antony Pavlov:
> > On Thu, 05 Sep 2013 20:08:34 +0200
> > Andreas Färber wrote:
> >> Am 05.09.2013 09:52, schrieb Antony Pavlov:
> >>> diff --git a/hw/arm/digic.c b/hw/arm/digic.c
> >>> new file mode 100644
>
Am 05.09.2013 23:32, schrieb Peter Maydell:
> On 5 September 2013 21:35, Stefan Weil wrote:
>> In a first analysis of this, I noticed that it is impossible to run
>> qemu-sparc64
>> under gdb (raised fatal signal).
> You probably just need to let the signals go through to
> the target... I noticed
This case will test whether the monitor can receive fd at runtime.
To verify better, additional monitor is created to see if qemu
can handler two monitor instances correctly.
Signed-off-by: Wenchao Xia
---
tests/qemu-iotests/045 | 51 +++-
tests/qemu
This patch make use of the compiled scm helper program to transfer
fd via unix socket at runtime.
Signed-off-by: Wenchao Xia
---
QMP/qmp.py|6 ++
tests/qemu-iotests/check |1 +
tests/qemu-iotests/iotests.py | 23 +++
3 files changed, 30
This program can do a sendmsg call to transfer fd with unix
socket, which is not supported in python2.
The built binary will not be deleted in clean, but it is a
existing issue in ./tests, which should be solved in another
patch.
Signed-off-by: Wenchao Xia
---
configure
This series add test case for fd passing with unix socket at runtime. Since
getfd and closefd interface will interact with monitor's data, so it will
help to do regression test for monitor patches. Since python2 do not support
sendmsg(), so a C helper program is added to do the job.
v2:
1: add m
On Thu, Sep 05, 2013 at 02:54:46PM +1000, Alexey Kardashevskiy wrote:
> On 09/05/2013 02:30 PM, David Gibson wrote:
> > On Tue, Sep 03, 2013 at 05:31:42PM +1000, Alexey Kardashevskiy wrote:
> >> This allows guests to have a different timebase origin from the host.
> >>
> >> This is needed for migra
Benjamin Herrenschmidt writes:
> On Mon, 2013-08-12 at 17:29 +0930, Rusty Russell wrote:
>> virtio data structures are defined as "target endian", which assumes
>> that's a fixed value. In fact, that actually means it's
>> platform-specific.
>>
>> Hopefully the OASIS virtio 1.0 spec will fix thi
Hi, qemuers:
I found that the guest disk file cache mode will affect to the time of savevm.
the cache 'writeback' too slow. but the cache 'unsafe' is as fast as it can,
less than 10 seconds.
here is the example I use virsh:
@cache with writeback:
#the first snapshot
real0m21.904s
user0m
On Thu, Sep 5, 2013 at 7:20 AM, Michal Novotny wrote:
> This is the patch to introduce SIGILL handler to be able to trigger
> SIGSEGV signal in qemu. This has been written to help debugging
> state when qemu crashes by SIGSEGV as a simple reproducer to
> emulate such situation in case of need.
>
>
On 09/05/2013 04:41 PM, Alex Williamson wrote:
>>> /* This can fail for an old kernel or legacy PCI dev */
>>> -DPRINTF("VFIO_DEVICE_GET_IRQ_INFO failure ret=%d\n", ret);
>>> +DPRINTF("VFIO_DEVICE_GET_IRQ_INFO failure: %m\n");
>>
>> %m is a glibc extension, and does not ex
On 09/05/2013 04:50 PM, Anthony Liguori wrote:
>> +int *p = NULL;
>> +
>> +*p = 0xDEADBEEF;
>
> I won't repeat the questions from Paolo and Lazlo (I share their
> confusion) but will simply add that you cannot rely on NULL address
> accessing causing a SEGV. Even with all the use of volat
Now that VFIO has a PCI hot reset interface, take advantage of it.
There are two modes that we need to consider. The first is when only
one device within the set of devices affected is actually assigned to
the guest. In this case the other devices are are just held by VFIO
for isolation and we ca
On Thu, 2013-09-05 at 16:37 -0600, Eric Blake wrote:
> On 09/05/2013 04:29 PM, Alex Williamson wrote:
> > Remove carriage returns and tweak formatting for error_reports.
> >
> > Signed-off-by: Alex Williamson
> > ---
> > hw/misc/vfio.c | 24
> > 1 file changed, 12 inse
On 09/05/2013 04:29 PM, Alex Williamson wrote:
> Remove carriage returns and tweak formatting for error_reports.
>
> Signed-off-by: Alex Williamson
> ---
> hw/misc/vfio.c | 24
> 1 file changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/hw/misc/vfio.c b/hw/mi
On Thu, Sep 05, 2013 at 10:50:02PM +0100, Peter Maydell wrote:
> On 5 September 2013 22:41, Richard W.M. Jones wrote:
> > I don't know if there is a more appropriate place to ask about
> > ARM / virtio questions. If there is please let me know.
> >
> > I'm trying to get qemu to boot an ARM applia
I don't know if there is a more appropriate place to ask about
ARM / virtio questions. If there is please let me know.
I'm trying to get qemu to boot an ARM appliance. Everything works up
to the point where the kernel loads virtio drivers. The disks never
show up. The full qemu command line an
On 09/05/13 15:26, Paolo Bonzini wrote:
> Il 05/09/2013 14:19, Michal Novotny ha scritto:
>> This is the patch to introduce SIGILL handler to be able to trigger
>> SIGSEGV signal in qemu. This has been written to help debugging
>> state when qemu crashes by SIGSEGV as a simple reproducer to
>> emul
Remove carriage returns and tweak formatting for error_reports.
Signed-off-by: Alex Williamson
---
hw/misc/vfio.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/hw/misc/vfio.c b/hw/misc/vfio.c
index 730dec5..a73e7f5 100644
--- a/hw/misc/vfio.c
++
During vfio-pci initfn, the device is not always in a state where the
option ROM can be read. In the case of graphics cards, there's often
no per function reset, which means we have host driver state affecting
whether the option ROM is usable. Ideally we want to move reading the
option ROM past a
Not all resets are created equal. PM reset is not very reliable,
especially for GPUs, so we might want to opt for a bus reset if a
standard reset will only do a D3hot->D0 transition. We can also
use this to tell if the standard reset will do a bus reset (if
neither has_pm_reset or has_flr is prob
Set mixer property to on by default. Also, always include two versions
of devices (with and without mixemu) so that user can select one of
them at runtime.
Signed-off-by: Bandan Das
---
audio/mixeng.c | 6 --
configure| 8
hw/audio/hda-codec.c | 35 -
Move common defines and structs to a header file.
The next commit will include it twice, once for a device with a
mixer, and once for device without a mixer.
Signed-off-by: Bandan Das
---
hw/audio/hda-codec-common.h | 449
hw/audio/hda-codec.c
On 5 September 2013 22:41, Richard W.M. Jones wrote:
> I don't know if there is a more appropriate place to ask about
> ARM / virtio questions. If there is please let me know.
>
> I'm trying to get qemu to boot an ARM appliance. Everything works up
> to the point where the kernel loads virtio dr
On 5 September 2013 20:41, Paolo Bonzini wrote:
> Libtool used to be really bad, but most performance problems have been
> solved.
How about the "it silently creates things in dot-directories,
recompiles things at random times when it really shouldn't,
and is an enormous insane shell script" prob
Define PARAM so that we have two versions of the "desc_codec
and family" structs. Add a property called "mixer" whose default
value depends on whether CONFIG_MIXEMU is defined or not which
will help us call the appropriate instance init functions.
Signed-off-by: Bandan Das
---
hw/audio/hda-code
Currently, hda-codec mixer emulation can only be enabled by using the
"--enable-mixemu" option to configure at compile time with the default
value being off. These patches enable making mixer emulation selectable
at runtime which is more convenient. Consequently, the last patch in this
series remo
Am 05.09.2013 23:23, schrieb Antony Pavlov:
> On Thu, 05 Sep 2013 20:08:34 +0200
> Andreas Färber wrote:
>> Am 05.09.2013 09:52, schrieb Antony Pavlov:
>>> diff --git a/hw/arm/digic.c b/hw/arm/digic.c
>>> new file mode 100644
>>> index 000..95a9fcd
>>> --- /dev/null
>>> +++ b/hw/arm/digic.c
[.
On Thu, 05 Sep 2013 20:08:34 +0200
Andreas Färber wrote:
> Am 05.09.2013 09:52, schrieb Antony Pavlov:
> > DIGIC is Canon Inc.'s name for a family of SoC
> > for digital cameras and camcorders.
> >
> > There is no publicly available specification for
> > DIGIC chips. All information about DIGIC
On 5 September 2013 21:35, Stefan Weil wrote:
> Here is the result of running Debian's busybox-static for sparc64:
>
> $ sparc64-linux-user/qemu-sparc64 /usr/gnemul/qemu-sparc64/bin/busybox
> ls -l block.c
> ?rwxr-x--T1 stefan root 1378329541 Jan 1 1970 block.c
>
> It's obviously wrong
On Thu, Sep 05, 2013 at 09:49:46PM +0200, Paolo Bonzini wrote:
> Il 02/09/2013 13:38, Stefan Hajnoczi ha scritto:
> > The following changes since commit 4ff78e0dbcd5c795962567fdc1b31e9e03c55b07:
> >
> > Merge remote-tracking branch 'luiz/queue/qmp' into staging (2013-08-30
> > 12:26:04 -0500)
>
On Fri, 2013-08-30 at 20:15 +1000, Alexey Kardashevskiy wrote:
> This turns the sPAPR support on and enables VFIO container use
> in the kernel.
>
> Signed-off-by: Alexey Kardashevskiy
> ---
> Changes:
> v4:
> * fixed format string to use %m which is a glibc extension:
> "Print output of strerror
Here is the result of running Debian's busybox-static for sparc64:
$ sparc64-linux-user/qemu-sparc64 /usr/gnemul/qemu-sparc64/bin/busybox
ls -l block.c
?rwxr-x--T1 stefan root 1378329541 Jan 1 1970 block.c
It's obviously wrong. All other user emulations return the correct result:
$ b
On 09/05/2013 01:17 PM, Stefan Weil wrote:
> I added assertions for (t2 > 0) and (t2 < 64). They never raised an abort.
> Are those cases possible? We already have similar code for 32 bit shifts,
> and tcg/optimize.c also includes an implementation which is identical to
> my rotl_i64, rotr_i64.
It
Il 29/08/2013 10:25, Liu, Jinsong ha scritto:
> Currently HVM S3 has a bug coming from the difference between
> qemu-traditioanl and qemu-xen. For qemu-traditional, the way
> to resume from hvm s3 is via 'xl trigger' command. However,
> for qemu-xen, the way to resume from hvm s3 inherited from
> s
Am 05.09.2013 14:00, schrieb Jay Foad:
>> diff --git a/tci.c b/tci.c
>> index 18c888e..94b7851 100644
>> --- a/tci.c
>> +++ b/tci.c
>> @@ -952,8 +952,16 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t
>> *tb_ptr)
>> break;
>> #if TCG_TARGET_HAS_rot_i64
>> case INDEX
Il 05/09/2013 21:24, Richard Henderson ha scritto:
> On 09/05/2013 03:20 AM, Fam Zheng wrote:
>> 1) %.o in $(common-obj-m) is compiled to %.o, with
>> "QEMU_CFLAGS += -shared -fPIC". Then "linked" to %.mo, which is an
>> incremental object with "ln -r". This step is for consistency with
Il 02/09/2013 13:38, Stefan Hajnoczi ha scritto:
> The following changes since commit 4ff78e0dbcd5c795962567fdc1b31e9e03c55b07:
>
> Merge remote-tracking branch 'luiz/queue/qmp' into staging (2013-08-30
> 12:26:04 -0500)
>
> are available in the git repository at:
>
>
> git://github.com/st
On 5 September 2013 19:55, Andreas Färber wrote:
> Am 05.09.2013 18:43, schrieb Peter Maydell:
>> /* Indexed by pl110_version */
>> static const unsigned char *idregs[] = {
>> pl110_id,
>> -pl110_versatile_id,
>> +/* The ARM documentation (DDI0224C) says the CLCDC on the Versatile
On Fri, 2013-08-30 at 20:15 +1000, Alexey Kardashevskiy wrote:
> From: David Gibson
>
> This patch uses the new IOMMU notifiers to allow VFIO pass through devices
> to work with guest side IOMMUs, as long as the host-side VFIO iommu has
> sufficient capability and granularity to match the guest s
Changes from V4:
rebased on https://github.com/bonzini/qemu/tree/rcu
commit 965f3b2aac93bca6df50c86fb17a06b3c856fa30
This brings the patchset down to three files.
Changes from V3:
* now passes virt-test -t qemu
* uses call_rcu instead of call_rcu1
* completely removed the ram_list mutex and its
Am 05.09.2013 18:43, schrieb Peter Maydell:
> Clarify a comment about the ID register value presented by
> the PL110 variant present on the VersatilePB board (based
> on testing what the actual hardware does), to indicate that
> this is not an error in our emulation, and to remove an #if-0.
>
> Si
On 09/05/2013 03:20 AM, Fam Zheng wrote:
> 1) %.o in $(common-obj-m) is compiled to %.o, with
> "QEMU_CFLAGS += -shared -fPIC". Then "linked" to %.mo, which is an
> incremental object with "ln -r". This step is for consistency with
> %.mod case and has no effect.
As a general rule
On Fri, 2013-08-30 at 20:15 +1000, Alexey Kardashevskiy wrote:
> As sPAPR platform supports DMA windows on a PCI bus, the information
> about their location and size should be passed into the guest via
> the device tree.
>
> The patch adds a helper to read this info from the container fd.
>
> Sig
Hi,
On (Sun) 11 Aug 2013 [16:25:25], Gal Hammer wrote:
> The redundant notification caused the Windows' driver to duplicate the
> pending write request's buffer. The driver was fixed, but I think this
> change is still required.
>
> Signed-off-by: Gal Hammer
> ---
> hw/char/virtio-serial-bus.c
Stefan Hajnoczi writes:
> The following changes since commit 4ff78e0dbcd5c795962567fdc1b31e9e03c55b07:
>
> Merge remote-tracking branch 'luiz/queue/qmp' into staging (2013-08-30
> 12:26:04 -0500)
>
> are available in the git repository at:
Sorry, I forgot to send you this feedback earlier.
T
Am 05.09.2013 09:52, schrieb Antony Pavlov:
> DIGIC is Canon Inc.'s name for a family of SoC
> for digital cameras and camcorders.
>
> There is no publicly available specification for
> DIGIC chips. All information about DIGIC chip
> internals is based on reverse engineering efforts
> made by CHDK
Hi Anthony,
Please pull to receive a fix for a segfault in the char layer. The
patches have been on the list for a week, and Gerd has reviewed them.
(I'm overloading the virtio-serial git tree for this series, haven't
gotten around to setting up a separate tree for char yet.)
The following cha
On 5 September 2013 08:52, Antony Pavlov wrote:
> Also this patch adds initial support for Canon
> PowerShot A1100 IS compact camera.
>
> Signed-off-by: Antony Pavlov
> ---
> hw/arm/Makefile.objs | 2 +-
> hw/arm/digic_boards.c | 63
> +++
> 2 f
All the backends implement an io watcher tag for callbacks. Move it to
CharDriverState from each backend's struct to make accessing the tag from
backend-neutral functions easier.
This will be used later to cancel a callback on chardev detach from a
frontend.
CC:
Reviewed-by: Gerd Hoffmann
Sign
We had a call with those interested and/or working on vfio
for platform devices.
Participants: Scott Wood, Varun Sethi, Bharat Bhushan, Peter Maydell,
Santosh Shukla, Alex Williamson, Alexander Graf,
Antonios Motakis, Christoffer Dall, Kim Phillips,
Stuart
On Fri, 2013-08-30 at 20:15 +1000, Alexey Kardashevskiy wrote:
> From: David Gibson
>
> So far, VFIO has a notion of different logical DMA address spaces, but
> only ever uses one (system memory). This patch extends this, creating
> new VFIOAddressSpace objects as necessary, according to the Add
If a frontend device releases the chardev (via unplug), the chr handlers
are set to NULL via qdev's exit callbacks invoking
qemu_chr_add_handlers(). If the chardev had a pending operation, a
callback will be invoked, which will try to access data in the
just-released frontend, causing a segfault.
On 4 September 2013 06:21, Antony Pavlov wrote:
> Signed-off-by: Antony Pavlov
> ---
> hw/arm/digic.c | 25 ++
> hw/timer/Makefile.objs | 1 +
> hw/timer/digic-timer.c | 122
> +
> hw/timer/digic-timer.h | 19
> includ
This deduplicates code used a lot of times.
CC:
Reviewed-by: Gerd Hoffmann
Signed-off-by: Amit Shah
---
qemu-char.c | 62 +++--
1 file changed, 19 insertions(+), 43 deletions(-)
diff --git a/qemu-char.c b/qemu-char.c
index 99f2b94..0a083
On 5 September 2013 08:52, Antony Pavlov wrote:
> +/*
> + * Samsung K8P3215UQB:
> + * * AMD command set;
> + * * multiple sector size: some sectors are 8K the other ones are 64K.
> + * Alas! The pflash_cfi02_register() function creates a flash
> + * device with unified s
On 5 September 2013 08:52, Antony Pavlov wrote:
> +static int uart_can_rx(void *opaque)
> +{
> +DigicUartState *s = opaque;
> +
> +return !(s->regs[R_ST] & ST_RX_RDY);
> +}
> +
> +static void uart_rx(void *opaque, const uint8_t *buf, int size)
> +{
> +DigicUartState *s = opaque;
> +
>
From: Hu Tao
If offset_within_address_space falls in a page, then we register a
subpage. So check offset_within_address_space rather than
offset_within_region.
Cc: qemu-sta...@nongnu.org
Cc: Paolo Bonzini
Cc: Richard Henderson
Cc: "Andreas Färber"
Cc: Peter Maydell
Cc: Blue Swirl
Signed-off
On Tue, 3 Sep 2013, Liu, Jinsong wrote:
> Anthony PERARD wrote:
> > On 01/09/13 10:51, Liu, Jinsong wrote:
> >> From 86ad3bb83a984ad7bbc00b81d6a0bfc1abc543ca Mon Sep 17 00:00:00
> >> 2001
> >> From: Liu Jinsong
> >> Date: Sun, 1 Sep 2013 23:39:14 +0800
> >> Subject: [PATCH 1/2] qemu-xen: add late
Clarify a comment about the ID register value presented by
the PL110 variant present on the VersatilePB board (based
on testing what the actual hardware does), to indicate that
this is not an error in our emulation, and to remove an #if-0.
Signed-off-by: Peter Maydell
---
I happened to have to ch
Le Thursday 05 Sep 2013 à 18:18:45 (+0800), Fam Zheng a écrit :
> On Thu, 09/05 12:01, Stefan Hajnoczi wrote:
> > On Wed, Sep 04, 2013 at 08:15:36PM +0200, Benoît Canet wrote:
> > > > Propagate operations like snapshot down the tree. block.c is designed
> > > > for bs->file/bs->backing_hd kind of
From: Jan Kiszka
This reverts commit 9b8c69243585a32d14b9bb9fcd52c37b0b5a1b71.
The commit was wrong: We only return -1 on invalid accesses, not on
valid but unbacked ones. This broke various corner cases.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Jan Kiszka
Signed-off-by: Paolo Bonzini
---
m
On 4 September 2013 16:23, Cole Robinson wrote:
> Libvirt uses this to introspect available CPU models.
>
> Signed-off-by: Cole Robinson
Thanks, applied to target-arm.next.
-- PMM
From: Jan Kiszka
Accesses to unassigned io ports shall return -1 on read and be ignored
on write. Ensure these properties via dedicated ops, decoupling us from
the memory core's handling of unassigned accesses.
Cc: qemu-sta...@nongnu.org
Signed-off-by: Jan Kiszka
Signed-off-by: Paolo Bonzini
-
From: liguang
Signed-off-by: liguang
Signed-off-by: Paolo Bonzini
---
exec.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/exec.c b/exec.c
index 3859b02..030118e 100644
--- a/exec.c
+++ b/exec.c
@@ -1810,7 +1810,9 @@ static void memory_map_init(void)
address_space
The problem is introduced by commit 2332616 (exec: Support 64-bit
operations in address_space_rw, 2013-07-08). Before that commit,
memory_access_size would only return 1/2/4.
Since alignment is already handled above, reduce l to the largest
power of two that is smaller than l.
Cc: qemu-sta...@no
Anthony,
the following changes since commit aaa6a40194e9f204cb853f64ef3c1e170bb014e8:
Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into staging
(2013-09-03 12:33:32 -0500)
are available in the git repository at:
git://github.com/bonzini/qemu.git iommu-for-anthony
for y
On 13-09-05 07:15 AM, Stefan Hajnoczi wrote:
> On Mon, Sep 2, 2013 at 2:34 PM, chandrashekar shastri
> wrote:
>> I am testing NPIV feature on upstream Qemu, I have configured the zone
>> and able to see the created vport on the storage array.
>>
>> Since, I am learning on how to setup the NPIV, I
> > How do I make sure that qemu is using the virtual HBA or (vport)?
>
> From my limited knowledge of NPIV, after you create the vport on the host
> you'll have a new "SCSI host" which scans LUNs. That means new SCSI
> devices appear on the host.
>
> You can use "ls -al /sys/class/scsi_host"
Il 03/09/2013 10:17, Michael S. Tsirkin ha scritto:
>> On PPC64 systems MSI Messages are translated to system IRQ in a PCI
>> > host bridge. This is already supported for emulated MSI/MSIX but
>> > not for irqfd where the current QEMU allocates IRQ numbers from
>> > irqchip and maps MSIMessages to
On 05.09.2013, at 18:01, Paolo Bonzini wrote:
> Il 03/09/2013 10:17, Michael S. Tsirkin ha scritto:
>>> On PPC64 systems MSI Messages are translated to system IRQ in a PCI
host bridge. This is already supported for emulated MSI/MSIX but
not for irqfd where the current QEMU allocates IRQ
On 09/05/2013 09:20 AM, Kevin Wolf wrote:
>
> One additional thought that might make the thing a bit more interesting:
> Sequence numbers can wrap around as well.
On the other hand, if sequence numbers are 64-bit, the number of
operations required to cause a wrap far exceeds the expected lifetime
On 09/05/2013 06:32 AM, Claudio Fontana wrote:
>> {
>> -uint32_t half, base, shift, movk = 0;
>> -/* construct halfwords of the immediate with MOVZ/MOVK with LSL */
>> -/* using MOVZ 0x5280 | extended reg.. */
>> -base = (value > 0x) ? 0xd280 : 0x5280;
>> -/
Il 05/09/2013 17:17, Richard Henderson ha scritto:
> On 09/05/2013 01:22 AM, Paolo Bonzini wrote:
>> These use a 32-bit load-of-immediate to save a mflr+addi+mtlr sequence.
>> Tested with a Windows 98 guest (pretty much the most recent thing I
>> could run on my PPC machine) and kvm-unit-tests's si
Am 05.09.2013 um 16:55 hat Stefan Hajnoczi geschrieben:
> On Thu, Sep 5, 2013 at 1:18 PM, Kevin Wolf wrote:
> > Am 05.09.2013 um 11:21 hat Stefan Hajnoczi geschrieben:
> >> On Wed, Sep 04, 2013 at 11:39:51AM +0200, Kevin Wolf wrote:
> >> > > > +A journal is organised in journal blocks, all of whic
On 09/05/2013 04:40 AM, Benjamin Herrenschmidt wrote:
> Only nit: I find "end_mode" a very confusing identifier :-) "end"
> usually means something else ! Why not endian_mode ?
80 column wrapping. A poor excuse, I know...
> I haven't seen the patch itself for some reason (and I'm about to go off
On 09/05/2013 11:18 PM, Andreas Färber wrote:
> Am 05.09.2013 08:01, schrieb Alexey Kardashevskiy:
>> IBM POWERPC processors encode PVR as a CPU family in higher 16 bits and
>> a CPU version in lower 16 bits. Since there is no significant change
>> in behavior between versions, there is no point to
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