On 09/18/2012 06:41 AM, Peter Crosthwaite wrote:
Ping!
Igor, are you able to provide a diff of this patch so I can send the
next revision?
Sure, but I still don't understand what to do with QEMU-lockup issue, I
believe the same topic was discussed here
http://thread.gmane.org/gmane.comp.emul
Sorry for being so confused, I am sure that there is some manual which
I haven't read, but I am not able to find it :-\
I saw some things[1] about multiple vcpu, smp and things like that. It
seemed to me that --enable-io-thread enables it. But, it only works
for KVM, doesn't it? I assume that ther
On 09/17/2012 04:42 PM, Paolo Bonzini wrote:
Il 17/09/2012 12:00, Evgeny Voevodin ha scritto:
Virtio back-end devices can be plugged into both transports:
VIRTIO_PCI and VIRTIO_MMIO. In order to choose the desired
transport we have a property "transport" in every back-end
state struct. By specif
Added device model for the Xilinx Zynq SPI controller (SPIPS).
Signed-off-by: Peter A. G. Crosthwaite
---
hw/arm/Makefile.objs |1 +
hw/xilinx_spips.c| 352 ++
2 files changed, 353 insertions(+), 0 deletions(-)
create mode 100644 hw/xili
Device model for xilinx XPS SPI controller (v2.0)
Signed-off-by: Peter A. G. Crosthwaite
---
changed from v4 (Near total rewrite):
removed timer delay. This was innacturate anyways removed for simlicity.
updated for new SSI interface.
factored out txrx fifos using fifo.h
changed from v3:
typedef'
Added a FIFO API that can be used to create and operate byte FIFOs.
Signed-off-by: Peter A. G. Crosthwaite
---
hw/Makefile.objs |1 +
hw/fifo.c| 78 ++
hw/fifo.h| 47
3 files changed, 12
Removed the explicit SSI mux and wired the CS line directly up to the SSI
devices.
Signed-off-by: Peter A. G. Crosthwaite
---
hw/ssd0323.c |1 +
hw/ssi-sd.c|1 +
hw/stellaris.c | 98 ++--
3 files changed, 19 insertions(+), 81 d
Allow multiple qdev_init_gpio_in() calls for the one device. The first call will
define GPIOs 0-N-1, the next GPIOs N- ... . Allows different GPIOs to be handled
with different handlers. Needed when two levels of the QOM class heirachy both
define GPIO functionality, as a single GPIO handler with a
Ping!
Igor, are you able to provide a diff of this patch so I can send the
next revision?
Regards,
Peter
On Mon, 2012-08-06 at 16:29 +0400, Igor Mitsyanko wrote:
> On 08/06/2012 02:56 PM, Peter Maydell wrote:
> > On 6 August 2012 04:25, Peter A. G. Crosthwaite
> > wrote:
> >
> >> +static uint64
Added default CS behaviour for SSI slaves. SSI devices can set a property
to enable CS behaviour which will create a GPIO on the device which is the
CS. Tristating of the bus on SSI transfers is implemented.
Signed-off-by: Peter A. G. Crosthwaite
---
Changed since v5:
Addressed PMM review.
Collap
Added maintainership for SSI, M25P80 and the Xilinx SPI controllers.
Signed-off-by: Peter A. G. Crosthwaite
---
MAINTAINERS |8
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 61f8b45..0ebe247 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
Added the two SPI controllers to the zynq machine model. Attached two SPI flash
devices to each controller.
Signed-off-by: Peter A. G. Crosthwaite
---
hw/xilinx_zynq.c | 34 ++
1 files changed, 34 insertions(+), 0 deletions(-)
diff --git a/hw/xilinx_zynq.c b/h
Added SPI controller to the reference design, with two n25q128 spi-flashes
connected.
Signed-off-by: Peter A. G. Crosthwaite
---
Changed since v5:
Removed redundant (char*) cast with qdev_get_prop_string
hw/petalogix_ml605_mmu.c | 27 +++
1 files changed, 27 insertions
stellaris_init() defines arrays of qemu_irq to decides what each of the GPIO
pins are connected to. This is ok for inputs (as an input can only have one
source) but is flawed for outputs as an output can connect to any number of
sinks. Removed the gpio_out array completely and just replaced its set
Added device model for m25p80 style SPI flash family.
Signed-off-by: Peter A. G. Crosthwaite
---
changed from v4:
Added write-1 flag (EEPROM mode).
n25q128 table entry indentation fix.
updated for new SSI interface.
various debug messages cleaned up and added.
changed from v3:
changed licence to
Slave creation function that can be used to create an SSI slave without
qdev_init() being called. This give machine models a chance to set properties.
Signed-off-by: Peter A. G. Crosthwaite
---
hw/ssi.c |9 +++--
hw/ssi.h |1 +
2 files changed, 8 insertions(+), 2 deletions(-)
diff
Removed assertion that only one device is attached to the SSI bus.
When multiple devices are attached, all slaves have their transfer function
called for transfers. Each device is responsible for knowing whether or not its
CS is active, and if not returning 0. The returned data is the logical or o
This series reworks the SSI bus framework for SPI and add some new SPI
controllers and devices:
Patches 1-4 reworks SSI to add chip-select support to SPI devices and allow for
multiple SPI devices attached to the same bus.
Patches 5-6 fix the SPI setup in the stellaris machine model.
Patch 7 is
At 09/18/2012 01:56 AM, Luiz Capitulino Wrote:
> Hi Wen,
>
> We've re-reviewed the dump-guest-memory command and found some
> possible issues with the -p option.
>
> The main issue is that it seems possible for a malicious guest to set
> page tables in a way that we allocate a MemoryMapping struc
On Mon, Sep 17, 2012 at 01:24:51PM -0500, Anthony Liguori wrote:
> David Gibson writes:
>
> > tcp_chr_connect(), unlike for example udp_chr_update_read_handler() does
> > not check if the fd it is using is valid (>= 0) before passing it to
> > qemu_set_fd_handler2(). If using e.g. a TCP serial p
The Buildbot has detected a new failure on builder default_i386_rhel61 while
building qemu.
Full details are available at:
http://buildbot.b1-systems.de/qemu/builders/default_i386_rhel61/builds/368
Buildbot URL: http://buildbot.b1-systems.de/qemu/
Buildslave for this Build: kraxel_rhel61_32bit
On Tue, Sep 18, 2012 at 1:13 AM, Andreas Färber wrote:
> Hi,
>
> Am 17.09.2012 10:47, schrieb Peter A. G. Crosthwaite:
>> These names were incorrect. Fixed to match to actual link names
>>
>> Signed-off-by: Peter A. G. Crosthwaite
>> ---
>> hw/xilinx.h |6 --
>> 1 files changed, 4 insert
Hi Stefano,
Is these patches merged with Xen 4.2? I didn't see them in the upstream.
The uint/int fix is critical to fix the nested guest boot issue.
Thanks,
Dongxiao
> -Original Message-
> From: Stefano Stabellini [mailto:stefano.stabell...@eu.citrix.com]
> Sent: Tuesday, September 11,
On Tue, Sep 18, 2012 at 12:15 AM, Eduardo Habkost wrote:
> On Mon, Sep 17, 2012 at 11:54:42PM +0400, malc wrote:
>> On Mon, 17 Sep 2012, Anthony Liguori wrote:
>>
>> > malc writes:
>> >
>> > > Some(thing|one) broke compilation with pcspk enabled.
>> > > Symptoms being:
>> > >
>> > > ../libhw32/hw
Done inside an if (0) so that it is easily eliminated as dead code.
But this will prevent some of the compilation errors with debugging
enabled from creeping back in.
Signed-off-by: Richard Henderson
---
target-mips/translate.c | 48 +++-
1 file change
The large mechanical change in support of a follow-on patch
that changes the representation of the fp registers.
Signed-off-by: Richard Henderson
---
target-mips/translate.c | 312
1 file changed, 153 insertions(+), 159 deletions(-)
diff --git a/
The thread that Aurelien replied to was from March. Going back to
revive that patch I found I'd done some further work in April, which
I may never have got around to posting.
The first three patches fix compilation errors when MIPS_DEBUG_DISAS
is defined.
The second three patches change the mips
With normal FP, this doesn't have much affect on the generated code,
because most of the FP operations are not CONST/PURE, and so we spill
registers in about the same frequency as the explicit load/stores.
But with Loongson multimedia instructions, which are all integral and
whose helpers are in f
Implements all of the COP2 instructions except for the S
family of comparisons. The documentation is unclear for those.
Signed-off-by: Richard Henderson
---
target-mips/Makefile.objs | 2 +-
target-mips/helper.h | 59
target-mips/lmi_helper.c | 744
Jan Kiszka writes:
> On 2012-09-17 22:14, Stefan Weil wrote:
>> This configuration requires CONFIG_i8254:
>>
>> configure --target-list=xtensa-softmmu --audio-card-list=pcspk
>
> This is wrong. The pcspk "audio card" is registered automatically for
> those targets that support it.
>
>>
>> Repor
Not much used yet, but more users to come.
Signed-off-by: Richard Henderson
---
target-mips/translate.c | 64 +
1 file changed, 38 insertions(+), 26 deletions(-)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index df92cec..57454f0
The macro uses the DisasContext. Pass it around as needed.
Signed-off-by: Richard Henderson
---
target-mips/translate.c | 74 +
1 file changed, 38 insertions(+), 36 deletions(-)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index
On 2012-09-17 22:14, Stefan Weil wrote:
> This configuration requires CONFIG_i8254:
>
> configure --target-list=xtensa-softmmu --audio-card-list=pcspk
This is wrong. The pcspk "audio card" is registered automatically for
those targets that support it.
>
> Reported-by: Vassili Karpov (malc)
> S
Used by MIPS_DEBUG, when enabled.
Signed-off-by: Richard Henderson
---
target-mips/translate.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 52eeb2b..50153a9 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@
On 09/17/2012 12:25 PM, Blue Swirl wrote:
> Would it make sense to break up tcg/sparc into tcg/sparc32 and
> tcg/sparc64? That way it would be possible to give Sparc32 a chance of
> getting fixed. But I wouldn't object removal either.
IMO someone would have to actively step forward to maintain spa
On 09/17/2012 12:17 PM, Blue Swirl wrote:
>> > +void tcg_exec_init(unsigned long tb_size)
>> > +{
>> > +#ifndef CONFIG_TCG
>> > +/* We cannot yet use tcg_enabled() here, it is set below. */
>> > +return;
> This leaves a lot of unreachable code after return, possibly
> introducing warnings
On 09/17/12 10:41, Kevin Wolf wrote:
Am 16.09.2012 12:13, schrieb Peter Lieven:
Hi,
when trying to block migrate a VM from one node to another, the source
VM crashed with the following assertion:
block.c:3829: bdrv_set_in_use: Assertion `bs->in_use != in_use' failed.
Is this sth already addres
On 2012-09-17 21:54, malc wrote:
> On Mon, 17 Sep 2012, Anthony Liguori wrote:
>
>> malc writes:
>>
>>> Some(thing|one) broke compilation with pcspk enabled.
>>> Symptoms being:
>>>
>>> ../libhw32/hw/pcspk.o: In function `pcspk_io_write':
>>> /home/malc/x/rcs/git/qemu/hw/pcspk.c:145: undefined re
This configuration requires CONFIG_i8254:
configure --target-list=xtensa-softmmu --audio-card-list=pcspk
Reported-by: Vassili Karpov (malc)
Signed-off-by: Stefan Weil
---
default-configs/xtensa-softmmu.mak |1 +
default-configs/xtensaeb-softmmu.mak |1 +
2 files changed, 2 insertions
On Mon, Sep 17, 2012 at 11:54:42PM +0400, malc wrote:
> On Mon, 17 Sep 2012, Anthony Liguori wrote:
>
> > malc writes:
> >
> > > Some(thing|one) broke compilation with pcspk enabled.
> > > Symptoms being:
> > >
> > > ../libhw32/hw/pcspk.o: In function `pcspk_io_write':
> > > /home/malc/x/rcs/git
This patch adds modelling of the two NOR flash banks found on the
Versatile Express motherboard. Tested with U-Boot running on an emulated
Versatile Express, with either A9 or A15 CoreTile.
Signed-off-by: Francesco Lavra
---
Changes in v2:
Use drive_get_next() instead of drive_get() to get a back
In the A series memory map (implemented in the Cortex A15 CoreTile), the
first NOR flash bank (flash 0) is mapped to address 0x0800, while
address 0x can be configured as alias to either the first or the
second flash bank. This patch fixes the definition of flash 0 address,
and for simp
This patch series adds modelling of the two NOR flash banks found on the
Versatile Express motherboard. Tested with U-Boot running on an emulated
Versatile Express, with either A9 or A15 CoreTile. The alias of the
first NOR flash in the Cortex-A Series memory map is not modelled.
Changes in v2:
Fi
On Mon, Sep 17, 2012 at 11:47:05AM -0700, Richard Henderson wrote:
> On 09/17/2012 11:09 AM, Aurelien Jarno wrote:
> > If you insist, maybe we can just add a movcond op that uses setcond, so
> > it makes the code more readable?
>
> Well, that's certainly a good first step. And an easy fall back f
On Mon, 17 Sep 2012, Anthony Liguori wrote:
> malc writes:
>
> > Some(thing|one) broke compilation with pcspk enabled.
> > Symptoms being:
> >
> > ../libhw32/hw/pcspk.o: In function `pcspk_io_write':
> > /home/malc/x/rcs/git/qemu/hw/pcspk.c:145: undefined reference to
> > `pit_set_gate'
> > ../
On 09/17/2012 01:38 PM, Anthony Liguori wrote:
> Mike Frysinger writes:
>
>> We should not quote the PKG_CONFIG setting as this deviates from the
>> canonical upstream behavior that gets integrated with all other build
>> systems, and deviates from how we treat all other toolchain variables
>> th
Mike Frysinger writes:
> We should not quote the PKG_CONFIG setting as this deviates from the
> canonical upstream behavior that gets integrated with all other build
> systems, and deviates from how we treat all other toolchain variables
> that we get from the environment.
>
> Ultimately, the poi
malc writes:
> Some(thing|one) broke compilation with pcspk enabled.
> Symptoms being:
>
> ../libhw32/hw/pcspk.o: In function `pcspk_io_write':
> /home/malc/x/rcs/git/qemu/hw/pcspk.c:145: undefined reference to
> `pit_set_gate'
> ../libhw32/hw/pcspk.o: In function `pcspk_io_read':
> /home/malc/x
Don Slutz writes:
> On 09/05/12 16:24, Don Slutz wrote:
>> On 08/31/12 13:27, Jan Kiszka wrote:
>>> On 2012-08-31 19:20, Don Slutz wrote:
This is known is linux as VMWARE_PORT_CMD_GETHZ.
Signed-off-by: Don Slutz
---
hw/vmport.c | 23 ++-
1 f
On Mon, Sep 17, 2012 at 10:00:50AM -0400, Don Slutz wrote:
> Resend with new id so the backup files are not included.
>
> Also known as Paravirtualization CPUIDs.
>
> This is primarily done so that the guest will think it is running
> under vmware when hypervisor-vendor=vmware is specified as a
>
On Mon, Sep 17, 2012 at 5:05 PM, Richard Henderson wrote:
> On 09/17/2012 09:04 AM, Andreas Färber wrote:
>> Without knowing the code, this does not strike me as the best of ideas:
>> SPARC CPUs are rather uncommon these days, so being able to emulate it
>> in sparc32-softmmu may be helpful for ke
On Mon, Sep 17, 2012 at 4:00 PM, Paolo Bonzini wrote:
> This is an old series from Anthony that was never committed. Now
> that QEMU does not use ARG0 anymore, it is much simpler to move things
> to and from the helper.c files as needed to remove most of the TCG code
> from non-TCG builds.
>
> Of
On Mon, Sep 17, 2012 at 4:00 PM, Paolo Bonzini wrote:
> Add stubs for cpu_restore_state and tlb_fill, which should respectively
> have no effect and never be used outside TCG mode.
>
> Add assertions that TCG is enabled around code that calls to TCG from
> exec.c, so that the compiler can remove t
On 17 September 2012 19:53, Stefano Stabellini
wrote:
> On Mon, 17 Sep 2012, Stefano Stabellini wrote:
>> On Mon, 17 Sep 2012, Peter Maydell wrote:
>> > This is a change in behaviour, isn't it? The old configure code
>> > enables CONFIG_XEN based only on $target_arch2, it doesn't try
>> > to ensur
On Mon, Sep 17, 2012 at 4:00 PM, Paolo Bonzini wrote:
> This lets non-TCG build remove *_helper.c from the build.
>
> Signed-off-by: Paolo Bonzini
> ---
> target-i386/cpu.c | 18 ++
> target-i386/excp_helper.c | 24
> target-i386/fpu_helper.c | 1
On Mon, Sep 17, 2012 at 2:23 AM, Wenchao Xia wrote:
> 于 2012-9-15 2:11, Blue Swirl 写道:
>
>> On Thu, Sep 13, 2012 at 3:49 AM, Eric Blake wrote:
>>>
>>> On 09/12/2012 09:33 PM, Eric Blake wrote:
>
> OK ,then I think
> #if __GNUC__ >= 4
>
> #else
>[warn name space
On Mon, Sep 17, 2012 at 11:54:59AM -0700, Richard Henderson wrote:
> On 09/07/2012 05:32 PM, Aurelien Jarno wrote:
> >> +do_shift:
> >> +switch (opc) {
> >> +case OPC_SLL_CP2:
> >> +case OPC_DSLL_CP2:
> >> +tcg_gen_shl_i64(t0, t0, t1);
> >> +break
On 17 September 2012 19:25, Paolo Bonzini wrote:
> Il 17/09/2012 19:20, Peter Maydell ha scritto:
>>> > Couldn't that mean simply that the tb for instance wasn't mapped
>>> > anywhere? That's the KVM case, at least.
>> Hmm. For TCG there are certainly some cases where failure to
>> cpu_restore_st
On 09/07/2012 05:32 PM, Aurelien Jarno wrote:
>> +do_shift:
>> +switch (opc) {
>> +case OPC_SLL_CP2:
>> +case OPC_DSLL_CP2:
>> +tcg_gen_shl_i64(t0, t0, t1);
>> +break;
>> +case OPC_SRA_CP2:
>> +case OPC_DSRA_CP2:
>> +/*
On Mon, 17 Sep 2012, Stefano Stabellini wrote:
> On Mon, 17 Sep 2012, Peter Maydell wrote:
> > On 17 September 2012 17:00, Paolo Bonzini wrote:
> > > Signed-off-by: Paolo Bonzini
> > > ---
> > > configure | 63
> > > +--
> > > 1 file m
On Mon, Sep 17, 2012 at 11:19 AM, Aurelien Jarno wrote:
> On Mon, Sep 17, 2012 at 10:27:35AM -0700, Clemens Kolbitsch wrote:
>> On Mon, Sep 10, 2012 at 10:31 AM, Aurelien Jarno
>> wrote:
>> > On Mon, Sep 10, 2012 at 06:23:43PM +0200, Stefan Weil wrote:
>> >> Am 10.09.2012 08:19, schrieb Clemens
On 09/17/2012 11:09 AM, Aurelien Jarno wrote:
> If you insist, maybe we can just add a movcond op that uses setcond, so
> it makes the code more readable?
Well, that's certainly a good first step. And an easy fall back for
hosts that choose not to implement the full conditional move. But at
leas
Il 17/09/2012 19:12, Peter Maydell ha scritto:
>> > +
>> > +if (env->watchpoint_hit) {
>> > +if (env->watchpoint_hit->flags & BP_CPU) {
>> > +env->watchpoint_hit = NULL;
>> > +if (check_hw_breakpoints(env, 0))
>> > +raise_exception(env, EXCP01_DB)
On 2012-09-17 20:32, Mike Frysinger wrote:
> On Monday 17 September 2012 03:19:54 Jan Kiszka wrote:
>> On 2012-09-16 22:55, Mike Frysinger wrote:
>>> On Sunday 16 September 2012 16:33:15 Stefan Weil wrote:
Am 16.09.2012 22:11, schrieb Mike Frysinger:
> +libcacard/vscclient +a.out* +.gdb_hi
On Monday 17 September 2012 03:19:54 Jan Kiszka wrote:
> On 2012-09-16 22:55, Mike Frysinger wrote:
> > On Sunday 16 September 2012 16:33:15 Stefan Weil wrote:
> >> Am 16.09.2012 22:11, schrieb Mike Frysinger:
> >>> +libcacard/vscclient +a.out* +.gdb_history +core +gmon.out
> >>> +*.diff +*.patch +
On Mon, 17 Sep 2012, Peter Maydell wrote:
> On 17 September 2012 17:00, Paolo Bonzini wrote:
> > Signed-off-by: Paolo Bonzini
> > ---
> > configure | 63
> > +--
> > 1 file modificato, 37 inserzioni(+), 26 rimozioni(-)
> >
> > diff --g
Stefan Hajnoczi writes:
> Fixes for hung NICs, USB network interface packet dropping, and inefficient
> netdev socket non-blocking I/O.
>
> The following changes since commit e0a1e32dbc41e6b2aabb436a9417dfd32177a3dc:
>
> Merge branch 'usb.64' of git://git.kraxel.org/qemu (2012-09-11 18:06:56
>
Luiz Capitulino writes:
> It allows to disable memory merge support (KSM on Linux), which is
> enabled by default otherwise.
>
> Signed-off-by: Luiz Capitulino
Applied. Thanks.
Regards,
Anthony Liguori
> ---
>
> v5
>
> - rebase on top of current master
>
> exec.c | 19 +
Il 17/09/2012 19:20, Peter Maydell ha scritto:
>> > Couldn't that mean simply that the tb for instance wasn't mapped
>> > anywhere? That's the KVM case, at least.
> Hmm. For TCG there are certainly some cases where failure to
> cpu_restore_state() means that the current CPU state is now broken;
>
Jan Kiszka writes:
> We have debugcon these days to listen on those ports that receive debug
> messages. Also drop the others that have no effect anymore.
>
> Signed-off-by: Jan Kiszka
Applied. Thanks.
Regards,
Anthony Liguori
> ---
> hw/pc.c | 27 ---
> 1 files ch
David Gibson writes:
> tcp_chr_connect(), unlike for example udp_chr_update_read_handler() does
> not check if the fd it is using is valid (>= 0) before passing it to
> qemu_set_fd_handler2(). If using e.g. a TCP serial port, which is not
> initially connected, this can result in -1 being passed
On Mon, 17 Sep 2012, Paolo Bonzini wrote:
> Il 17/09/2012 19:02, Peter Maydell ha scritto:
> > If Xen requires 64 bit physaddrs it should probably just be asserting
> > this here, not randomly changing target_phys_bits. In fact all the
> > supported Xen target archs already have 64 bit physaddrs, s
Marcelo Tosatti writes:
> The following changes since commit e0a1e32dbc41e6b2aabb436a9417dfd32177a3dc:
>
> Merge branch 'usb.64' of git://git.kraxel.org/qemu (2012-09-11 18:06:56
> +0200)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/virt/kvm/qemu-kvm.git uq/ma
Gerd Hoffmann writes:
> Hi,
>
> This pull brings monitor configuration support for qxl which is needed
> by the upcoming kms qxl driver. Also a nice speedup for qxl in vga mode
> and as usual some bugfixes.
>
> please pull,
> Gerd
>
> The following changes since commit e0a1e32dbc41e6b2aabb43
Stefan Hajnoczi writes:
> The following changes since commit e0a1e32dbc41e6b2aabb436a9417dfd32177a3dc:
>
> Merge branch 'usb.64' of git://git.kraxel.org/qemu (2012-09-11 18:06:56
> +0200)
>
> are available in the git repository at:
>
>
> git://github.com/stefanha/qemu.git trivial-patches
>
>
Kevin Wolf writes:
> The following changes since commit e0a1e32dbc41e6b2aabb436a9417dfd32177a3dc:
>
> Merge branch 'usb.64' of git://git.kraxel.org/qemu (2012-09-11 18:06:56
> +0200)
>
> are available in the git repository at:
>
> git://repo.or.cz/qemu/kevin.git for-anthony
>
Pulled. Thanks
Jan Kiszka writes:
> The following changes since commit e0a1e32dbc41e6b2aabb436a9417dfd32177a3dc:
>
> Merge branch 'usb.64' of git://git.kraxel.org/qemu (2012-09-11 18:06:56
> +0200)
>
> are available in the git repository at:
>
Pulled. Thanks.
Regards,
Anthony Liguori
> git://git.kiszka
On Mon, Sep 17, 2012 at 10:27:35AM -0700, Clemens Kolbitsch wrote:
> On Mon, Sep 10, 2012 at 10:31 AM, Aurelien Jarno wrote:
> > On Mon, Sep 10, 2012 at 06:23:43PM +0200, Stefan Weil wrote:
> >> Am 10.09.2012 08:19, schrieb Clemens Kolbitsch:
> >> >On Sat, Sep 8, 2012 at 11:22 AM, Clemens Kolbitsc
On Mon, Sep 17, 2012 at 08:36:31AM -0700, Richard Henderson wrote:
> On 09/16/2012 04:08 PM, Aurelien Jarno wrote:
> > +tcg_gen_setcondi_i32(TCG_COND_GE, tmp2, tmp1, 32); \
> > +tcg_gen_andi_i32(tmp1, tmp1, 0x1f);\
> > +tcg_gen_##name##_i32(dest, t0, tmp1);
On 09/17/2012 11:56 AM, Luiz Capitulino wrote:
> Hi Wen,
>
> We've re-reviewed the dump-guest-memory command and found some
> possible issues with the -p option.
>
> However, I also think that we should consider if having the -p
> feature is really worth it. It's a complex feature and has a numb
On 09/16/2012 01:39 PM, Peter Lieven wrote:
> Hi,
>
> I remember that this was broken some time ago and currently with qemu-kvm
> 1.2.0 I am still not able to use
> block migration plus xbzrle. The migration fails if both are used together.
> XBZRLE without block migration works.
>
> Can someon
Hi Wen,
We've re-reviewed the dump-guest-memory command and found some
possible issues with the -p option.
The main issue is that it seems possible for a malicious guest to set
page tables in a way that we allocate a MemoryMapping structure for
each possible PTE. If IA-32e paging is used, this co
Some(thing|one) broke compilation with pcspk enabled.
Symptoms being:
../libhw32/hw/pcspk.o: In function `pcspk_io_write':
/home/malc/x/rcs/git/qemu/hw/pcspk.c:145: undefined reference to `pit_set_gate'
../libhw32/hw/pcspk.o: In function `pcspk_io_read':
/home/malc/x/rcs/git/qemu/hw/pcspk.c:130:
Hi Eduardo,
Am 05.09.2012 22:41, schrieb Eduardo Habkost:
> This is a small queue of patches that I consider "ready to go", that didn't
> enter QEMU 1.2.
>
> Eduardo Habkost (5):
> i386: add missing CPUID_* constants
> move CPU models from cpus-x86_64.conf to C
> eliminate cpus-x86_64.conf
On 09/17/2012 03:21 PM, Peter Maydell wrote:
> On 5 September 2012 20:07, Francesco Lavra
> wrote:
>> Documentation at
>> http://infocenter.arm.com/help/topic/com.arm.doc.ddi0503c/CHDEFDJF.html
>> says that the entire first 512 MB can be mapped to either SMC (which is
>> the default) or AXI, so i
On Mon, Sep 10, 2012 at 10:31 AM, Aurelien Jarno wrote:
> On Mon, Sep 10, 2012 at 06:23:43PM +0200, Stefan Weil wrote:
>> Am 10.09.2012 08:19, schrieb Clemens Kolbitsch:
>> >On Sat, Sep 8, 2012 at 11:22 AM, Clemens Kolbitsch
>> > wrote:
>> >>On Fri, Sep 7, 2012 at 9:26 PM, Stefan Weil wrote:
>> >
On 17 September 2012 18:09, Paolo Bonzini wrote:
> Il 17/09/2012 19:06, Peter Maydell ha scritto:
>>> > The return value is used nowhere.
>> ...it looks like we should probably assert() rather than ploughing
>> blindly forward if we try to restore state to match a PC value and
>> it doesn't work f
cutils.c and iov.c appeared in the Makefile in multiple spots. Clean
this up by moving them respectively to oslib-obj-y and block-obj-y.
Notably, qemu-ga and user-mode emulation both need cutils.c but not iov.c.
async.o was linked in tools via both tools-obj-y and block-obj-y.
Remove the former,
From: Anthony Liguori
This lets you build without TCG (KVM/Xen/qtest only). When this flag
is passed to configure, it will automatically filter out the target list
to only those that support KVM or Xen.
Signed-off-by: Anthony Liguori
Signed-off-by: Paolo Bonzini
---
configure | 38 ++
Signed-off-by: Andreas Färber
---
I keep bugging other maintainers about documenting their files in MAINTAINERS,
yet the CPU files I added were not... I'm queuing this for the next CPU pull.
We'll have to update it if we split or rearrange this files for linux-user.
MAINTAINERS |6 ++
Signed-off-by: Paolo Bonzini
---
libcacard/Makefile | 2 +-
1 file modificato, 1 inserzione(+). 1 rimozione(-)
diff --git a/libcacard/Makefile b/libcacard/Makefile
index 63990b7..c2c0212 100644
--- a/libcacard/Makefile
+++ b/libcacard/Makefile
@@ -10,7 +10,7 @@ $(call set-vpath, $(SRC_PATH))
QE
libcacard does not use the QEMU main loop, do not link it in.
Signed-off-by: Paolo Bonzini
---
Makefile | 2 +-
1 file modificato, 1 inserzione(+). 1 rimozione(-)
diff --git a/Makefile b/Makefile
index a8078ec..4cc4e3a 100644
--- a/Makefile
+++ b/Makefile
@@ -158,7 +158,7 @@ qemu-io$(EXESUF): q
On 17 September 2012 18:09, Paolo Bonzini wrote:
> Il 17/09/2012 19:02, Peter Maydell ha scritto:
>> If Xen requires 64 bit physaddrs it should probably just be asserting
>> this here, not randomly changing target_phys_bits. In fact all the
>> supported Xen target archs already have 64 bit physadd
On 17 September 2012 17:00, Paolo Bonzini wrote:
> This lets non-TCG build remove *_helper.c from the build.
>
> Signed-off-by: Paolo Bonzini
> ---
> target-i386/cpu.c | 18 ++
> target-i386/excp_helper.c | 24
> target-i386/fpu_helper.c | 18 ---
Il 17/09/2012 19:06, Peter Maydell ha scritto:
>> > The return value is used nowhere.
> ...it looks like we should probably assert() rather than ploughing
> blindly forward if we try to restore state to match a PC value and
> it doesn't work for some reason.
Couldn't that mean simply that the tb f
Il 17/09/2012 19:02, Peter Maydell ha scritto:
> If Xen requires 64 bit physaddrs it should probably just be asserting
> this here, not randomly changing target_phys_bits. In fact all the
> supported Xen target archs already have 64 bit physaddrs, so it's
> harmless. But if there ever were a target
Move this variable to Makefile.objs, together with all the other lists
of object files.
Signed-off-by: Paolo Bonzini
---
Makefile | 5 -
Makefile.objs | 9 +
2 file modificati, 9 inserzioni(+), 5 rimozioni(-)
diff --git a/Makefile b/Makefile
index fffbbb8..a8078ec 100644
--- a/
On 17 September 2012 17:00, Paolo Bonzini wrote:
> The return value is used nowhere.
...it looks like we should probably assert() rather than ploughing
blindly forward if we try to restore state to match a PC value and
it doesn't work for some reason.
-- PMM
On 09/17/2012 09:04 AM, Andreas Färber wrote:
> Without knowing the code, this does not strike me as the best of ideas:
> SPARC CPUs are rather uncommon these days, so being able to emulate it
> in sparc32-softmmu may be helpful for keeping it working.
>
> Could you elaborate on what exactly is br
Signed-off-by: Paolo Bonzini
---
rules.mak | 2 +-
1 file modificato, 1 inserzione(+). 1 rimozione(-)
diff --git a/rules.mak b/rules.mak
index 0327426..13ba62b 100644
--- a/rules.mak
+++ b/rules.mak
@@ -71,7 +71,7 @@ TRACETOOL=$(PYTHON) $(SRC_PATH)/scripts/tracetool.py
@test -f $@ || cp
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