On Sat, 14 Apr 2012, Herv? Poussineau wrote:
> PC speaker has been moved to target-independant code in
> 71093711589dafcb920dc3bc9bb811eaf8b14101,
> so do not depend of target to include it or not.
>
> Cc: malc
> Cc: Blue Swirl
> Signed-off-by: Herv? Poussineau
Thanks, applied.
--
mailto:a
Am 15.04.2012 05:10, schrieb Andreas Färber:
> Hello,
>
> This series splits up my m68k QOM'ification patch from the qom-cpu-others RFC
> series.
> CPU models are now modelled as subclasses with their own initfns, leaving the
> setting of feature flags imperative.
>
> Please review and apply.
>
Move model-independent code from cpu_m68k_init() into a QOM initfn.
Signed-off-by: Andreas Färber
---
target-m68k/cpu.c|9 +
target-m68k/helper.c |2 +-
2 files changed, 10 insertions(+), 1 deletions(-)
diff --git a/target-m68k/cpu.c b/target-m68k/cpu.c
index e599ece..0bb1b2
Hello,
This series splits up my m68k QOM'ification patch from the qom-cpu-others RFC
series.
CPU models are now modelled as subclasses with their own initfns, leaving the
setting of feature flags imperative.
Please review and apply.
Available from:
git://github.com/afaerber/qemu-cpu.git qom-cpu
Move code from cpu_m68k_set_model() into model-specific initfns
and inline the remaining parts into cpu_m68k_init().
Let m68k_cpu_list() print CPU classes alphabetically except for "any".
Signed-off-by: Andreas Färber
---
target-m68k/cpu.c| 89 +-
target-m6
Embed CPUM68KState as first member of QOM M68kCPU.
Drop cpu_m68k_close() in favor of object_delete().
Let CPUClass::reset() call cpu_state_reset() for now.
Signed-off-by: Andreas Färber
---
Makefile.target |1 +
target-m68k/cpu-qom.h | 70
Move code from cpu_state_reset() into QOM m68k_cpu_reset().
Signed-off-by: Andreas Färber
---
target-m68k/cpu.c| 16 +++-
target-m68k/helper.c | 18 ++
2 files changed, 17 insertions(+), 17 deletions(-)
diff --git a/target-m68k/cpu.c b/target-m68k/cpu.c
index
The 1.7.0 version of SeaBIOS has now been released. For more
information on the release, please see:
http://seabios.org/Releases
New in this release:
* Many enhancements to VGA BIOS code - it should now be feature complete with
LGPL vgabios.
* Support for virtio-scsi.
* Improved USB drive (us
Hello,
This series converts the SuperH CPU to QOM.
Subclasses and the controversial QOM'ification of the SH7750 SoC are postponed.
I tested it using the sh-test-0.2 test image.
Patches 1-3 do the actual CPU QOM'ification, introducing SuperHCPU.
Patch 4 is a bugfix noticed during QOM'ification.
P
Move code from cpu_sh4_init() into a QOM initfn.
Signed-off-by: Andreas Färber
---
target-sh4/cpu.c | 13 +
target-sh4/translate.c |3 ---
2 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/target-sh4/cpu.c b/target-sh4/cpu.c
index 84d4672..5dab9ea 100644
---
Simplifies TLB helper code.
Signed-off-by: Andreas Färber
---
target-sh4/helper.c | 49 +
1 files changed, 25 insertions(+), 24 deletions(-)
diff --git a/target-sh4/helper.c b/target-sh4/helper.c
index 3653ece..d273097 100644
--- a/target-sh4/he
Move them out of CPUSH4State so that they are not zero'ed on reset.
Signed-off-by: Andreas Färber
---
hw/sh7750.c|5 +++--
target-sh4/cpu-qom.h |3 +++
target-sh4/cpu.h |3 ---
target-sh4/translate.c |5 +++--
4 files changed, 9 insertions(+), 7 deletions(-)
Change argument type from CPUSH4State to SuperHCPU.
This simplifies the SH7750 SoC as its only caller.
Signed-off-by: Andreas Färber
---
hw/sh7750.c |2 +-
target-sh4/cpu.h|2 +-
target-sh4/helper.c |8
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git
In place of CPUSH4State use SuperHCPU for SH7750State::cpu field.
Fix tab indentation on those lines and add braces.
Signed-off-by: Andreas Färber
---
hw/sh7750.c | 69 ++-
1 files changed, 35 insertions(+), 34 deletions(-)
diff --git a
On 14 April 2012 18:39, Andreas Färber wrote:
> Am 14.04.2012 18:42, schrieb Peter Maydell:
>> Register subclasses for each ARM CPU implementation (with the
>> exception of "pxa270", which is an alias for "pxa270-a0").
>
> This is no longer accurate, we do have a subclass for "pxa270" again.
Oops
Change argument type to SuperHCPU and update the SH7750 SoC.
Signed-off-by: Andreas Färber
---
hw/sh7750.c | 16 ++--
target-sh4/cpu.h| 16 ++--
target-sh4/helper.c | 63 ++-
3 files changed, 48 insertions(+), 47 d
Embed CPUSH4State as first member of SuperHCPU.
Let CPUClass::reset() call cpu_state_reset() for now.
Signed-off-by: Andreas Färber
---
Makefile.target|1 +
target-sh4/cpu-qom.h | 70
target-sh4/cpu.c | 60
Signed-off-by: Andreas Färber
---
target-sh4/helper.c | 23 ---
1 files changed, 12 insertions(+), 11 deletions(-)
diff --git a/target-sh4/helper.c b/target-sh4/helper.c
index 655faaa..2d5a4e4 100644
--- a/target-sh4/helper.c
+++ b/target-sh4/helper.c
@@ -269,17 +269,18 @@
Signed-off-by: Andreas Färber
---
target-sh4/helper.c | 18 +++---
1 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/target-sh4/helper.c b/target-sh4/helper.c
index c5c0593..c291eee 100644
--- a/target-sh4/helper.c
+++ b/target-sh4/helper.c
@@ -227,17 +227,21 @@ static
Signed-off-by: Andreas Färber
---
target-sh4/helper.c | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/target-sh4/helper.c b/target-sh4/helper.c
index ffe79ec..c5c0593 100644
--- a/target-sh4/helper.c
+++ b/target-sh4/helper.c
@@ -202,7 +202,7 @@ void do_interrupt
On 04/14/2012 03:44 PM, 陳韋任 wrote:
>> I've made a test from the grub multiboot sample, you may find it here:
>> http://jcmvbkbc.spb.ru/git/?p=dumb/qemu-test-kernel.git;a=summary
>>
>> With it I see that an attempt to execute a TB that spans two pages causes
>> an exception when the second page is
Signed-off-by: Andreas Färber
---
target-sh4/helper.c | 29 +++--
1 files changed, 15 insertions(+), 14 deletions(-)
diff --git a/target-sh4/helper.c b/target-sh4/helper.c
index 2d5a4e4..d2186ed 100644
--- a/target-sh4/helper.c
+++ b/target-sh4/helper.c
@@ -243,15 +243,
Move code from cpu_state_reset() to QOM superh_cpu_reset().
Signed-off-by: Andreas Färber
---
target-sh4/cpu.c | 21 -
target-sh4/translate.c | 22 ++
2 files changed, 22 insertions(+), 21 deletions(-)
diff --git a/target-sh4/cpu.c b/target-sh4/
Signed-off-by: Andreas Färber
---
target-sh4/helper.c | 14 +++---
1 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/target-sh4/helper.c b/target-sh4/helper.c
index d273097..ffe79ec 100644
--- a/target-sh4/helper.c
+++ b/target-sh4/helper.c
@@ -286,18 +286,18 @@ static void
Am 14.04.2012 22:59, schrieb Stefan Weil:
Fixing problems at their source - in this
case fixing gdb - is of course the best solution.
For the w64 port of gdb, I needed a quick solution.
s/gdb/qemu/
Sorry for this mistake.
Am 14.04.2012 18:42, schrieb Richard Henderson:
On 04/07/2012 11:53 AM, Stefan Weil wrote:
Not all i386 / x86_64 hosts use ELF.
Ask the compiler whether ELF is used.
On w64, gdb crashes when ELF_HOST_MACHINE is defined.
Hmm. Because the other way this could be addressed is
to fix gdb. (1) it
Speaker init has been added in 506b7ddf889312659b36c667f7ae17bc9e909418,
but audio subsystem init was missing.
Signed-off-by: Hervé Poussineau
---
hw/ppc_prep.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c
index 6a0d81d..0dbe2ba 100644
PC speaker has been moved to target-independant code in
71093711589dafcb920dc3bc9bb811eaf8b14101,
so do not depend of target to include it or not.
Cc: malc
Cc: Blue Swirl
Signed-off-by: Hervé Poussineau
---
arch_init.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/
We can't however replace the built-in IDE controller, as the one in pc87312
is only single-channel and can use only IRQ 14.
PReP emulation also gains a parallel port emulation.
Cc: Andreas Färber
Signed-off-by: Hervé Poussineau
---
default-configs/ppc-softmmu.mak |2 ++
hw/ppc_prep.c
This provides floppy and IDE controllers as well as serial and parallel ports.
However, dynamic configuration of devices is not yet supported.
Cc: Andreas Färber
Signed-off-by: Hervé Poussineau
---
Makefile.objs |1 +
hw/pc87312.c | 405
Register is one byte-wide (as per specification), so there is no need to
specify endianness.
Signed-off-by: Hervé Poussineau
---
hw/ppc_prep.c | 36
hw/prep_pci.c | 14 ++
2 files changed, 14 insertions(+), 36 deletions(-)
diff --git a/hw/pp
Signed-off-by: Hervé Poussineau
---
hw/isa.h |5 +
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/hw/isa.h b/hw/isa.h
index 40373fb..f7bc4b5 100644
--- a/hw/isa.h
+++ b/hw/isa.h
@@ -76,6 +76,11 @@ void isa_register_portio_list(ISADevice *dev, uint16_t start,
Hi,
Patches 1 to 3 implement the pc87312 Super I/O chip. This patch has
been tested on PReP emulation and on IBM 40p (not yet committed).
Missing part is dynamic reconfiguration of devices (serial, parallel,
floppy, IDE). However, it is not strictly needed as initial
configuration can be changed w
found that there is patch available for this bug but the patch is for Ubuntu
8.04.4 LTS(2.6.24-26). I am looking if the same patch is available for Ubuntu
10.04.2 LTS. Here is the link describing about the bug and its available patch.
please advise.
https://bugs.launchpad.net/ubuntu/hardy/+sour
Hello all,
I am writing to ask whether there is any possibility of silent data
corruption with virtIO/qemu.
My files inside the guest are getting zeroed out. Specifically, bytes
512 to 4096 on some files are being zeroed out. (some 60K files out of
5Million are showing this so far). The virtua
> I've made a test from the grub multiboot sample, you may find it here:
> http://jcmvbkbc.spb.ru/git/?p=dumb/qemu-test-kernel.git;a=summary
>
> With it I see that an attempt to execute a TB that spans two pages causes
> an exception when the second page is unmapped. It happens because both
> tlb_f
Move cache ID register reset out of cpu_reset_model_id() by
creating a field for the reset value in ARMCPU and setting it
up in the cpu specific init functions.
Signed-off-by: Peter Maydell
---
target-arm/cpu-qom.h |5 +
target-arm/cpu.c | 11 +++
target-arm/helper.c | 1
Move the MVFR* VFP feature register values to ARMCPU,
so they are set up by the implementation-specific instance
init functions rather than in cpu_reset_model_id().
Signed-off-by: Peter Maydell
---
target-arm/cpu-qom.h |2 ++
target-arm/cpu.c | 14 ++
target-arm/helper.c |
cpu_reset_model_id() is now empty and we can remove it.
Signed-off-by: Peter Maydell
---
target-arm/helper.c | 59 +--
1 files changed, 1 insertions(+), 58 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 5cbc7e0..653885
Move the reset value of SCTLR to ARMCPU, initialised in
the per-cpu init functions. It can then be reset by a
simple copy, and we can drop the code from cpu_reset_model_id().
Signed-off-by: Peter Maydell
---
target-arm/cpu-qom.h |1 +
target-arm/cpu.c | 23 +++
targ
Now that cpu_reset_model_id() has gone we can move the
reset code over to the class reset function and have cpu_state_reset
simply do a reset on the CPU QOM object.
Signed-off-by: Peter Maydell
---
target-arm/cpu.c| 94 +++--
target-arm/helper.c
Move the iWMMXT wCID reset to cpu_state_reset(). Since
we use the same value for all CPUs with this feature
(with the major/minor revision fields set to the QEMU
specific 'Q' value) there's no need to create an ARMCPU
field just for this.
Signed-off-by: Peter Maydell
---
target-arm/helper.c |
This patch series builds on Andreas' basic QOMification of the ARM
CPU by creating a QOM subclass for each ARM CPU implementation
(926,1176,A8,etc). We can then move the setup of feature bits, register
reset values, constant ID register values, etc, from the big switch
statement in cpu_reset_model_
Am 14.04.2012 18:42, schrieb Peter Maydell:
> Move the setting of the feature bits from cpu_reset_model_id()
> to each CPU's instance init function. This requires us to move
> the features field in CPUARMState so that it is not cleared
> on reset.
>
> Signed-off-by: Peter Maydell
> ---
> target-
This patch series builds on Andreas' basic QOMification of the ARM
CPU by creating a QOM subclass for each ARM CPU implementation
(926,1176,A8,etc). We can then move the setup of feature bits, register
reset values, constant ID register values, etc, from the big switch
statement in cpu_reset_model_
Am 14.04.2012 18:42, schrieb Peter Maydell:
> Register subclasses for each ARM CPU implementation (with the
> exception of "pxa270", which is an alias for "pxa270-a0").
This is no longer accurate, we do have a subclass for "pxa270" again.
> +/* "pxa270" is a legacy alias for "pxa270-a0" */
>
Move CTR (cache type register) value to an ARMCPU field
set up by per-cpu init fns.
Signed-off-by: Peter Maydell
---
target-arm/cpu-qom.h |1 +
target-arm/cpu.c | 22 ++
target-arm/helper.c | 13 +
3 files changed, 24 insertions(+), 12 deletions(-)
d
Am 14.04.2012 18:42, schrieb Peter Maydell:
> None of the machines in QEMU offer a JTAG debug interface, so this info
> was unused. Further, the PXA250 ID contradicts the February 2002
> Developer's Manual, which has it as 0xn9264013 with n the MIDR Revision.
>
Signed-off-by: Andreas Färber
> S
Move the setting of the feature bits from cpu_reset_model_id()
to each CPU's instance init function. This requires us to move
the features field in CPUARMState so that it is not cleared
on reset.
Signed-off-by: Peter Maydell
---
target-arm/cpu-qom.h |1 +
target-arm/cpu.c | 136
Am 14.04.2012 18:42, schrieb Peter Maydell:
> Move the OMAP-specific cp15_i_{max,min} reset to cpu_state_reset;
> since these registers are only accessible on CPUs with the
> OMAPCP feature set there's no need to guard this reset with
> either a CPUID or feature bit check.
>
> Signed-off-by: Peter
Move the reset FPSID to the ARMCPU struct, and set it in the
per-implementation instance init function. At reset we then
just copy the reset value into the CPUARMState field.
Signed-off-by: Peter Maydell
---
target-arm/cpu-qom.h |1 +
target-arm/cpu.c |9 +
target-arm/helper.
Am 14.04.2012 18:42, schrieb Peter Maydell:
> Move the iWMMXT wCID reset to cpu_state_reset(). Since
> we use the same value for all CPUs with this feature
> (with the major/minor revision fields set to the QEMU
> specific 'Q' value) there's no need to create an ARMCPU
> field just for this.
>
> S
Register subclasses for each ARM CPU implementation (with the
exception of "pxa270", which is an alias for "pxa270-a0").
Let arm_cpu_list() enumerate CPU subclasses in alphabetical order,
except for special value "any".
Replace cpu_arm_find_by_name()'s string -> CPUID lookup by storing the
CPUID
None of the machines in QEMU offer a JTAG debug interface, so this info
was unused. Further, the PXA250 ID contradicts the February 2002
Developer's Manual, which has it as 0xn9264013 with n the MIDR Revision.
Signed-off-by: Peter Maydell
---
target-arm/helper.c |2 --
1 files changed, 0 ins
Move the OMAP-specific cp15_i_{max,min} reset to cpu_state_reset;
since these registers are only accessible on CPUs with the
OMAPCP feature set there's no need to guard this reset with
either a CPUID or feature bit check.
Signed-off-by: Peter Maydell
---
target-arm/helper.c |3 +--
1 files c
Move the A9 config_base_address cp15 register reset value to
ARMCPU. This should become a QOM property so that the Highbank
board can set it without having to pull in cpu-qom.h, but at
least this avoids the implicit dependency on reset ordering
that the previous workaround had.
Cc: Mark Langsdorf
On 04/07/2012 11:53 AM, Stefan Weil wrote:
> Not all i386 / x86_64 hosts use ELF.
> Ask the compiler whether ELF is used.
>
> On w64, gdb crashes when ELF_HOST_MACHINE is defined.
Hmm. Because the other way this could be addressed is
to fix gdb. (1) it shouldn't crash and (2) it could
support
Move feature register value setup to per-CPU init functions.
Signed-off-by: Peter Maydell
---
target-arm/cpu-qom.h | 14
target-arm/cpu.c | 91 ++
target-arm/helper.c | 73
3 files change
On Sat, Mar 31, 2012 at 10:50, Paolo Bonzini wrote:
> The special target should not be needed anymore, and caused (perhaps
> due to a Make bug) a failure with "make -j2". In any case, the
> main makefile is a better place for such special targets rather
> than an included makefile.
>
> Reported-b
On Mon, Apr 9, 2012 at 22:48, Max Filippov wrote:
> Avi reported [1] that target-xtensa incorrectly supply virtual addresses
> to tb_invalidate_phys_page_range. Currently there's no way to invalidate
> all cached TBs at the given virtual address in softmmu mode. As a shortcut
> solution I translat
On 13.04.2012 13:46, Hans-Kristian Bakke wrote:
> Package: qemu-kvm
> Version: 1.0+dfsg-9
> Severity: normal
>
> I cannot get optimal network througput on KVM guest using Debian Wheezy (and
> stable) as KVM host.
> It is not horribly bad, just not good compared to relevant alternatives.
>
> I ha
Am 14.04.2012 16:01, schrieb �:
> From: Nathan Whitehorn
>
> Add an include for a header required to build on recent FreeBSD.
>
> Signed-off-by: Nathan Whitehorn
> Signed-off-by: Andreas F�rber
> ---
Sorry, looks like FreeBSD doesn't play well with UTF-8 or I am just too
stupid to configu
On 14.04.2012 00:08, Anthony Liguori wrote:
> On 04/04/2012 07:34 AM, Michael Tokarev wrote:
>> As mentioned in http://bugs.debian.org/660154 , finnish keyboard mapping
>> is kind of broken. Fix it as Timo Sirainen suggests in #660154.
>
> Needs a Signed-off-by.
I haven't added a Signed-off-by be
Fold is_ram_rom and is_ram_rom_romd() into callers.
Change is_romd() and section_addr() to take MemoryRegion
instead of MemoryRegionSection for consistency and
use memory_region_ prefix.
Signed-off-by: Blue Swirl
---
cputlb.c | 12 ++-
cputlb.h | 18 +++--
exec.c | 6
Signed-off-by: Blue Swirl
---
cputlb.h |6 --
exec.c |8
memory.h | 29 +
3 files changed, 29 insertions(+), 14 deletions(-)
diff --git a/cputlb.h b/cputlb.h
index 60479af..ce6e297 100644
--- a/cputlb.h
+++ b/cputlb.h
@@ -32,8 +32,6 @@ void tl
I applied the uintptr_t patch. First patch is unchanged from v1.
Because of the folding and other changes, I split the last patch to
preparation phase and export phase.
Blue Swirl (3):
cputlb: move TLB handling to a separate file
cputlb: prepare private memory API for public consumption
memo
Plz co-ordinate with launchpad via bug we have created.
I need you to focus on this and get root cause by next week as per
postmortem.
-Rahul N.
On Saturday, April 14, 2012, arun gathiya wrote:
> found that there is patch available for this bug but the patch is for
Ubuntu 8.04.4 LTS(2.6.24-26).
Plz co-ordinate with launchpad via bug we have created.
I need you to focus on this and get root cause by next week as per
postmortem.
-Rahul
On Saturday, April 14, 2012, arun gathiya wrote:
> found that there is patch available for this bug but the patch is for
Ubuntu 8.04.4 LTS(2.6.24-26). I a
Ping?
Its been 4 months ago, and NetBSD still can't be booted in qemu...
I understand this can be done differently, but the patch in
question changed behavour and it caused a visible regression,
so let's fix this regression by restoring previous working
behavour and start thinking how it should b
On 14.04.2012 18:32, Michael Tokarev wrote:
> On 14.04.2012 18:17, Michael Tokarev wrote:
>> Something in between 0.15 and 1.0 releases of qemu broke
>> all NetBSD PCI functions. This is visible in the lack of
>> any network devices in a NetBSD guest, but actually there's
>> no PCI devices at all
On 14.04.2012 18:17, Michael Tokarev wrote:
> Something in between 0.15 and 1.0 releases of qemu broke
> all NetBSD PCI functions. This is visible in the lack of
> any network devices in a NetBSD guest, but actually there's
> no PCI devices at all -- e.g. disk is being assessed using
> legacy ways
Something in between 0.15 and 1.0 releases of qemu broke
all NetBSD PCI functions. This is visible in the lack of
any network devices in a NetBSD guest, but actually there's
no PCI devices at all -- e.g. disk is being assessed using
legacy ways.
Bisection shows this commit as guilty:
commit d0ed
From: Nathan Whitehorn
Add an include for a header required to build on recent FreeBSD.
Signed-off-by: Nathan Whitehorn
Signed-off-by: Andreas F�rber
---
os-posix.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/os-posix.c b/os-posix.c
index e3ed497..daf3d6f 100
Am 14.04.2012 03:40, schrieb Max Filippov:
> This is Diamond 233L Standard Core Rev.C (LE), implemented through
> linux/gdb overlay.
>
> Signed-off-by: Max Filippov
> ---
> Makefile.target|1 +
> target-xtensa/core-dc233c.c| 28 ++
> target-xtensa/core-d
On Sat, Apr 14, 2012 at 01:00, Max Filippov wrote:
> The following changes since commit 7672725d41d1a04195affc1a7bd5676ba6314b14:
>
> Merge remote-tracking branch 'stefanha/trivial-patches' into staging
> (2012-04-13 08:04:43 -0500)
>
> are available in the git repository at:
>
> git://jcmvbkbc
On Fri, Apr 13, 2012 at 14:27, Stefan Hajnoczi
wrote:
> This patch adds a common PCI bus driver library which works for
> i386/x86-64 targets. Tests can use the library to probe for PCI
> devices, map BARs, and access configuration space.
I guess we have almost identical code in SeaBIOS, OpenBIO
On Fri, Apr 13, 2012 at 13:04, Peter Maydell wrote:
> This is a pullreq for the arm-devs queue. A couple of Exynos
> fixes, plus my "make the GIC a sysbus device" series.
>
> NOTE: I have sneaked in a one line fix to "hw/arm_gic: Make the
> GIC its own sysbus device" -- adding the missing DEFINE_P
On Thu, Apr 12, 2012 at 11:13, Peter Maydell wrote:
> Ping^3 ?
Thanks, applied.
When pinging for not very recent patches, including for example the
Patchwork ID would help locate the actual patch. Resending the patch
would work too, or adding a link to message archives. I didn't find
the patch s
Am 21.03.2012 18:22, schrieb Markus Armbruster:
> Hervé Poussineau writes:
>
>> Keep the PC values as defaults but allow to override them for PReP.
>>
>> Signed-off-by: Hervé Poussineau
>> Cc: Markus Armbruster
>> Signed-off-by: Andreas Färber
>
> Reviewed-by: Markus Armbruster
Thanks, appl
Am 17.03.2012 15:39, schrieb Hervé Poussineau:
> Signed-off-by: Hervé Poussineau
> ---
> hw/isa.h |5 +
> 1 files changed, 5 insertions(+), 0 deletions(-)
>
> diff --git a/hw/isa.h b/hw/isa.h
> index 40373fb..f7bc4b5 100644
> --- a/hw/isa.h
> +++ b/hw/isa.h
> @@ -76,6 +76,11 @@ void isa_
On Fri, Apr 13, 2012 at 09:32, Paolo Bonzini wrote:
> Il 13/04/2012 11:09, Peter Maydell ha scritto:
>> On 13 April 2012 09:33, Paolo Bonzini wrote:
>>> Il 13/04/2012 10:12, Peter Maydell ha scritto:
Half a dozen from random grep:
"xilinx,timer" -- memory region size depends on a proper
Am 19.03.2012 12:03, schrieb Andreas Färber:
> Am 17.03.2012 15:39, schrieb Hervé Poussineau:
>> This fixes a crash in PReP emulation when using DMA controller to access
>> floppy drive.
>>
>> Signed-off-by: Hervé Poussineau
>
> Reviewed-by: Andreas Färber
Thanks, tested and applied to prep-up
On Fri, Apr 13, 2012 at 13:01, Anthony Liguori wrote:
> On 04/12/2012 06:57 PM, Peter Maydell wrote:
>>
>> So, the darwin-user/ subdirectory is officially Orphan, and looking
>> at the git history the last commit to it which wasn't either "apply
>> a global change", "fix cppcheck/spelling error/si
Am 13.04.2012 23:30, schrieb Andreas Färber:
> Change argument type from CPUSH4State to SuperHCPU.
> This simplifies the SH7750 SoC as its only caller.
>
> Signed-off-by: Andreas Färber
> ---
> hw/sh7750.c |2 +-
> target-sh4/cpu.h|4 +++-
> target-sh4/helper.c |8 ---
Yes, there is some regression in the old kvm-pit code of qemu-kvm. Will
be fixed soon by switching to upstream's kvm-pit.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/979714
Title:
The pit interru
85 matches
Mail list logo
