Hello,
I have the same issues as Christian : I'm unable to get -kernel-kqemu option to
work.
My configuration :
Host : Windows XPpro SP2 on Intel P4HT
QEMU : 0.8.0 latest CVS version.
qemu.exe process' affinity set to second 'CPU' (with ImageCfg, but the result is
the same if set with ProcExp o
I tried various guests today on winXP host.
* No crash and good speed for std kqemu (no kernel-kqemu)
* Crash of winXP host systematically on all guests (linux + ms)
It's hard to debug what is the problem. The only thing I have the
time to see is a BSOD (blue screen of d**th) and the error
messag
Hi,
This patch improves timer/clock for win32. Here is the patch and a binary.
http://www.h7.dion.ne.jp/~qemu-win/download/qemu-20060330-timer.patch
http://www.h6.dion.ne.jp/~kazuw/qemu-win/qemu-20060330-timer.zip
It supports 1ms interval interrupt.
It also improves the delay when it is used
Alexander Voropay wrote:
I'm trying to implement a mips_bios, unfortunately, quemu seems can't
run a code at the 0xbfc0 region.
See a http://pastebin.com/628591
The conventional 'move k0,zero' instruction (line 35) causes an general
exceprion to 0xbfc00380, see line 70
Try to change the f
> Note that the new ARM ABI being pushed by ARM ltd, which is called
> EABI, mandates using a thumb-related instruction (bx) in the function
> exit path.
No it doesn't. The EABI mandates that code be interworking safe.
It's possible to implement this is an way that only uses bx when actually
retu
On Thu, Mar 30, 2006 at 03:30:30PM +0100, Jamie Lokier wrote:
> I wonder about patents (and their validity).
>
> A MIPS hardware implementation that I worked with had all the basic
> MIPS integer instructions except one small group, on the ground that
> those instructions were covered by a MIPS p
Wolfgang Schildbach wrote:
> The way I understand this is that anyone who got ARM documentation with
> the license that Paul mentioned, could not contribute patches that
> implement v6 emulation. If, however, someone else (who has not signed such
> a license) were to buy documentation about the
"Thiemo Seufer" <[EMAIL PROTECTED]> wrote:
cpu_mips_handle_mmu_fault pc 8001 ad 8001 rw 2
is_user 0 smmu 1
That comes not from the MIPS TLB mapping (which is for KSEG0/1 a fixed
translation involving the high bits) but the underlying qemu softmmu
support.
I'm trying to implement a mi
Hello,
http://www.boblycat.org/~malc/savevm.patch.gz
The problem is Paul Brook had broken the save state for keyboard by
introducing translate and not saving/loading it.
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On Thu, Mar 30, 2006 at 03:40:25PM +0200, Dirk Behme wrote:
> Thiemo Seufer wrote:
> >On Tue, Mar 28, 2006 at 08:57:15AM +0200, Dirk Behme wrote:
> >>What about the patch in attachment? It first tries to load
> >>image as an ELF file. If this fails it falls back to raw
> >>image load. Additionally,
Thiemo Seufer wrote:
On Tue, Mar 28, 2006 at 08:57:15AM +0200, Dirk Behme wrote:
What about the patch in attachment? It first tries to load
image as an ELF file. If this fails it falls back to raw
image load. Additionally, it takes feature of patch above to
go on even if no BIOS is found.
A s
Am Mittwoch, den 29.03.2006, 21:26 -0500 schrieb Andrew Barr:
> The virtual keyboard and mouse appear to be confused after loadvm'ing on
> Windows XP SP2 (and 2000 SP4 as well) guest (Qemu CVS on Linux host). The
> control key appears to be stuck down. While looking for something unrelated
> in
The way I understand this is that anyone who got ARM documentation with
the license that Paul mentioned, could not contribute patches that
implement v6 emulation. If, however, someone else (who has not signed such
a license) were to buy documentation about the ARMv6 architecture that
comes with
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