Okay, I am crossposting this from the eventlet dev mailing list since I am
in urgent need of some help.
I am running eventlet 0.9.16 on a Small (not micro) reserved ubuntu
11.10 aws instance.
I have a socketserver that is similar to the echo server from the examples
in the eventlet documentation.
Paul Rubin wrote:
Vector processors are back, they just call them GPGPU's now.
Also present to some extent in the CPU, with
MMX, Altivec, etc.
--
Greg
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geremy condra wrote:
I'd be interested in seeing the performance impact of this, although I
wonder if it'd be feasible.
A project I have in the back of my mind goes something
like this:
1) Design an instruction set for a Python machine and
a microcode architecture to support it
2) Write a si
Terry Reedy wrote:
So a
small extension to array with .map, .filter, .reduce, and a wrapper
class would be more useful than I thought.
Also useful would be some functions for doing elementwise
operations between arrays. Sometimes you'd like to just do
a bit of vector arithmetic, and pulling in
John Nagle writes:
> That sort of thing was popular in the era of the early
> Cray machines. Once superscalar CPUs were developed,
> the overhead on tight inner loops went down, and several
> iterations of a loop could be in the pipeline at one time,
Vector processors are back, they just cal
On 4/4/2011 12:47 AM, Gregory Ewing wrote:
John Nagle wrote:
A tagged machine might make Python faster. You could have
unboxed ints and floats, yet still allow values of other types,
with the hardware tagging helping with dispatch. But it probably
wouldn't help all that much. It didn't in the L
On 4/4/2011 1:14 PM, Terry Reedy wrote:
On 4/4/2011 5:23 AM, Paul Rubin wrote:
Gregory Ewing writes:
What might help more is having bytecodes that operate on
arrays of unboxed types -- numpy acceleration in hardware.
That is an interesting idea as an array or functools module patch.
Basically
On 4/4/2011 5:23 AM, Paul Rubin wrote:
Gregory Ewing writes:
What might help more is having bytecodes that operate on
arrays of unboxed types -- numpy acceleration in hardware.
That is an interesting idea as an array or functools module patch.
Basically a way to map or fold arbitrary function
On Mon, Apr 4, 2011 at 12:47 AM, Gregory Ewing
wrote:
> John Nagle wrote:
>
>> A tagged machine might make Python faster. You could have
>> unboxed ints and floats, yet still allow values of other types,
>> with the hardware tagging helping with dispatch. But it probably
>> wouldn't help all
Gregory Ewing writes:
> What might help more is having bytecodes that operate on
> arrays of unboxed types -- numpy acceleration in hardware.
That is an interesting idea as an array or functools module patch.
Basically a way to map or fold arbitrary functions over arrays, with a
few obvious optim
John Nagle wrote:
A tagged machine might make Python faster. You could have
unboxed ints and floats, yet still allow values of other types,
with the hardware tagging helping with dispatch. But it probably
wouldn't help all that much. It didn't in the LISP machines.
What might help more
Paul Rubin wrote:
You can order 144-core Forth chips right now,
http://greenarrays.com/home/products/index.html
They are asynchronous cores running at around 700 mhz, so you get an
astounding amount of raw compute power per watt and per dollar. But for
me at least, it's not that easy to fi
On Sun, 03 Apr 2011 10:15:34 -0700, John Nagle wrote:
> Note that if you run out of return point stack, or parameter
> stack, you're stuck. So there's a hardware limit on call depth.
> National Semiconductor once built a CPU with a separate return
> point stack with a depth of 20. Big mista
On 4/3/2011 8:44 AM, Werner Thie wrote:
You probably heard of the infamous FORTH chips like the Harris RTX2000,
or ShhBoom, which implemented a stack oriented very low power design
before there were FPGAs in silicon. To my knowledge the RTX2000 is still
used for space hardened application and if
to:greg.ew...@canterbury.ac.nz>> wrote:
Brad wrote:
I've heard of Java CPUs. Has anyone implemented a Python CPU in VHDL
or Verilog?
Not that I know of.
I've had thoughts about designing one, just for the exercise.
It's doubtful whether such a thing wou
John Nagle writes:
> The Forth chips were cute, and got more done with fewer gates than
> almost anything else. But that didn't matter for long.
> Willow Garage has a custom Forth chip they use in their Ethernet
> cameras, but it's really a FPGA.
You can order 144-core Forth chips right now,
It'd be kind of hard. Python bytecode operates on objects, not memory slots,
registers, or other low-level entities like that. Therefore, in order to
implement a "Python machine" one would have to implement the whole object
system in the hardware, more or less.
So it'd be possible but not too
On 4/2/2011 9:01 PM, Steven D'Aprano wrote:
There were also Forth chips, which let you run Forth in hardware. I
believe they were much faster than Forth in software, but were killed by
the falling popularity of Forth.
The Forth chips were cute, and got more done with fewer gates than
almost
On Sat, 02 Apr 2011 23:06:52 +0100, BartC wrote:
> However, wasn't there a Python version that used JVM? Perhaps that might
> run on a Java CPU, and it would be interesting to see how well it works.
Not only *was* there one, but there still is: Jython. Jython is one of
the "Big Three" Python imp
On Sun, 03 Apr 2011 12:10:35 +1200, Gregory Ewing wrote:
> Brad wrote:
>
>> I've heard of Java CPUs. Has anyone implemented a Python CPU in VHDL or
>> Verilog?
>
> Not that I know of.
>
> I've had thoughts about designing one, just for the exercise.
On Sat, Apr 2, 2011 at 5:10 PM, Gregory Ewing
wrote:
> Brad wrote:
>
> I've heard of Java CPUs. Has anyone implemented a Python CPU in VHDL
>> or Verilog?
>>
>
> Not that I know of.
>
> I've had thoughts about designing one, just for the exercise.
&
Brad wrote:
I've heard of Java CPUs. Has anyone implemented a Python CPU in VHDL
or Verilog?
Not that I know of.
I've had thoughts about designing one, just for the exercise.
It's doubtful whether such a thing would ever be of practical
use. Without as much money as Intel
On Sat, Apr 2, 2011 at 3:06 PM, BartC wrote:
>
> However, wasn't there a Python version that used JVM? Perhaps that might
> run on a Java CPU, and it would be interesting to see how well it works.
>
Jython's still around - in fact, it had a new release not too long ago.
Also, Pypy formerly work
"Brad" wrote in message
news:01bd055b-631d-45f0-90a7-229da4a9a...@t19g2000prd.googlegroups.com...
Hi All,
I've heard of Java CPUs. Has anyone implemented a Python CPU in VHDL
or Verilog?
For what purpose, improved performance? In that case, there's still plenty
On 4/1/2011 11:35 AM, Emile van Sebille wrote:
On 4/1/2011 11:28 AM Emile van Sebille said...
On 4/1/2011 8:38 AM Brad said...
Hi All,
I've heard of Java CPUs. Has anyone implemented a Python CPU in VHDL
or Verilog?
-Brad
http://code.google.com/p/python-on-a-chip/
Sorry - wrong u
On 4/1/2011 11:28 AM Emile van Sebille said...
On 4/1/2011 8:38 AM Brad said...
Hi All,
I've heard of Java CPUs. Has anyone implemented a Python CPU in VHDL
or Verilog?
-Brad
http://code.google.com/p/python-on-a-chip/
Sorry - wrong url in the cut'n paste buffer -
http://tsh
On 4/1/2011 8:38 AM Brad said...
Hi All,
I've heard of Java CPUs. Has anyone implemented a Python CPU in VHDL
or Verilog?
-Brad
http://code.google.com/p/python-on-a-chip/
Emile
--
http://mail.python.org/mailman/listinfo/python-list
On Fri, Apr 1, 2011 at 10:00 AM, Stefan Behnel wrote:
> Nobody, 01.04.2011 18:52:
>
> Java is a statically-typed language which makes a distinction between
>> primitive types (bool, int, double, etc) and objects. Python is a
>> dynamically-typed language which makes no such distinction. Even som
On Fri, Apr 1, 2011 at 10:00 AM, Stefan Behnel wrote:
> Nobody, 01.04.2011 18:52:
>>
>> Java is a statically-typed language which makes a distinction between
>> primitive types (bool, int, double, etc) and objects. Python is a
>> dynamically-typed language which makes no such distinction. Even som
Nobody, 01.04.2011 18:52:
Java is a statically-typed language which makes a distinction between
primitive types (bool, int, double, etc) and objects. Python is a
dynamically-typed language which makes no such distinction. Even something
as simple as "a + b" can be a primitive addition, a bigint a
On Fri, 01 Apr 2011 08:38:27 -0700, Brad wrote:
> I've heard of Java CPUs. Has anyone implemented a Python CPU in VHDL
> or Verilog?
Java is a statically-typed language which makes a distinction between
primitive types (bool, int, double, etc) and objects. Python is a
dynamically-typ
On Apr 1, 4:38 pm, Brad wrote:
> Hi All,
>
> I've heard of Java CPUs.
And Forth CPUs as well, I suspect ;-)
> Has anyone implemented a Python CPU in VHDL
> or Verilog?
>
I don't think so - certainly not in recent memory. If you look at the
documentation for the p
Hi All,
I've heard of Java CPUs. Has anyone implemented a Python CPU in VHDL
or Verilog?
-Brad
--
http://mail.python.org/mailman/listinfo/python-list
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