On Apr 1, 4:38 pm, Brad <[email protected]> wrote: > Hi All, > > I've heard of Java CPUs.
And Forth CPUs as well, I suspect ;-)
> Has anyone implemented a Python CPU in VHDL
> or Verilog?
>
I don't think so - certainly not in recent memory. If you look at the
documentation for the python byte code, for example:
http://docs.python.org/release/2.5.2/lib/bytecodes.html
you can see why. It starts off nicely enough, and then ...
HTH
J^n
--
http://mail.python.org/mailman/listinfo/python-list
