Re: [perf-discuss] New 5062435 webrev

2005-09-15 Thread Ethan Solomita
Seongbae Park wrote: membar #storestore is effectively a nop on all existing sparc processors because they only support TSO mode. So there's no performance penalty. On SPARC, yes. Not so on x86 or amd64 unfortunately with sfence. Is there any chance that cpu_mstate_gen wraps around betwe

Re: [perf-discuss] New 5062435 webrev

2005-09-15 Thread Seongbae Park
Ethan Solomita wrote: There have been several changes to the webrev for 5062435, and so I'm putting it out for a second review. The most important was my ass*u*mption that just because the CPU obeyed TSO rules, that the compiler couldn't screw it up. Unfortunately it's almost impossible to

[perf-discuss] New 5062435 webrev

2005-09-15 Thread Ethan Solomita
There have been several changes to the webrev for 5062435, and so I'm putting it out for a second review. The most important was my ass*u*mption that just because the CPU obeyed TSO rules, that the compiler couldn't screw it up. Unfortunately it's almost impossible to prevent a compiler from