On Wed, 2009-06-03 at 19:51 -0700, David Brownell wrote:
> On Wednesday 03 June 2009, jie.zeng wrote:
> > PS: The lastest openocd manual has no description about x16_as_x8
> > option???
>
> Upcoming patch changes that to:
>
> @item @var{x16_as_x8} ... when a 16-bit flash is hooked up to an 8-bit
On Wednesday 03 June 2009, jie.zeng wrote:
> PS: The lastest openocd manual has no description about x16_as_x8
> option???
Upcoming patch changes that to:
@item @var{x16_as_x8} ... when a 16-bit flash is hooked up to an 8-bit bus.
Good enough?
___
Ope
On Wed, 2009-06-03 at 18:55 +0200, Michael Schwingen wrote:
> >
> > flash bank
> > # chip_width(addr width) is 16 bit, bus_width(data width) is 8 bit
> > flash bank cfi 0x1000 0x800 2 1 0
> >
> > Is it correct? In fact, I am not very sure the meaning of chip_width
> > and bus_wid
zengjie wrote:
> My board used vitesse chip and the core is ARM926ejs. From the pin
> table, there are 8 bit for data bus and 24 bit for address bus.
>
> Q: what kind of flash, mode (8/16 bit)?
>
> FLASH is EN29LV640T/B, 64 Megabit (8M x 8-bit / 4M x 16-bit) Flash
> Memory Boot Sector Flash Memor
Hello,
Thank you for your time.
> You still have not described (or I missed it) your flash setup: what
> kind of flash, mode (8/16 bit), bus width of the CPU, and how it is all
> connected together.
> Also, what flash bank configuration are you using in your openocd config?
>
> Without that infor
jie.zeng wrote:
> If we want to access a register in the board, we must pass the base
> address which tell cpu where the register reside and a proper
> offset(depends on bus-width), right? If the offset is not fix the
> datasheet, how the cpu can access that reg correctly?
>
> In my opinion, the ba
On Tuesday 02 June 2009 10:32:03 jie.zeng wrote:
> On Tue, 2009-06-02 at 08:37 +0200, Michael Schwingen wrote:
> > > I'm not sure. I thought that address must match the flash interface
> > > specification. In this case, from the flash's datasheet where
> > > descripted that. And also some other fla
On Tue, 2009-06-02 at 08:37 +0200, Michael Schwingen wrote:
> >>
> > I'm not sure. I thought that address must match the flash interface
> > specification. In this case, from the flash's datasheet where descripted
> > that. And also some other flash datasheet point the same thing as below:
> >
jie.zeng wrote:
> Again with line no.
>2105 static int cfi_probe(struct flash_bank_s *bank)
>2106 {
> /* snip */
>
>2140 cfi_command(bank, 0x55, command);
>2141 if((retval = target_write_memory(target,
> flash_address(bank, 0, unlock2), bank->bus_ 2141 width,
On Mon, 2009-06-01 at 17:32 +0200, Raúl Sánchez Siles wrote:
> Hello:
>
> On Sunday 31 May 2009 12:58:16 jie.zeng wrote:
> > Hi list,
> >
> > I've got a new problem. When I use the command `flash probe 0' after
> > telnet to the server. It cannot probe the flash.
> >
> > My core is arm926ejs and
Hello:
On Sunday 31 May 2009 12:58:16 jie.zeng wrote:
> Hi list,
>
> I've got a new problem. When I use the command `flash probe 0' after
> telnet to the server. It cannot probe the flash.
>
> My core is arm926ejs and flash used CFI interface, so go into the code
> and I found something is not n
Hi list,
I've got a new problem. When I use the command `flash probe 0' after
telnet to the server. It cannot probe the flash.
My core is arm926ejs and flash used CFI interface, so go into the code
and I found something is not normal.
# my flash config
flash bank cfi 0x1000 0x0080 2 2 0
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