Hi Simon,
I think it is great that you post this patch. Once David posts the
SWD support for OpenOCD we'll have something to compare
against.
I believe that you'll have made important discoveries in your
code w.r.t. how the targets actually work. This will come in handy.
--
Øyvind Harboe
US t
How this patch is implemented is not important.
But some information will be helpful, I think.
For example:
I find that after dap_to_swd sequence, some idles bits should be added.
Maybe it will be a method to try if a lot of "CTRL/STAT error" are received.
2010/8/10 simon qian
> This patch is
This patch is not for comming to openocd.
I just publish the patch for testing Versaloon driver, especially SWD
driver.
All code is intended to be just simple, and working(hope it's working).
APACC/DPACC for JTAG is a register.
But for SWD, it's only a bit in the request part (5.3.1 section of AD
One way you can tell this is very wrong is that it
references JTAG-specific registers APACC/DPACC ...
those concepts don't even exist with SWD.
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Attachment is the adi_v5_swd.c and arm_adi_v5.c code for my recent SWD patch
for OpenOCD.
Code is almost similar as adi_v5_jtag.c but with some fix for SWD.
1. original dap_to_swd is not stable.
I change the last 4 bits of jtag2swd_bitseq from '1' to '0', the 4 bits act
as idle bits.
2. after dap_
