Attachment is the adi_v5_swd.c and arm_adi_v5.c code for my recent SWD patch for OpenOCD. Code is almost similar as adi_v5_jtag.c but with some fix for SWD.
1. original dap_to_swd is not stable.
I change the last 4 bits of jtag2swd_bitseq from '1' to '0', the 4 bits act
as idle bits.
2. after dap_to_swd, queue_idcode_read should be called
3. note that, for FAULT process, queue_idcode_read should also be called
first
4. add queue_dp_scan called in mem_ap_read_buf_u32, original code will call
jtag functions.
5. SWD_ACK_OK and SWD_ACK_FAULT is wrong in original arm_adi_v5.h
If LSB is sent first, SWD_ACK_OK should be 0x1 and SWD_ACK_FAULT should be
0x4.
TODO:
In adi_v5_swd.c, SWD driver layer should be added.
I currently using SWD driver for Versaloon.
related functions:
swd_add_transact_in
swd_add_transact_out
swd_add_sequence
This patch is tested OK with the latest Versaloon driver on STM32F103C8 and
LPC1766.
For Versaloon users, the whole patch is available at
http://www.simonqian.com/en/Versaloon/doc/versaloon_how_to.html#Versaloon_driver_in_OpenOCD
.
--
Best Regards, SimonQian
http://www.SimonQian.com
adi_v5.patch
Description: Binary data
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