On Mon, 6 Oct 2008, Magnus Lundin wrote:
> Hi
>
> I am just guessing here but it can an issue with the timing of the AHB
> bus and running from flash at 50MHz.
> The SWLDP overrun is received through the JTAG interface, so it seems
> JTAG is working.
> SWDLP overruns are not JTAG problems, they a
Hi
I am just guessing here but it can an issue with the timing of the AHB
bus and running from flash at 50MHz.
The SWLDP overrun is received through the JTAG interface, so it seems
JTAG is working.
SWDLP overruns are not JTAG problems, they are when the debug unit on th
CM3 receives
debug comm
On Mon, Oct 6, 2008 at 8:24 PM, Spen <[EMAIL PROTECTED]> wrote:
>> >> I'm not too familiar with that code or the problem
>> w/PLL/clocks that
>> >> you are seing, but I modified it to wait 1000ms rather
>> than try 100
>> >> times...
>> >>
>> >> Seems a tad more robust to me.
>> >>
>> >
>
> This is
> >> I'm not too familiar with that code or the problem
> w/PLL/clocks that
> >> you are seing, but I modified it to wait 1000ms rather
> than try 100
> >> times...
> >>
> >> Seems a tad more robust to me.
> >>
> >
This is way too long a timeout.
Probably 50ms-100ms is more suitable, otherwise
