--- b/src/target/arm920t.c2009-11-04 22:01:14.0 +0800
+++ a/src/target/arm920t.c2009-11-04 21:30:51.0 +0800
@@ -552,12 +552,9 @@
arm9tdmi_common_t *arm9tdmi = arm7_9->arch_info;
arm920t_common_t *arm920t = arm9tdmi->arch_info;
-if ((retval = arm7_9_write_memor
On Wed, Nov 4, 2009 at 4:24 AM, Dennis.Cheng wrote:
> In arm920t_write_memory, how about imitate arm926ejs_write_memory?
Could you submit a patch?
I tried to make minimal changes before 0.3, but as soon as 0.3 is out
of the door I'd like arm920t to support breakpoints in memory
marked as read on
In arm920t_write_memory, how about imitate arm926ejs_write_memory?
if (arm920t->armv4_5_mmu.mmu_enabled && (count == 1) && ((size==2) ||
(size==4)))
{
/* special case the handling of single word writes to bypass MMU
* to allow implementation of breakpoints in memory marked
On Tue, Nov 3, 2009 at 2:15 PM, Dennis.Cheng wrote:
> Thanks. It works well :-).
I've pushed the fix.
I'm a little bit worried about being able to test the case where
a write to a cache line for a breakpoint.
Here the code has to flush that cache line + invalidate the cache line.
--
Øyvind H
Try the attached patch.
--
Øyvind Harboe
http://www.zylin.com/zy1000.html
ARM7 ARM9 ARM11 XScale Cortex
JTAG debugger and flash programmer
From f37c9b8d1560d0081e53c71c55113a3c9858011a Mon Sep 17 00:00:00 2001
From: =?utf-8?q?=C3=98yvind=20Harboe?=
Date: Tue, 3 Nov 2009 12:28:00 +0100
Subject:
Could you try a git bisect procedure to find out if
this broke since 0.2 and what version that broke?
--
Øyvind Harboe
http://www.zylin.com/zy1000.html
ARM7 ARM9 ARM11 XScale Cortex
JTAG debugger and flash programmer
___
Openocd-development mailing list
> reset
JTAG tap: s3c2410.cpu tap/device found: 0x0032409d (mfg: 0x04e, part:
0x0324, ver: 0x0)
> halt
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x40d3 pc: 0x33f94990
MMU: disabled, D-Cache: enabled, I-Cache: enabled
> nand probe 0
Addr
On Tue, Nov 3, 2009 at 4:06 AM, Dennis.Cheng wrote:
> Hi folks,
>
> When I tried to use OpenOCD detect NAND flash in S3C2410 platform(nand probe
> 0), I got the "Address translation failure" result.
> I tried "reset" then "halt", "Address translation failure" was still exist.
> But when I enter "r
Hi folks,
When I tried to use OpenOCD detect NAND flash in S3C2410 platform(nand probe
0), I got the "Address translation failure" result.
I tried "reset" then "halt", "Address translation failure" was still exist.
But when I enter "reset; halt" command, NAND flash probe is OK.
I think it is OpenO
