Merged.
Thanks!
(Please post followup patches in new thread)
--
Øyvind Harboe
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ARM7 ARM9 ARM11 XScale Cortex
JTAG debugger and flash programmer
_
Merged.
Thanks!
--
Øyvind Harboe
Can Zylin Consulting help on your project?
US toll free 1-866-980-3434 / International +47 51 63 25 00
http://www.zylin.com/zy1000.html
ARM7 ARM9 ARM11 XScale Cortex
JTAG debugger and flash programmer
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Openocd-de
On Tue, Nov 16, 2010 at 11:23 PM, Spencer Oliver wrote:
>
>>
>> Are you aware of any target, other than SPEAr, that provides memory
>> mapping feature of SPI flash? I quickly searched, but failed.
>>
>
> ST STR750 i believe - it is also called SMI interface.
Yes, seems they share same SMI HW bloc
On Tue, Nov 16, 2010 at 4:18 PM, Øyvind Harboe wrote:
> ...
> It would be nice with some followup patches:
> ...
> - a patch to get rid of the non-sensical .h files in drivers/nor/*.h and
> just put the private data into the .c file.
Hi,
in attachment 3 patches to start addressing this rework.
Pl
The patch in attachment adds additional comments to previous commit.
Best Regards,
Antonio Borneo
0002-NOR-SPEARSMI-Add-comments-about-SPI.patch
Description: Binary data
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On 16/11/2010 21:14, Igor Skochinsky wrote:
Hello Antonio,
Tuesday, November 16, 2010, 3:53:53 PM, you wrote:
AB> Are you aware of any target, other than SPEAr, that provides memory
AB> mapping feature of SPI flash? I quickly searched, but failed.
NXP's LPC1800 (and, I think, LPC4000) have su
Hello Antonio,
Tuesday, November 16, 2010, 3:53:53 PM, you wrote:
AB> Are you aware of any target, other than SPEAr, that provides memory
AB> mapping feature of SPI flash? I quickly searched, but failed.
NXP's LPC1800 (and, I think, LPC4000) have support for that.
7.10.3 SPI Flash Interface (SPI
Are you aware of any target, other than SPEAr, that provides memory
mapping feature of SPI flash? I quickly searched, but failed.
ST STR750 i believe - it is also called SMI interface.
Cheers
Spen
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Openocd-devel
Antonio Borneo wrote:
> Are you aware of any target, other than SPEAr, that provides memory
> mapping feature of SPI flash? I quickly searched, but failed.
I haven't seen it on any ARM chips, but OTOH I'm somewhat new to ARM.
On PC mainboards it is quite common, I'd even say the norm.
http://stuge
> Are you aware of any target, other than SPEAr, that provides memory
> mapping feature of SPI flash? I quickly searched, but failed.
Wow :-) The only case I know of is the ZPU which has a memory
mapped serial flash, but that's another story not relevant here.
--
Øyvind Harboe
Can Zylin Con
Merged.
It would be nice with some followup patches:
- some comments on how this code can/should be refactored rather
than copy pasted as new devices are added
- a patch to get rid of the non-sensical .h files in drivers/nor/*.h and
just put the private data into the .c file.
--
Øyvind Harboe
On Mon, Nov 15, 2010 at 4:07 PM, Peter Stuge wrote:
> Øyvind Harboe wrote:
>> > there are parts of the patch which should be separated out,
>> > because they are not really specific to spearsmi.
> ..
>> > Refactor now, or then?
> ..
>> I haven't seen a proposed design and it seems some time off.
>
Øyvind Harboe wrote:
> > there are parts of the patch which should be separated out,
> > because they are not really specific to spearsmi.
..
> > Refactor now, or then?
..
> I haven't seen a proposed design and it seems some time off.
Fair enough. Could we add some commentary to remind future code
On Sat, Nov 13, 2010 at 1:09 PM, Peter Stuge wrote:
> Øyvind Harboe wrote:
>> So basically if OpenOCD had some generic support for
>> interfacing to SPI chips via the target CPU over JTAG,
>> then you could build on that for your flash driver?
>>
>> That seems a completely separate feature to your
Øyvind Harboe wrote:
> So basically if OpenOCD had some generic support for
> interfacing to SPI chips via the target CPU over JTAG,
> then you could build on that for your flash driver?
>
> That seems a completely separate feature to your patch.
That's the point basically, there are parts of the
So basically if OpenOCD had some generic support for
interfacing to SPI chips via the target CPU over JTAG,
then you could build on that for your flash driver?
That seems a completely separate feature to your patch.
Your flash driver could be refactored once such support
was added, possibly by fac
Antonio Borneo wrote:
> >> I'm not thrilled about having this information local in the
> >> spearsmi
> >
> > Like generic SPI and SPI-flash layers. The flash
> > support shouldn't be SPEAr-specific in the least.
>
> Understand your comments.
> I agree that the table could be shared between SPEAr
On Sat, Nov 13, 2010 at 1:27 AM, David Brownell wrote:
>
>
> --- On Fri, 11/12/10, Peter Stuge wrote:
>
>> I'm not thrilled about having this information local in the
>> spearsmi
>
> Like generic SPI and SPI-flash layers. The flash
> support shouldn't be SPEAr-specific in the least.
Understand
--- On Fri, 11/12/10, Peter Stuge wrote:
> I'm not thrilled about having this information local in the
> spearsmi
Like generic SPI and SPI-flash layers. The flash
support shouldn't be SPEAr-specific in the least.
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Antonio Borneo wrote:
> From 4e9b1eb86d828c19c46e830eca7a9dd9a91ccfe8 Mon Sep 17 00:00:00 2001
> From: Antonio Borneo
> Date: Thu, 11 Nov 2010 14:12:31 +0800
> Subject: [PATCH 1/2] NOR/SPEAr: Add support for Serial NOR
>
> Add support and documentation for STMicroelectronics
> SPEAr Serial Memory
Any objections out there?
Looks OK to me on the surface of it. You're the expert here.
I'll let it cool off and if no feedback, I'll merge it.
> The driver structure follows the prototype of the other drivers in
> src/flash/nor/
> The file .h that I'm adding is totally useless, since only provid
Hi,
in attachment the driver for the serial NOR flash controller of ST
SPEAr devices.
The first patch adds driver support and documentation, the second one
adds the proper lines in the (current) only board file of this device
family.
The driver structure follows the prototype of the other drivers
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