On Sat, Nov 13, 2010 at 1:27 AM, David Brownell <davi...@pacbell.net> wrote: > > > --- On Fri, 11/12/10, Peter Stuge <pe...@stuge.se> wrote: > >> I'm not thrilled about having this information local in the >> spearsmi > > Like generic SPI and SPI-flash layers. The flash > support shouldn't be SPEAr-specific in the least.
Understand your comments. I agree that the table could be shared between SPEAr SMI and a generic SPI or SPI-flash framework. But I think this could be the only common part. AFAIK, SPI flash is not accessible in CPU memory space directly, but requires the driver to copy to RAM the flash content. This is stated also in OpenOCD documentation, chapter 12. But, SMI controller is not a generic SPI interface (some devices in SPEAr family also provide a separate SPI controller, keeping SMI for flash only). SMI is a dedicated HW accelerator that hides the SPI protocol and maps on-the-fly the content of the SPI flash in the CPU memory space. This makes "SMI + SPI flash" similar to a parallel NOR device, and also makes the driver fitting in the generic NOR framework of OpenOCD. I cannot use an explicit SPI framework, since SPI is hidden inside the SMI HW. The SMI has some limitation while choosing a flash device. The documentation reports the list of mandatory SPI commands codes that the flash have to support, since such values are hardcoded in the controller and cannot be changed. So, the table above does not lists all the possible SPI devices, but only a subset of flashes compatible with SMI accelerator. If some other target device has a SPI flash controller with similar characteristic, than would be interesting to compare them and look for common code. In the mean time, I think the table could either be in current file or in a separate one. Would not be difficult to review it later on. Best Regards Antonio Borneo _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
