I'd like to see error propagation added to the code.
Otherwise it's great to see that this code gets some serious
attention!
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Øyvind Harboe
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ARM7 ARM9 ARM1
Hello,
this patch adds the missing cpu registers and the correct read/write register functions and fixed
most of the halt/step/resume issues.
Regards,
Mathias
diff --git a/src/target/dsp563xx.c b/src/target/dsp563xx.c
index 10fd014..dea63a9 100644
--- a/src/target/dsp563xx.c
+++ b/src/target
On 31/01/2011 12:09, Øyvind Harboe wrote:
wip.
What to do about protection?
Protection is by sector rather then page - which as you know is variable.
I think this needs moving to another driver as the flash algo will also
change - ST have used a new flash controller for the 2x family.
This
Signed-off-by: Øyvind Harboe
---
tcl/board/stm3220f_eval.cfg | 66 +++
1 files changed, 66 insertions(+), 0 deletions(-)
create mode 100644 tcl/board/stm3220f_eval.cfg
diff --git a/tcl/board/stm3220f_eval.cfg b/tcl/board/stm3220f_eval.cfg
new file mode
wip.
What to do about protection?
Signed-off-by: Øyvind Harboe
---
src/flash/nor/stm32x.c | 86
1 files changed, 86 insertions(+), 0 deletions(-)
diff --git a/src/flash/nor/stm32x.c b/src/flash/nor/stm32x.c
index 3914d25..52b0848 100644
--- a/
Hi,
I'm new to openocd but according some recipe it should work. I try to
debug barebox
bootloader with openocd but aftre loading image to RAM it always fail
with timeout.
Any ideas?
test.cfg :
interface parport
parport_port 0
parport_cable chameleon
source [find board/mini2440.cfg]
telnet_por
Hello,
On Monday 31 January 2011, 10:33:50 Øyvind Harboe wrote:
> How's this?
This works fine. Thanks
Regards,
Alexander
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How's this?
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Øyvind Harboe
Can Zylin Consulting help on your project?
US toll free 1-866-980-3434 / International +47 51 87 40 27
http://www.zylin.com/zy1000.html
ARM7 ARM9 ARM11 XScale Cortex
JTAG debugger and flash programmer
From a0858bfed053fa4555d729554ad8b8089a7ac308 Mon Sep 17 00:00:0
Hello,
I cannot reprogram my NOR-Flash on an ARM11-Board (I.mx35 actually) while it
worked before. I bisected the problem to commit
aa61a3b3d8b6acad19050987835ec05f3d298bdb. This seem to change the arch
detection which doesn't work for arm11.
Any ideas how to fix that? Especially as there is n
Great, keep us posted. Actually, this will definitely be generally
useful, because there are many other resources that can't be accessed
from the L3 interconnect: the MPCore private regions (per-core timers
and WDT), snoop-control unit, global interrupt controller, local PRCM,
and of course ROM. A
Tip: use gdb's "compare-sections" after load to check that
flashing worked.
--
Øyvind Harboe
Can Zylin Consulting help on your project?
US toll free 1-866-980-3434 / International +47 51 87 40 27
http://www.zylin.com/zy1000.html
ARM7 ARM9 ARM11 XScale Cortex
JTAG debugger and flash programme
On Tue, Jan 25, 2011 at 2:17 PM, Andreas Fritiofson
wrote:
> Mathias:
> I built in a fresh out-of-tree directory, and reran bootstrap every
> time. See test.sh script. Anyway I found the bug, the patch I posted
> solves it for me. Since the stack was corrupted, technically, anything
> could have h
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