openocd-development-boun...@lists.berlios.de wrote:
> I was asking the ODM to
> ensure that no more than 2 bad blocks occur in any 4M range
> of the flash as a requirement.
You have a pretty good chance of hitting that ime.
> Anyone have any place to get something official about bad
> block densi
ahbap_debugport_init was queueing reads to a local stack variable but
didn't execute the queue before returning. Since the result of the reads
are not used anyway, it's better to pass NULL as the destination instead of
a dummy variable. I changed this throughout the function, even for the
reads tha
Hi all,
Has anyone else problem with segfaults on current git? As soon as I
issue a reset, openocd dies. This is with a STM32 target. Same result
with both rlink and a jtagkey interface. Bisection was successful and
pointed to commit '8f93c0a3... target: do not expose error numbers to
users' by Øy
Hi Aaron,
thanks for submitting this! I am looking forward to having
a closer look when I get back next week.
--
Øyvind Harboe
Can Zylin Consulting help on your project?
US toll free 1-866-980-3434 / International +47 51 87 40 27
http://www.zylin.com/zy1000.html
ARM7 ARM9 ARM11 XScale Cort
Hi All,
I¹m working on a project that will require an ODM to program a NAND flash.
I¹m providing 4 partitions worth of content to be programmed starting at 4
specific physical addresses on the chip. I understand from the ODM, that
Hynix considers that up to 2% of the flash might be in bad blocks
On 24 January 2011 19:29, Peter Stuge wrote:
> Aaron Carroll wrote:
>> +# GDB target: Cortex-A9, using DAP
>> +#
>> +# The debugger can connect to either core of the A9, but currently
>> +# not both simultaneously. Change -coreid to 1 to connect to the
>> +# second core.
>> +#
>> +set _TARGETNAME
Aaron Carroll wrote:
> +# GDB target: Cortex-A9, using DAP
> +#
> +# The debugger can connect to either core of the A9, but currently
> +# not both simultaneously. Change -coreid to 1 to connect to the
> +# second core.
> +#
> +set _TARGETNAME $_CHIPNAME.cpu
> +target create $_TARGETNAME cortex_a9
Aaron Carroll wrote:
> Signed-off-by: Aaron Carroll
> ---
> src/target/cortex_a9.c | 2181
>
> src/target/cortex_a9.h | 89 ++
> 2 files changed, 2270 insertions(+), 0 deletions(-)
> create mode 100644 src/target/cortex_a9.c
> create mode 1006
Aaron Carroll wrote:
> Signed-off-by: Aaron Carroll
> ---
> src/target/arm_dpm.h | 10 --
> 1 files changed, 8 insertions(+), 2 deletions(-)
>
> @@ -143,14 +143,20 @@ void arm_dpm_report_wfar(struct arm_dpm *, uint32_t
> wfar);
> #define DSCR_CORE_HALTED (1 << 0)
> #define DSCR_
Aaron Carroll wrote:
> ARM Cortex-A9 multi-core chips expose a single TAP/DAP which connects
> to both cores. The '-coreid' option selects which core the target
> should connect to.
>
> Note that at present, OpenOCD can connect to either core, but not both
> simulatenously, until ADI contexts can
Aaron Carroll wrote:
> Signed-off-by: Aaron Carroll
Acked-by: Peter Stuge
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