On Thu, 23 May 2019 at 05:17, Florian Fainelli wrote:
>
> On 5/22/2019 6:20 PM, Ioana Ciornei wrote:
> > This completely removes the usage of PHYLIB from DSA, namely for the
> > aforementioned switch ports which used to drive a software PHY manually
> > using genphy operations.
> >
> > For these p
case the instance is a raw one.
Signed-off-by: Ioana Ciornei
Signed-off-by: Vladimir Oltean
---
[snip]
+ struct phylink_notifier_info info = {
+ .link_an_mode = pl->link_an_mode,
+ /* Discard const pointer */
+ .state = (str
On Fri, 24 May 2019 at 00:28, Russell King - ARM Linux admin
wrote:
>
> On Thu, May 23, 2019 at 01:20:40AM +, Ioana Ciornei wrote:
> > @@ -111,7 +114,16 @@ static const char *phylink_an_mode_str(unsigned int
> > mode)
> > static int phylink_validate(struct phylink *pl, unsigned long *support
On Fri, 24 May 2019 at 00:55, Russell King - ARM Linux admin
wrote:
>
> On Thu, May 23, 2019 at 01:20:40AM +, Ioana Ciornei wrote:
> > + if (pl->ops) {
> > + pl->ops->mac_link_up(ndev, pl->link_an_mode,
> >pl->phy_state.interface,
> >
On Fri, 24 May 2019 at 16:19, Andrew Lunn wrote:
>
> > Hi Florian,
> >
> > Yes we could, but since most of the adjust_link -> phylink_mac_ops
> > changes appear trivial, and we have the knowledge behind b53 right
> > here, can't we just migrate everything in the next patchset and remove
> > adjust
On Tue, 28 May 2019 at 12:58, Russell King wrote:
>
> Allow userspace to generate Clause 45 MII access cycles via phylib.
> This is useful for tools such as mii-diag to be able to inspect Clause
> 45 PHYs.
>
> Reviewed-by: Florian Fainelli
> Signed-off-by: Russell King
> ---
> drivers/net/phy/p
.
Signed-off-by: Ioana Ciornei
Signed-off-by: Vladimir Oltean
Fixes: f9bbe4477c30 ("net: dsa: Optional VLAN-based port separation for
switches without tagging")
---
net/dsa/tag_8021q.c | 19 +++
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/net/dsa/tag_802
ration for
switches without tagging")
Signed-off-by: Vladimir Oltean
---
net/dsa/tag_8021q.c | 54 -
1 file changed, 44 insertions(+), 10 deletions(-)
diff --git a/net/dsa/tag_8021q.c b/net/dsa/tag_8021q.c
index 4adec6bbfe59..4c2c70ce5d54 10064
elds inside the DSA 802.1Q VID so that
tcpdump can decode it unambiguously (although the meaning is now clear
even by visual inspection).
Ioana Ciornei (1):
net: dsa: tag_8021q: Change order of rx_vid setup
Vladimir Oltean (1):
net: dsa: tag_8021q: Create a stable binary format
net/dsa/t
On Wed, 29 May 2019 at 04:08, Florian Fainelli wrote:
>
>
>
> On 5/28/2019 3:50 PM, Vladimir Oltean wrote:
> > Tools like tcpdump need to be able to decode the significance of fake
> > VLAN headers that DSA uses to separate switch ports.
> >
> > But current
elds inside the DSA 802.1Q VID so that
tcpdump can decode it unambiguously (although the meaning is now clear
even by visual inspection).
Ioana Ciornei (1):
net: dsa: tag_8021q: Change order of rx_vid setup
Vladimir Oltean (1):
net: dsa: tag_8021q: Create a stable binary format
net/dsa/t
.
Fixes: f9bbe4477c30 ("net: dsa: Optional VLAN-based port separation for
switches without tagging")
Signed-off-by: Ioana Ciornei
Signed-off-by: Vladimir Oltean
Reviewed-by: Florian Fainelli
---
Changes in v2:
None.
net/dsa/tag_8021q.c | 19 +++
1 file changed, 15 insert
ration for
switches without tagging")
Signed-off-by: Vladimir Oltean
Reviewed-by: Florian Fainelli
---
Changes in v2:
The MBZ bit didn't actually prevent the VID from taking the reserved
value of 0, so I replaced it with a two-bit DIR flag that really
accomplishes this purpose.
I also
g of the
SJA1105_SKB_CB(skb)->type field from the GRO layer, which made all
frames be seen as SJA1105_FRAME_TYPE_NORMAL (0).
Fixes: 227d07a07ef1 ("net: dsa: sja1105: Add support for traffic through
standalone ports")
Signed-off-by: Vladimir Oltean
---
include/linux/dsa/sja1105.h | 12
This patchset fixes two bugs in the logic handling of the enum
sja1105_speed_t which caused link speeds of 10 and 100 Mbps to not be
interpreted correctly and thus not be applied to the switch MACs.
Vladimir Oltean (2):
net: dsa: sja1105: Force a negative value for enum sja1105_speed_t
net
the -EINVAL value part of the enum, so that it is stored as a
signed number and passes the negative check.
Fixes: 8aa9ebccae87 ("net: dsa: Introduce driver for NXP SJA1105 5-port L2
switch")
Signed-off-by: Vladimir Oltean
---
drivers/net/dsa/sja1105/sja1105.h | 1 +
drivers/net/d
through the enum values to going through
the sja1105_speed array, which makes sure that all elements are visited
regardless of underlying ordering.
Fixes: 8aa9ebccae87 ("net: dsa: Introduce driver for NXP SJA1105 5-port L2
switch")
Signed-off-by: Vladimir Oltean
---
drivers/net/d
On Sat, 1 Jun 2019 at 19:03, Andrew Lunn wrote:
>
> On Sat, Jun 01, 2019 at 01:37:34PM +0300, Vladimir Oltean wrote:
> > The code in sja1105_adjust_port_config relies on the fact that an
> > invalid link speed is detected by sja1105_get_speed_cfg and returned as
> > -EINVA
This appends to the L2 Forwarding and L2 Forwarding Parameters tables
(originally added for first-generation switches) the bits that are new
in the second generation.
Signed-off-by: Vladimir Oltean
---
.../net/dsa/sja1105/sja1105_static_config.c | 18 ++---
.../net/dsa/sja1105
hide private DSA VLANs from the 'bridge fdb' commands.
The new FDB code was also tested and still works on SJA1105T.
Vladimir Oltean (11):
net: dsa: sja1105: Shim declaration of struct sja1105_dyn_cmd
net: dsa: sja1105: Fix bit offsets of index field from L2 lookup
entries
net: ds
negative index
argument denotes a search for the entry provided as argument.
Signed-off-by: Vladimir Oltean
---
.../net/dsa/sja1105/sja1105_dynamic_config.c | 36 ++-
.../net/dsa/sja1105/sja1105_dynamic_config.h | 3 ++
2 files changed, 38 insertions(+), 1 deletion(-)
diff
This structure is merely an implementation detail and should be hidden
from the sja1105_dynamic_config.h header, which provides to the rest of
the driver an abstract access to the dynamic configuration interface of
the switch.
Signed-off-by: Vladimir Oltean
---
drivers/net/dsa/sja1105
This was inadvertently copied from the SJA1105 E/T structure and not
tested. Cross-checking with the P/Q/R/S documentation (UM11040) makes
it immediately obvious what the correct bit offsets for this field are.
Signed-off-by: Vladimir Oltean
---
drivers/net/dsa/sja1105/sja1105_dynamic_config.c
rom
sja1105_main.c reads a structure defined in sja1105_spi.c that
points to a function defined in sja1105_main.c), but it is what it is.
The FDB dump callback works for both families, hence no function pointer
for that.
Signed-off-by: Vladimir Oltean
---
drivers/net/dsa/sja1105/sja110
that. It will be used while adding and deleting an
FDB entry (to see whether it exists or not).
Signed-off-by: Vladimir Oltean
---
.../net/dsa/sja1105/sja1105_dynamic_config.c | 54 +--
1 file changed, 50 insertions(+), 4 deletions(-)
diff --git a/drivers/net/dsa/sja1105
Conceptually, if an entry is not found in the requested hardware table,
it is not an invalid request - so change the error returned
appropriately.
Signed-off-by: Vladimir Oltean
---
drivers/net/dsa/sja1105/sja1105_dynamic_config.c | 2 +-
drivers/net/dsa/sja1105/sja1105_main.c | 2
Management routes are one-shot FDB rules installed on the CPU port for
sending link-local traffic. They are a prerequisite for STP, PTP etc to
work.
Also make a note that removing a management route was not supported on
the previous generation of switches.
Signed-off-by: Vladimir Oltean
till under investigation.
Signed-off-by: Vladimir Oltean
---
drivers/net/dsa/sja1105/sja1105.h | 5 ++
drivers/net/dsa/sja1105/sja1105_main.c | 89 +-
2 files changed, 92 insertions(+), 2 deletions(-)
diff --git a/drivers/net/dsa/sja1105/sja1105.h
b/drivers/net/dsa/sja1105
This is a cosmetic patch that simplifies the code by removing a
redundant check. A logical AND-with-zero performed on a zero is still
zero.
Signed-off-by: Vladimir Oltean
---
drivers/net/dsa/sja1105/sja1105_main.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers
e fdb'
command, as well as translate the pvid into the RX VID and TX VID on
'bridge fdb add' and 'bridge fdb del' commands.
Signed-off-by: Vladimir Oltean
---
drivers/net/dsa/sja1105/sja1105_main.c | 37 ++
1 file changed, 37 insertions(+)
diff -
approach and remove the sja1105_get_speed_cfg
function and replace it with a simple switch-case statement.
Fixes: 8aa9ebccae87 ("net: dsa: Introduce driver for NXP SJA1105 5-port L2
switch")
Signed-off-by: Vladimir Oltean
Suggested-by: Andrew Lunn
---
drivers/net/dsa/sja1105/sja1105_m
:
Applied Andrew Lunn's suggestion of removing the sja1105_get_speed_cfg
function altogether instead of trying to fix it.
Vladimir Oltean (1):
net: dsa: sja1105: Fix link speed not working at 100 Mbps and below
drivers/net/dsa/sja1105/sja1105_main.c | 32 +-
1
On Mon, 3 Jun 2019 at 03:50, Andrew Lunn wrote:
>
> On Mon, Jun 03, 2019 at 02:31:37AM +0300, Vladimir Oltean wrote:
> > The hardware values for link speed are held in the sja1105_speed_t enum.
> > However they do not increase in the order that sja1105_get_speed_cfg was
>
Hi,
I've been wondering what is the correct approach to cut the Ethernet
link when the user requests it to be administratively down (aka ip link
set dev eth0 down).
Most of the Ethernet drivers simply call phy_stop or the phylink
equivalent. This leaves an Ethernet link between the PHY and its
On Tue, 4 Jun 2019 at 23:07, Andrew Lunn wrote:
>
> On Tue, Jun 04, 2019 at 10:58:41PM +0300, Vladimir Oltean wrote:
> > Hi,
> >
> > I've been wondering what is the correct approach to cut the Ethernet link
> > when the user requests it to be administratively
On Tue, 4 Jun 2019 at 23:55, Heiner Kallweit wrote:
>
> On 04.06.2019 22:42, Vladimir Oltean wrote:
> > On Tue, 4 Jun 2019 at 23:07, Andrew Lunn wrote:
> >>
> >> On Tue, Jun 04, 2019 at 10:58:41PM +0300, Vladimir Oltean wrote:
> >>> Hi,
> >
On Tue, 4 Jun 2019 at 23:57, Florian Fainelli wrote:
>
>
>
> On 6/4/2019 1:42 PM, Vladimir Oltean wrote:
> > On Tue, 4 Jun 2019 at 23:07, Andrew Lunn wrote:
> >>
> >> On Tue, Jun 04, 2019 at 10:58:41PM +0300, Vladimir Oltean wrote:
> >>> Hi,
>
On Wed, 5 Jun 2019 at 00:12, Andrew Lunn wrote:
>
> > But now the second question: between a phy_connect and a phy_start,
> > shouldn't the PHY be suspended too? Experimentally it looks like it
> > still isn't.
>
> This is not always clear cut. Doing auto-neg is slow. Some systems
> want to get ne
On Wed, 5 Jun 2019 at 00:48, Russell King - ARM Linux admin
wrote:
>
> On Tue, Jun 04, 2019 at 02:37:31PM -0700, Florian Fainelli wrote:
> > The firmware/boot loader transition to a full fledged OS with a switch
> > is a tricky one to answer though, and there are no perfect answers
> > AFAICT. If
On Wed, 5 Jun 2019 at 01:16, Russell King - ARM Linux admin
wrote:
>
> On Wed, Jun 05, 2019 at 01:03:27AM +0300, Vladimir Oltean wrote:
> > On Wed, 5 Jun 2019 at 00:48, Russell King - ARM Linux admin
> > wrote:
> > >
> > > On Tue, Jun 04, 2019 at 02:3
On Wed, 5 Jun 2019 at 01:59, Russell King - ARM Linux admin
wrote:
>
> On Wed, Jun 05, 2019 at 01:44:08AM +0300, Vladimir Oltean wrote:
> > You caught me.
> >
> > But even ignoring the NIC case, isn't the PHY state machine
> > inconsistent with itself? It
On Wed, 5 Jun 2019 at 02:24, Russell King - ARM Linux admin
wrote:
>
> On Wed, Jun 05, 2019 at 02:03:19AM +0300, Vladimir Oltean wrote:
> > On Wed, 5 Jun 2019 at 01:59, Russell King - ARM Linux admin
> > wrote:
> > >
> > > On Wed, Jun 05, 2019 at 01:
On Wed, 5 Jun 2019 at 06:06, Florian Fainelli wrote:
>
>
>
> On 6/4/2019 4:46 PM, Vladimir Oltean wrote:
> > On Wed, 5 Jun 2019 at 02:24, Russell King - ARM Linux admin
> > wrote:
> >>
> >> On Wed, Jun 05, 2019 at 02:03:19AM +0300, Vladimir Oltea
On Wed, 5 Jun 2019 at 12:31, Russell King - ARM Linux admin
wrote:
>
> On Wed, Jun 05, 2019 at 11:27:59AM +0300, Vladimir Oltean wrote:
> > On Wed, 5 Jun 2019 at 06:06, Florian Fainelli wrote:
> > >
> > >
> > >
> > > On 6/4/2019 4:46 PM, Vladimir O
V freq 0.0 &> /dev/null
> + phc_ctl $DEV set &> /dev/null
> +}
> +
> +settime()
> +{
> + RET=0
> +
> + settime_do
> + check_err $?
> + log_test "settime"
> + cleanup
> +}
> +
> +adjtime()
> +{
> + RET=0
> +
> + adjtime_do
> + check_err $?
> + log_test "adjtime"
> + cleanup
> +}
> +
> +adjfreq()
> +{
> + RET=0
> +
> + adjfreq_do
> + check_err $?
> + log_test "adjfreq"
> + cleanup
> +}
> +
> +trap cleanup EXIT
> +
> +tests_run
> +
> +exit $EXIT_STATUS
> --
> 2.20.1
>
Cool testing framework, thanks!
Some things to consider:
- Why the .5 in the wait commands?
- I suspect there's a huge margin of inaccuracy that the test is
missing by only looking at the 'seconds' portion of the PHC time after
the adjfreq operation (up to 10^9 - 1 ppb, in the worst case).
Tested-by: Vladimir Oltean
Regards,
-Vladimir
On 6/7/19 2:15 PM, Vladimir Oltean wrote:
On Mon, 3 Jun 2019 at 15:25, Ido Schimmel wrote:
From: Shalom Toledo
Test the PTP Physical Hardware Clock functionality using the "phc_ctl" (a
part of "linuxptp").
The test contains three sub-tests:
* "settime&
This is a cosmetic patch that replaces the link speed numbers used in
the driver with the corresponding ethtool macros.
Signed-off-by: Vladimir Oltean
Suggested-by: Andrew Lunn
---
drivers/net/dsa/sja1105/sja1105_main.c | 22 +++---
1 file changed, 11 insertions(+), 11
Since the driver is now using PHYLINK exclusively, it makes sense to
remove all references to it and replace them with PHYLINK.
Signed-off-by: Vladimir Oltean
---
drivers/net/dsa/sja1105/Kconfig| 2 +-
drivers/net/dsa/sja1105/sja1105_main.c | 6 ++
2 files changed, 3 insertions
This patchset implements phylink_mac_link_up and phylink_mac_link_down,
while also removing the code that was modifying the EGRESS and INGRESS
MAC settings for STP and replacing them with the "inhibit TX"
functionality.
Vladimir Oltean (4):
net: dsa: sja1105: Use SPEED_{10,100,10
This will be used to stop egress traffic in .phylink_mac_link_up.
Signed-off-by: Vladimir Oltean
---
drivers/net/dsa/sja1105/sja1105.h | 2 ++
drivers/net/dsa/sja1105/sja1105_spi.c | 14 --
2 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/drivers/net/dsa/sja1105
the link down in .phylink_mac_config, which
is incorrect.
Signed-off-by: Vladimir Oltean
---
drivers/net/dsa/sja1105/sja1105_main.c | 114 +
1 file changed, 40 insertions(+), 74 deletions(-)
diff --git a/drivers/net/dsa/sja1105/sja1105_main.c
b/drivers/net/dsa/sja1105
This puts the quad PHY ports in power-down mode when the PHY transitions
to the PHY_HALTED state. It is likely that all the other PHYs support
the BMCR_PDOWN bit, but I only have the BCM5464R to test.
Signed-off-by: Vladimir Oltean
---
drivers/net/phy/broadcom.c | 2 ++
1 file changed, 2
=112614&state=*
which must be applied first.
Vladimir Oltean (2):
net: dsa: sja1105: Remove duplicate rgmii_pad_mii_tx from regs
net: dsa: sja1105: Add RGMII delay support for P/Q/R/S chips
drivers/net/dsa/sja1105/sja1105.h | 3 +-
drivers/net/dsa/sja1105/sja1105_clocking.c |
As per the DT phy-mode specification, RGMII delays are applied by the
MAC when there is no PHY present on the link.
Signed-off-by: Vladimir Oltean
---
drivers/net/dsa/sja1105/sja1105.h | 1 +
drivers/net/dsa/sja1105/sja1105_clocking.c | 98 +-
drivers/net/dsa
The pad_mii_tx registers point to the same memory region but were
unused. So convert to using these for RGMII I/O cell configuration, as
they bear a shorter name.
Signed-off-by: Vladimir Oltean
---
drivers/net/dsa/sja1105/sja1105.h | 2 +-
drivers/net/dsa/sja1105/sja1105_clocking.c | 2
ional offload through which
> > compatible Ethernet ports may configure their egress 802.1Qbv
> > schedulers.
> >
> > Signed-off-by: Vladimir Oltean
> > ---
> > include/net/dsa.h | 3 +++
> > net/dsa/slave.c | 14 ++
> > 2 files cha
On Wed, 17 Jul 2019 at 09:24, Wei Yongjun wrote:
>
> Add the missing unlock before return from function sk_buff()
> in the error handling case.
>
> Fixes: f3097be21bf1 ("net: dsa: sja1105: Add a state machine for RX
> timestamping")
> Signed-off-by: Wei Yongju
Hi Arseny,
Nice project!
On Wed, 24 Jul 2019 at 03:38, Arseny Solokha wrote:
>
> Convert gianfar to use the phylink API for better SFP modules support.
>
> The driver still uses phylib for serdes configuration over the TBI
> interface, as there seems to be no functionally equivalent API present
rts' hardware filter. DSA also avoids putting the VID inside
the netlink response message towards the bridge driver when we return
this particular VID, which makes it suitable for FDB entries learnt
with vlan_filtering off.
Fixes: 227d07a07ef1 ("net: dsa: sja1105: Add support for tra
et: dsa: sja1105: Cancel PTP delayed work on unregister")
Signed-off-by: Vladimir Oltean
---
drivers/net/dsa/sja1105/sja1105_main.c | 4 ++--
drivers/net/dsa/sja1105/sja1105_ptp.c | 7 +++
2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/net/dsa/sja1105/sja1105_
nction with other
error conditions. The fixed-up commits were all introduced in 5.2.
Vladimir Oltean (5):
net: dsa: sja1105: Fix broken learning with vlan_filtering disabled
net: dsa: sja1105: Use the LOCKEDS bit for SJA1105 E/T as well
net: dsa: sja1105: Really fix panic on unregistering PTP
Add a state machine for RX
timestamping")
Signed-off-by: Vladimir Oltean
---
net/dsa/tag_sja1105.c | 11 +--
1 file changed, 1 insertion(+), 10 deletions(-)
diff --git a/net/dsa/tag_sja1105.c b/net/dsa/tag_sja1105.c
index 26363d72d25b..8fa8dda8a15b 100644
--- a/net/dsa/tag_sja1105
mping")
Signed-off-by: Vladimir Oltean
---
net/dsa/tag_sja1105.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/net/dsa/tag_sja1105.c b/net/dsa/tag_sja1105.c
index 8fa8dda8a15b..47ee88163a9d 100644
--- a/net/dsa/tag_sja1105.c
+++ b/net/dsa/tag_sja1105.c
@@ -165,6 +165,7 @@ static stru
)
Signed-off-by: Vladimir Oltean
---
drivers/net/dsa/sja1105/sja1105_dynamic_config.c | 14 +-
drivers/net/dsa/sja1105/sja1105_main.c | 15 ---
2 files changed, 13 insertions(+), 16 deletions(-)
diff --git a/drivers/net/dsa/sja1105/sja1105_dynamic_config.c
b/drivers/
Hi Russell, Fabio,
On Sun, 11 Aug 2019 at 16:42, Russell King - ARM Linux admin
wrote:
>
> Hi Fabio,
>
> When I woke up this morning, I found that one of the Hummingboards
> had gone offline (as in, lost network link) during the night.
> Investigating, I find that the system had gone into OOM, an
Hi Marek,
On Sun, 11 Aug 2019 at 17:06, Marek Behun wrote:
>
> OK guys, something is terribly wrong here.
>
> I bisected to the commit mentioned (88d6272acaaa), looked around at the
> genphy functions, tried adding the link=0 workaround and it did work,
> so I though this was the issue.
>
> What
On Tue, Jan 12, 2021 at 10:16:32PM +0100, Marek Behún wrote:
> On Tue, 12 Jan 2021 22:38:08 +0200
> Vladimir Oltean wrote:
>
> > > + phylink_set(mask, 1baseT_Full);
> > > + phylink_set(mask, 1baseCR_Full);
> > > +
On Tue, Jan 12, 2021 at 08:54:04PM +0100, Marek Behún wrote:
> From: Pavana Sharma
>
> The Marvell 88E6393X device is a single-chip integration of a 11-port
> Ethernet switch with eight integrated Gigabit Ethernet (GbE)
> transceivers and three 10-Gigabit interfaces.
>
> This patch adds function
>
> Signed-off-by: Marek Behún
> Reviewed-by: Pavana Sharma
> ---
Reviewed-by: Vladimir Oltean
On Tue, Jan 12, 2021 at 07:06:29PM +0100, Marek Behún wrote:
> On Tue, 12 Jan 2021 16:29:09 +
> Russell King - ARM Linux admin wrote:
>
> > I'm seriously thinking about changing the phylink_validate() interface
> > such that the question of which link _modes_ are supported no longer
> > comes
From: Vladimir Oltean
This is a proposal for configuring the port-based default priority on
switch ports using tc-matchall and skbedit priority. Comments welcome.
Vladimir Oltean (2):
net: dsa: allow setting port-based QoS priority using tc matchall
skbedit
net: dsa: felix: offload port
From: Vladimir Oltean
In Time Sensitive Networking it is a common and simple use case to
configure switches to give all traffic from an attached station the same
priority, without requiring those stations to use VLAN PCP or IP DSCP to
signal the priority that they want. Many pieces of hardware
From: Vladimir Oltean
Even though we should really share the implementation with the ocelot
switchdev driver, that one needs a little bit of rework first, since its
struct ocelot_port_tc only supports one tc matchall action at a time,
which at the moment is used for port policers. Whereas DSA
On Wed, Jan 13, 2021 at 01:45:19PM +0100, Gilles DOFFE wrote:
> If 802.1q VLAN tag is removed from egress traffic, ingress
> traffic should by logic be tagged.
>
> Signed-off-by: Gilles DOFFE
> ---
> drivers/net/dsa/microchip/ksz8795.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/dr
On Wed, Jan 13, 2021 at 01:45:20PM +0100, Gilles DOFFE wrote:
> If a VLAN is removed, the tagging policy should not be changed as
> still active VLANs could be impacted.
>
> Signed-off-by: Gilles DOFFE
> ---
> drivers/net/dsa/microchip/ksz8795.c | 3 ---
> 1 file changed, 3 deletions(-)
>
> dif
viewed-by: Florian Fainelli
> ---
Reviewed-by: Vladimir Oltean
A few comments below.
> diff --git a/net/dsa/tag_xrs700x.c b/net/dsa/tag_xrs700x.c
> new file mode 100644
> index ..4ee7c260a8a9
> --- /dev/null
> +++ b/net/dsa/tag_xrs700x.c
> @@ -0,0 +1,67 @@
On Wed, Jan 13, 2021 at 09:42:54AM +0100, Tobias Waldekranz wrote:
> Support offloading of LAGs to hardware. LAGs may be attached to a
> bridge in which case VLANs, multicast groups, etc. are also offloaded
> as usual.
>
> Signed-off-by: Tobias Waldekranz
> ---
Reviewed-b
On Wed, Jan 13, 2021 at 03:37:49PM -0800, Florian Fainelli wrote:
> You are passing the whole dsa_mall_skbedit_tc_entry structure here,
> only to look up priority, would it make sense for now to pass
> skbedit->priority as a parameter which would be matching the function
> name and what it is deal
ropped, as their
> default VID (0) was not loaded into the VTU.
>
> Signed-off-by: Tobias Waldekranz
> ---
Reviewed-by: Vladimir Oltean
On Thu, Jan 14, 2021 at 12:41:28AM +0100, Andrew Lunn wrote:
> On Wed, Jan 13, 2021 at 05:41:38PM +0200, Vladimir Oltean wrote:
> > + int (*port_priority_set)(struct dsa_switch *ds, int port,
> > +struct dsa_mall_skbedit_tc_entry *skbedit);
&
On Wed, Jan 13, 2021 at 01:45:16PM +0100, Gilles DOFFE wrote:
>
> This patchset fixes various issues.
> It mainly concerns VLANs support by fixing FID table management to
> allow adding more than one VLAN.
> It also fixes tag/untag behavior on ingress/egress packets.
As far as I understand the se
On Wed, Jan 13, 2021 at 01:45:18PM +0100, Gilles DOFFE wrote:
> Move tag/untag action at the end of the function to avoid
> tagging or untagging traffic if only vlan 0 is handled.
>
> Signed-off-by: Gilles DOFFE
> ---
No matter how much you move the assignment around, there's no escaping
the tru
id.
>
> Signed-off-by: Gilles DOFFE
> ---
Reviewed-by: Vladimir Oltean
On Wed, Jan 13, 2021 at 08:59:21AM -0600, George McCollister wrote:
> Add a driver with initial support for the Arrow SpeedChips XRS7000
> series of gigabit Ethernet switch chips which are typically used in
> critical networking applications.
>
> The switches have up to three RGMII ports and one R
On Wed, Jan 13, 2021 at 01:45:22PM +0100, Gilles DOFFE wrote:
> '(u64)*value' casts a u32 to a u64. So depending on endianness,
> LSB or MSB is lost.
> The pointer needs to be cast to read the full u64:
> '*((u64 *)value)'
>
> Signed-off-by: Gilles DOFFE
> ---
Reviewed-by: Vladimir Oltean
On Wed, Jan 13, 2021 at 01:45:17PM +0100, Gilles DOFFE wrote:
> The FID (Filter ID) is a 7 bits field used to link the VLAN table
> to the static and dynamic mac address tables.
> Until now the KSZ8795 driver could only add one VLAN as the FID was
> always set to 1.
What do you mean the ksz8769 dr
From: Vladimir Oltean
prestera_bridge_port_vlan_add should have been called with vlan->vid,
however this was masked by the presence of the local vid variable and I
did not notice the build warning.
Reported-by: kernel test robot
Fixes: b7a9e0da2d1c ("net: switchdev: remove vid_begin -&
On Wed, Jan 13, 2021 at 07:25:52PM -0800, Jakub Kicinski wrote:
> On Mon, 11 Jan 2021 19:43:06 +0200 Vladimir Oltean wrote:
> > In some applications, it is important to create resource reservations in
> > the Ethernet switches, to prevent background traffic, or deliberate
&g
On Wed, Jan 13, 2021 at 07:30:33PM -0800, Jakub Kicinski wrote:
> On Mon, 11 Jan 2021 19:43:14 +0200 Vladimir Oltean wrote:
> > +struct ocelot_devlink_private {
> > + struct ocelot *ocelot;
> > +};
>
> I don't think you ever explained to me why you don&#
On Mon, Jan 11, 2021 at 11:19:09AM -0800, Jakub Kicinski wrote:
> > > devlink_port_attrs_set() should be called before netdev is registered,
> > > and devlink_port_type_eth_set() after. So this sequence makes me a tad
> > > suspicious.
> > >
> > > In particular IIRC devlink's .ndo_get_phys_port_nam
From: Vladimir Oltean
We'll need to read back the watermark thresholds and occupancy from
hardware (for devlink-sb integration), not only to write them as we did
so far in ocelot_port_set_maxlen. So introduce 2 new functions in struct
ocelot_ops, similar to wm_enc, and implement them for
From: Vladimir Oltean
Instead of reading these values from the reference manual and writing
them down into the driver, it appears that the hardware gives us the
option of detecting them dynamically.
The number of frame references corresponds to what the reference manual
notes, however it seems
From: Vladimir Oltean
Switches that care about QoS might have hardware support for reserving
buffer pools for individual ports or traffic classes, and configuring
their sizes and thresholds. Through devlink-sb (shared buffers), this is
all configurable, as well as their occupancy being viewable
From: Vladimir Oltean
We should be moving anything that isn't DSA-specific or SoC-specific out
of the felix DSA driver, and into the common mscc_ocelot switch library.
The number of traffic classes is one of the aspects that is common
between all ocelot switches, so it belongs in the li
.
There are 10 sharing watermarks, 8 of them are per traffic class and 2
are per drop priority.
I am configuring the hardware using the best of my knowledge, and mostly
through trial and error. Same goes for devlink-sb integration. Feedback
is welcome.
Vladimir Oltean (10):
net: mscc: ocelot
From: Vladimir Oltean
In general it is desirable that cleanup is the reverse process of setup.
In this case I am not seeing any particular issue, but with the
introduction of devlink-sb for felix, a non-obvious decision had to be
made as to where to put its cleanup method. When there
From: Vladimir Oltean
The devlink function pointer names are super long, and they would break
the alignment. So reindent the existing ops now by adding one tab.
Signed-off-by: Vladimir Oltean
Reviewed-by: Florian Fainelli
---
Changes in v5:
Rebase on top of recent series d1c8b6a3dd77 ("
From: Vladimir Oltean
This is a leftover of commit 69df578c5f4b ("net: mscc: ocelot: eliminate
confusion between CPU and NPI port") which renamed that function.
Signed-off-by: Vladimir Oltean
Reviewed-by: Florian Fainelli
---
Changes in v5:
None.
Changes in v4:
None.
Changes i
From: Vladimir Oltean
This is meant to be a gentle introduction into the world of watermarks
on ocelot. The code is placed in ocelot_devlink.c because it will be
integrated with devlink, even if it isn't right now.
My first step was intended to be to replicate the default configuration
o
From: Vladimir Oltean
Using devlink-sb, we can configure 12/16 (the important 75%) of the
switch's controlling watermarks for congestion drops, and we can monitor
50% of the watermark occupancies (we can monitor the reservation
watermarks, but not the sharing watermarks, which are expos
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