Re: [PATCH v1 0/2] Add 100 base-x mode

On Tue, 2021-01-12 at 16:05 +, Russell King - ARM Linux admin wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you > know the content is safe > > On Tue, Jan 12, 2021 at 03:33:34PM +0100, Bjarni Jonasson wrote: > > On Mon, 2021-01-11 at 14:18 +,

[PATCH net-next v2 1/2] net: phy: Add 100 base-x mode

Sparx-5 supports this mode and it is missing in the PHY core. Signed-off-by: Bjarni Jonasson --- Documentation/networking/phy.rst | 5 + include/linux/phy.h | 4 2 files changed, 9 insertions(+) diff --git a/Documentation/networking/phy.rst b/Documentation/networking

[PATCH net-next v2 0/2] Add 100 base-x mode

J9054C (bx-10) Excom SFP-SX-M1002 (base-lx) v1 -> v2: Added description to Documentation/networking/phy.rst Moved PHY_INTERFACE_MODE_100BASEX to above 1000BASEX Patching against net-next Bjarni Jonasson (2): net: phy: Add 100 base-x mode sfp: add support for 100 base-x S

[PATCH net-next v2 2/2] sfp: add support for 100 base-x SFPs

Add support for 100Base-FX, 100Base-LX, 100Base-PX and 100Base-BX10 modules This is needed for Sparx-5 switch. Signed-off-by: Bjarni Jonasson --- drivers/net/phy/sfp-bus.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/net/phy/sfp-bus.c b/drivers/net/phy/sfp-bus.c index

Re: [RFC PATCH v2 4/8] net: sparx5: add port module support

PORT_MODE(port->portno)); > > What does it mean by port forwarding? By default, packets should only > go to the CPU, until the port is added to a bridge. I've not thought > much about L3, since DSA so far only has L2 switches, but i guess you > don't need to enable L3

[PATCH] phy: phylink: Fix CuSFP issue in phylink

There is an issue with the current phylink driver and CuSFPs which results in a callback to the phylink validate function without any advertisement capabilities. The workaround (in this changeset) is to assign capabilities if a 1000baseT SFP is identified. Signed-off-by: Bjarni Jonasson

Re: [PATCH] phy: phylink: Fix CuSFP issue in phylink

Russell King - ARM Linux admin writes: > On Tue, Nov 10, 2020 at 11:06:42AM +0100, Bjarni Jonasson wrote: >> There is an issue with the current phylink driver and CuSFPs which >> results in a callback to the phylink validate function without any >> advertisement capabili

Re: [PATCH] phy: phylink: Fix CuSFP issue in phylink

Russell King - ARM Linux admin writes: > On Tue, Nov 10, 2020 at 03:16:34PM +0100, Bjarni Jonasson wrote: >> >> Russell King - ARM Linux admin writes: >> >> > On Tue, Nov 10, 2020 at 11:06:42AM +0100, Bjarni Jonasson wrote: >> >> There is an issue

Re: [PATCH] phy: phylink: Fix CuSFP issue in phylink

Russell King - ARM Linux admin writes: > On Wed, Nov 11, 2020 at 09:52:18AM +0100, Bjarni Jonasson wrote: >> >> Russell King - ARM Linux admin writes: >> >> > On Tue, Nov 10, 2020 at 03:16:34PM +0100, Bjarni Jonasson wrote: >> >> >> >> Russe

[PATCH v1 1/2] net: phy: Add 100 base-x mode

Sparx-5 supports this mode and it is missing in the PHY core. Signed-off-by: Bjarni Jonasson --- include/linux/phy.h | 4 1 file changed, 4 insertions(+) diff --git a/include/linux/phy.h b/include/linux/phy.h index 56563e5e0dc7..dce867222d58 100644 --- a/include/linux/phy.h +++ b/include

[PATCH v1 0/2] Add 100 base-x mode

Bjarni Jonasson (2): net: phy: Add 100 base-x mode sfp: add support for 100 base-x SFPs drivers/net/phy/sfp-bus.c | 9 + include/linux/phy.h | 4 2 files changed, 13 insertions(+) -- 2.17.1

[PATCH v1 2/2] sfp: add support for 100 base-x SFPs

Add support for 100Base-FX, 100Base-LX, 100Base-PX and 100Base-BX10 modules This is needed for Sparx-5 switch. Signed-off-by: Bjarni Jonasson --- drivers/net/phy/sfp-bus.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/net/phy/sfp-bus.c b/drivers/net/phy/sfp-bus.c index

Re: [PATCH v1 0/2] Add 100 base-x mode

On Mon, 2021-01-11 at 14:18 +, Russell King - ARM Linux admin wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you > know the content is safe > > On Mon, Jan 11, 2021 at 02:06:55PM +0100, Bjarni Jonasson wrote: > > Adding support for 100 base-x in phyli

Re: [PATCH v1 2/2] sfp: add support for 100 base-x SFPs

On Mon, 2021-01-11 at 14:22 +, Russell King - ARM Linux admin wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you > know the content is safe > > On Mon, Jan 11, 2021 at 02:06:57PM +0100, Bjarni Jonasson wrote: > > Add support for 100Base-FX, 100Base-

Re: [PATCH v1 1/2] net: phy: Add 100 base-x mode

On Mon, 2021-01-11 at 16:47 +, Russell King - ARM Linux admin wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you > know the content is safe > > On Mon, Jan 11, 2021 at 02:06:56PM +0100, Bjarni Jonasson wrote: > > Sparx-5 supports this mode and it is

Re: [PATCH v1 1/2] net: phy: Add 100 base-x mode

On Mon, 2021-01-11 at 20:37 +0100, Michał Mirosław wrote: > EXTERNAL EMAIL: Do not click links or open attachments unless you > know the content is safe > > pon., 11 sty 2021 o 14:54 Bjarni Jonasson > napisał(a): > > Sparx-5 supports this mode and it is missing in the PHY

[PATCH net v1 3/3] net: phy: mscc: coma mode disabled for VSC8514

s will not link-up. Signed-off-by: Steen Hegelund Signed-off-by: Bjarni Jonasson Fixes: e4f9ba642f0b ("net: phy: mscc: add support for VSC8514 PHY.") --- drivers/net/phy/mscc/mscc_main.c | 13 + 1 file changed, 13 insertions(+) diff --git a/drivers/net/phy/mscc/mscc_main.c b/

[PATCH net v1 1/3] net: phy: mscc: adding LCPLL reset to VSC8514

Hegelund Signed-off-by: Bjarni Jonasson Fixes: e4f9ba642f0b ("net: phy: mscc: add support for VSC8514 PHY.") --- drivers/net/phy/mscc/mscc.h | 22 drivers/net/phy/mscc/mscc_main.c | 181 +-- 2 files changed, 170 insertions(+), 33 deletions(-) di

[PATCH net v1 2/3] net: phy: mscc: improved serdes calibration applied to VSC8514

ch disables the 8051 algorithm and replaces it with the new FoJi algorithm. The calibration is now performed in the driver. Signed-off-by: Steen Hegelund Signed-off-by: Bjarni Jonasson Fixes: e4f9ba642f0b ("net: phy: mscc: add support for VSC8514 PHY.") --- drivers/net/phy/mscc/mscc.h

[PATCH net-next v2 1/3] net: phy: mscc: adding LCPLL reset to VSC8514

Hegelund Signed-off-by: Bjarni Jonasson Fixes: e4f9ba642f0b ("net: phy: mscc: add support for VSC8514 PHY.") --- v1 -> v2: Preserved reversed christmas tree Removed forward definitions Fixed build issues Changed net to net-next drivers/net/phy/mscc/mscc.h | 8 + dr

[PATCH net-next v2 3/3] net: phy: mscc: coma mode disabled for VSC8514

s will not link-up Signed-off-by: Steen Hegelund Signed-off-by: Bjarni Jonasson Fixes: e4f9ba642f0b ("net: phy: mscc: add support for VSC8514 PHY.") --- v1 -> v2: Modified coma mode config Changed net to net-next drivers/net/phy/mscc/mscc.h | 3 +++ drivers/net/ph

[PATCH net-next v2 2/3] net: phy: mscc: improved serdes calibration applied to VSC8514

ch disables the 8051 algorithm and replaces it with the new FoJi algorithm. The calibration is now performed in the drive. Signed-off-by: Steen Hegelund Signed-off-by: Bjarni Jonasson Tested-by: Vladimir Oltean Fixes: e4f9ba642f0b ("net: phy: mscc: add support for VSC8514 PHY.") --- v1 -> v

[PATCH net-next v3 2/3] net: phy: mscc: improved serdes calibration applied to VSC8514

goto err; + ret = vsc8514_config_host_serdes(phydev); + if (ret) + goto err; } phy_unlock_mdio_bus(phydev); diff --git a/drivers/net/phy/mscc/mscc_serdes.c b/drivers/net/phy/mscc/mscc_serdes.c new file mode 100644

[PATCH net-next v3 3/3] net: phy: mscc: coma mode disabled for VSC8514

s will not link-up. Fixes: e4f9ba642f0b ("net: phy: mscc: add support for VSC8514 PHY.") Signed-off-by: Steen Hegelund Signed-off-by: Bjarni Jonasson --- drivers/net/phy/mscc/mscc.h | 4 drivers/net/phy/mscc/mscc_main.c | 16 2 files changed, 20 insertions(+)

[PATCH net-next v3 1/3] net: phy: mscc: adding LCPLL reset to VSC8514

("net: phy: mscc: add support for VSC8514 PHY.") Signed-off-by: Steen Hegelund Signed-off-by: Bjarni Jonasson --- drivers/net/phy/mscc/mscc.h | 8 + drivers/net/phy/mscc/mscc_main.c | 350 --- 2 files changed, 236 insertions(+), 122 deletions(-) di

[PATCH net-next v3 0/3] Fixes applied to VCS8514

hristmas tree Removed forward definitions Fixed build issues Changed net to net-next v2 -> v3: Added cover letter. Removed ena_clk_bypass from function call Created mscc_serdes.c and .h for serdes configuration Modified coma register config. Bjarni Jonasson (3): net: phy: mscc: ad

[PATCH net-next v1 3/3] net: phy: mscc: coma mode disabled for VSC8584

This patch releases coma mode for VSC8584 as done for VSC8514 in commit ca0d7fd0a58d ("net: phy: mscc: coma mode disabled for VSC8514") Fixes: a5afc1678044a ("net: phy: mscc: add support for VSC8584 PHYY.") Signed-off-by: Bjarni Jonasson --- drivers/net/phy/mscc/mscc_

[PATCH net-next v1 0/3] Fixes applied to VCS8584 family

Three different fixes applied to VSC8584 family: 1. LCPLL reset 2. Serdes calibration 3. Coma mode disabled The same fixes has already been applied to VSC8514 and most of the functionality can be reused for the VSC8584. Bjarni Jonasson (3): net: phy: mscc: Applying LCPLL reset to VSC8584 net

[PATCH net-next v1 1/3] net: phy: mscc: Applying LCPLL reset to VSC8584

Introduced LCPLL reset in commit d15e08d9fb82 ("net: phy: mscc: adding LCPLL reset to VSC8514"). Now applying this reset to the VSC8584 phy familiy. Fixes: a5afc1678044a ("net: phy: mscc: add support for VSC8584 PHYY.") Signed-off-by: Bjarni Jonasson --- drivers/net/phy/

[PATCH net-next v1 2/3] net: phy: mscc: improved serdes calibration applied to VSC8584

Introduced 'FOJI' serdes calibration in commit 85e97f0b984e ("net: phy: mscc: improved serdes calibration applied to VSC8514") Now including the VSC8584 family. Fixes: a5afc1678044a ("net: phy: mscc: add support for VSC8584 PHYY.") Signed-off-by: Bjarni Jonas

[PATCH net-next v2 3/3] net: phy: mscc: coma mode disabled for VSC8584

This patch releases coma mode for VSC8584 as done for VSC8514 in commit ca0d7fd0a58d ("net: phy: mscc: coma mode disabled for VSC8514") Fixes: a5afc1678044a ("net: phy: mscc: add support for VSC8584 PHYY.") Signed-off-by: Bjarni Jonasson --- drivers/net/phy/mscc/mscc_

[PATCH net-next v2 1/3] net: phy: mscc: Applying LCPLL reset to VSC8584

Introduced LCPLL reset in commit d15e08d9fb82 ("net: phy: mscc: adding LCPLL reset to VSC8514"). Now applying this reset to the VSC8584 phy familiy. Fixes: a5afc1678044a ("net: phy: mscc: add support for VSC8584 PHYY.") Signed-off-by: Bjarni Jonasson --- drivers/net/phy/

[PATCH net-next v2 2/3] net: phy: mscc: improved serdes calibration applied to VSC8584

Introduced 'FOJI' serdes calibration in commit 85e97f0b984e ("net: phy: mscc: improved serdes calibration applied to VSC8514") Now including the VSC8584 family. Fixes: a5afc1678044a ("net: phy: mscc: add support for VSC8584 PHYY.") Signed-off-by: Bjarni Jonas

[PATCH net-next v2 0/3] Fixes applied to VCS8584 family

Three different fixes applied to VSC8584 family: 1. LCPLL reset 2. Serdes calibration 3. Coma mode disabled The same fixes has already been applied to VSC8514 and most of the functionality can be reused for the VSC8584. v1 -> v2: Preserved reversed christmas tree Bjarni Jonasson (3):