etter choice of kernel API for these operations
> avoiding the considerable overhead of maintaining a duplicated
> list in the driver.
>
> Signed-off-by: Claudiu Manoil
Tested-by: Alexandre Belloni
Acked-by: Alexandre Belloni
> ---
> Maybe this should go to net, since there
pport")
>
> Signed-off-by: Claudiu Manoil
Reviewed-by: Alexandre Belloni
> ---
> drivers/net/ethernet/mscc/ocelot.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/net/ethernet/mscc/ocelot.c
> b/drivers/net/ethernet/mscc/ocelot.c
> index b71e4ec
emoval into seperate parts for different maintainers.
> So if the patch fits your needs, please take it via your tree or
> give me an ack so I can apply them the mips-next tree.
>
> [...]
Applied, thanks!
[08/10] rtc: tx4939: Remove driver
commit: 446667df283002fdda0530523347ffd1cf053373
Best regards,
--
Alexandre Belloni
On 07/01/2021 10:19:24+0100, Steen Hegelund wrote:
> Add Sparx5 serdes driver node, and enable it generally for all
> reference boards.
>
> Signed-off-by: Lars Povlsen
> Signed-off-by: Steen Hegelund
> Reviewed-by: Andrew Lunn
Reviewed-by: Alexandre Belloni
> ---
&
On 07/01/2021 10:19:21+0100, Steen Hegelund wrote:
> Document the Sparx5 ethernet serdes phy driver bindings.
>
> Signed-off-by: Lars Povlsen
> Signed-off-by: Steen Hegelund
> Reviewed-by: Rob Herring
> Reviewed-by: Andrew Lunn
Reviewed-by: Alexandre Belloni
> --
; Reviewed-by: Andrew Lunn
Reviewed-by: Alexandre Belloni
> ---
> include/linux/phy/phy-ethernet-serdes.h | 30 +
> include/linux/phy/phy.h | 4
> 2 files changed, 34 insertions(+)
> create mode 100644 include/linux/phy/phy-ethernet-serd
as probably the one, the main reason being that this make this
function able to fail. Removing the dynamic allocation would ensure it
never fails. However, I didn't suggest any other solution so I'm fine if
you keep it.
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
ial Ocelot switch support")
> Signed-off-by: Christophe JAILLET
Acked-by: Alexandre Belloni
> ---
> drivers/net/ethernet/mscc/ocelot_vsc7514.c | 8 +++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/ethernet/mscc/ocelot_vsc7514.c
>
address learning unless the bridge asks for it. Currently this is
> the only bridge port flag we are looking at. The others (flooding etc)
> are TBD.
>
> Signed-off-by: Vladimir Oltean
Reviewed-by: Alexandre Belloni
> ---
> drivers/net/ethernet/mscc/ocelot.c | 21
tain conditions.
>
> Signed-off-by: Vladimir Oltean
Reviewed-by: Alexandre Belloni
> ---
> drivers/net/ethernet/mscc/ocelot_net.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/drivers/net/ethernet/mscc/ocelot_net.c
> b/drivers/net/etherne
);
> + if (ret)
> + goto notify;
> + }
> + } else {
> + ret = ocelot_netdevice_changeupper(dev, event, info);
Does that compile? Shouldn't event be dropped?
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
ocelot_netdevice_lag_changeupper(dev, info);
> +
> + break;
> + }
> + default:
> + break;
> }
>
> -notify:
> - return notifier_from_errno(ret);
> + return NOTIFY_DONE;
This changes the return value from NOTIFY_OK to NOTIFY_DONE but this is
probably what we want.
> }
>
> struct notifier_block ocelot_netdevice_nb __read_mostly = {
> --
> 2.25.1
>
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
ad allow the bonding driver to select the egress interface in
> software.
>
> Signed-off-by: Vladimir Oltean
Reviewed-by: Alexandre Belloni
> ---
> drivers/net/ethernet/mscc/ocelot_net.c | 38 ++
> 1 file changed, 15 insertions(+), 23 deletions(-)
On 15/12/2020 16:52:26+0100, Alexandre Belloni wrote:
> On 08/12/2020 14:07:50+0200, Vladimir Oltean wrote:
> > Make ocelot's net device event handler more streamlined by structuring
> > it in a similar way with others. The inspiration here was
> > dsa_slave_netdevice_eve
e is 1.
>
> Integration with the xmit_hash_policy of the bonding interface is TBD.
>
> Signed-off-by: Vladimir Oltean
Reviewed-by: Alexandre Belloni
> ---
> drivers/net/ethernet/mscc/ocelot.c | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/
rrent "lags" array, but the duplication will be
> short-lived, since further patches will remove the latter completely.
>
> Signed-off-by: Vladimir Oltean
Reviewed-by: Alexandre Belloni
> ---
> drivers/net/ethernet/mscc/ocelot.c | 29 ++---
> include/so
_ffs(bond_mask);
> ocelot->lags[lp] = 0;
> }
>
> lp was clobbered before, because it was used as a temporary variable to
> hold the new smallest port ID from the bond. Now that we don't have "lp"
> any longer, we&
On 08/12/2020 14:07:55+0200, Vladimir Oltean wrote:
> In anticipation of further simplification, make it more clear what we're
> iterating over.
>
> Signed-off-by: Vladimir Oltean
Reviewed-by: Alexandre Belloni
> ---
> drivers/net/ethernet/mscc/ocelot.c | 11 +++--
mask so that it could be reused, and call it when a port
> starts and stops offloading a bonding interface.
>
> Signed-off-by: Vladimir Oltean
Reviewed-by: Alexandre Belloni
> ---
> drivers/net/ethernet/mscc/ocelot.c | 68 +-
> 1 file changed,
.
>
> Signed-off-by: Vladimir Oltean
Reviewed-by: Alexandre Belloni
> ---
> drivers/net/ethernet/mscc/ocelot.c | 47 ++
> 1 file changed, 28 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/net/ethernet/mscc/ocelot.c
> b/drivers/net/eth
t; info->upper_dev);
> else
> - ocelot_port_lag_leave(ocelot, port,
> - info->upper_dev);
> + err = ocelot_port_lag_leave(ocelot, port,
> + info->upper_dev);
> }
>
> return notifier_from_errno(err);
> diff --git a/include/soc/mscc/ocelot.h b/include/soc/mscc/ocelot.h
> index b812bdff1da1..0cd45659430f 100644
> --- a/include/soc/mscc/ocelot.h
> +++ b/include/soc/mscc/ocelot.h
> @@ -639,8 +639,6 @@ struct ocelot {
> enum ocelot_tag_prefix inj_prefix;
> enum ocelot_tag_prefix xtr_prefix;
>
> - u32 *lags;
> -
> struct list_headmulticast;
> struct list_headpgids;
>
> --
> 2.25.1
>
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On 08/12/2020 14:07:59+0200, Vladimir Oltean wrote:
> It makes it a bit easier to read and understand the code that deals with
> balancing the 16 aggregation codes among the ports in a certain LAG.
>
> Signed-off-by: Vladimir Oltean
Reviewed-by: Alexandre Belloni
> ---
> dr
if (!ocelot_netdevice_dev_check(dev))
> + break;
> +
> + return ocelot_netdevice_changelowerstate(dev,
> +
> info->lower_state_info);
> + }
> default:
> break;
> }
> diff --git a/include/soc/mscc/ocelot.h b/include/soc/mscc/ocelot.h
> index 0cd45659430f..8a44b9064789 100644
> --- a/include/soc/mscc/ocelot.h
> +++ b/include/soc/mscc/ocelot.h
> @@ -599,6 +599,7 @@ struct ocelot_port {
> u8 *xmit_template;
>
> struct net_device *bond;
> + boollag_tx_active;
> };
>
> struct ocelot {
> --
> 2.25.1
>
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
x27;t already be done using platform drivers
and platform devices?
We already have a bunch of drivers in tree that have to share a state
and register other drivers from other subsystems for the same device.
How is the auxiliary bus different?
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
rticular
SoC, I can disable the CPU and connect it to another SoC using PCIe. In
that case it will expose one BAR, with all the HW IPs.
The question here is why would I use something different from platform
devices to register the SPI and I2C controllers? It seems that by using
auxiliary devices, I wou
had a quite strong
> NAK to that.
Let me point to drivers/net/ethernet/cadence/macb_pci.c which is a
fairly recent example. It does exactly that and I'm not sure you could
do it otherwise while still not having to duplicate most of macb_probe.
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On 18/12/2020 19:36:08-0400, Jason Gunthorpe wrote:
> On Fri, Dec 18, 2020 at 10:16:58PM +0100, Alexandre Belloni wrote:
>
> > But then again, what about non-enumerable devices on the PCI device? I
> > feel this would exactly fit MFD. This is a collection of IPs that exist
>
you can ensure from the reset controller
driver that this is done exactly once, either from the sgpio driver or
from the switchdev driver. IIRC, the sgpio from the other SoCs are not
affected by the reset.
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
c for this patch set as phylink maintainer in
>your patch set so I can review your use of phylink.
>
Note that this series is different from the network (switchdev) driver
series and doesn't make use of phylink.
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
looks like this is for networking only? So i'm wondering if it
> belongs in driver/net/pcs and it should be accessed using
> phylink_pcs_ops?
>
Ocelot had PCie on the phys, doesn't Sparx5 have it?
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
ted.
>
> Reported-by: Eldar Gasanov
> Reported-by: Maxim Kochetkov
> Tested-by: Eldar Gasanov
> Fixes: 84705fc16552 ("net: dsa: felix: introduce support for Seville VSC9953
> switch")
> Fixes: 3c7b51bd39b2 ("net: dsa: felix: allow flooding for all traffic
>
that he intends to add support for a switch
> managed over a slow bus like SPI, and to use the same regmap infrastructure.
> That would mean that this problem would need to be resolved anyway.
>
This is still on the way but it will not happen this year unfortunately.
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
e?
>
No, the SoC can also expose its registers as a pcie endpoint or a SPI
device. In that case, obviously, the on board MIPS CPU is not enabled.
IIRC, you can even access all the registers using MDIO.
> > > Also for a reference - there are drivers out there with busy poll
> > > timeout of seconds :/
> >
> > Yeah, not sure if that tells me anything. I prefer avoiding that from
> > atomic context, because our cyclictest numbers are not that great anyway,
> > the last thing I want is to make them worse.
>
> Fair.
On that topic, we could certainly play with regmap fast_io, I dont
remember if this is enabled by default or even remove regmap locking
completely when using MMIO.
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
11...
>
> Let's revert ASAP, 5.10 is going to be LTS, people will definitely
> notice.
>
> Would you mind sending a revert patch with the explanation in the
> commit message?
FWIW, I went to the office and brought back my rm9200 today. I didn't
have the time to set up a test yet though. I'm not sure it will even
boot v5.10 so don't bet anyone apart me would notice Ethernet being
broken on this SoC.
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
our search - site:kernel.org
>20201127133307.2969817-1-steen.hegel...@microchip.com - did not
> match any documents. Suggestions: Make sure that all words are
>spelled correctly. Try different keywords. Try more general
>keywords.
>
http://lore.kernel.org/r/20201127133307.2969817-1-steen.hegel...@microchip.com
does the right redirect.
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
the tests. I initially wanted to get my old SAM9G20 board
> to boot until I noticed that it doesn't even use the same set of
> functions, so the potential victims are extremely limited :-)
>
I think I'm the only one booting recent linux kernels on at91rm9200 and
I'm currently stuck home while the board is at the office. I'll try to
test as soon as possible, which may not be before 2021... At least I'll
know who is the culprit ;)
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
ng mostly used for
managmement (dhcp, stp, etc...) as opposed to being used to forward
traffic to another interface, like WAN or wifi.
However, I would think there will be cases where the internal CPU is not
use and instead use ths switch in a DSA setting, very much like what is
done for Feli
sistent with the standalone mode now.
>
IIRC, we are using pvid 1 because else bridging breaks when
CONFIG_VLAN_8021Q is not enabled. Did you test that configuration?
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
her one here.
>
> > Anyhow. I'm working on a version of your patch that should work with
> > both the at91rm9200 and the MSC313E.
>
> Cool! Thanks for letting me know. If you need me to run some test, let
> me know (just don't expect too short latency these days but I definitely
> will test).
>
Note that I have my rm9200ek home now and I could also run some tests.
(I do hope it still boots a recent kernel).
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
t;David S. Miller"
> Cc: Jakub Kicinski
> Cc: Sebastian Reichel
> Cc: Mark Brown
> Cc: Alexandre Belloni
> Cc: Greg Kroah-Hartman
> Cc: Serge Semin
> Cc: Wolfram Sang
> Cc: linux-hw...@vger.kernel.org
> Cc: linux-...@vger.kernel.org
> Cc: linux-...@vger
ng interfaces from different
switches in the same bridge. Anyway, this is definitively not something
we want because of the limited bandwidth of the CPU port.
--
Alexandre Belloni, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
rtc_proc_add_device(struct rtc_device *rtc)
> {
> if (is_rtc_hctosys(rtc))
> - proc_create_data("driver/rtc", 0, NULL, &rtc_proc_fops, rtc);
> + proc_create_single_data("driver/rtc", 0, NULL, rtc_proc_show,
> + rtc);
> }
>
> void rtc_proc_del_device(struct rtc_device *rtc)
> --
> 2.17.0
>
--
Alexandre Belloni, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
this address and set the phy ID to 0x which is then properly
handled in get_phy_device().
Suggested-by: Andrew Lunn
Signed-off-by: Alexandre Belloni
---
drivers/net/phy/phy_device.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/net/phy
On 24/04/2018 09:37:09-0700, Florian Fainelli wrote:
>
>
> On 04/24/2018 09:09 AM, Alexandre Belloni wrote:
> > Some MDIO busses will error out when trying to read a phy address with no
> > phy present at that address. In that case, probing the bus will fail
> > beca
On Ocelot, forwarding packets to the host (i.e. forwarding frames
received on the port to the cpu port) is separate from bridging ports
together. So after that command, the host can receive packets on lan0.
--
Alexandre Belloni, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
On 25/04/2018 17:48:14+0200, Christoph Hellwig wrote:
> And stop trying to get a reference on the submodule, procfs code deals
> with release after and unloaded module and thus removed proc entry.
small typo here^
>
> Signed-off-by: Christoph Hellwig
Acked-by: Alexa
Add a driver for the Microsemi MII Management controller (MIIM) found on
Microsemi SoCs.
On Ocelot, there are two controllers, one is connected to the internal
PHYs, the other one can communicate with external PHYs.
Signed-off-by: Alexandre Belloni
---
drivers/net/phy/Kconfig | 7
DT bindings for the Ethernet switch found on Microsemi Ocelot platforms.
Cc: Rob Herring
Cc: James Hogan
Signed-off-by: Alexandre Belloni
---
.../devicetree/bindings/net/mscc-ocelot.txt | 82 +++
1 file changed, 82 insertions(+)
create mode 100644 Documentation/devicetree
Add myself as a maintainer for the Microsemi Ethernet switches.
Signed-off-by: Alexandre Belloni
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 0a1410d5a621..b632deb3f503 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9280,6 +9280,12
Ocelot has an integrated switch, add support for it.
Cc: James Hogan
Signed-off-by: Alexandre Belloni
---
arch/mips/boot/dts/mscc/ocelot.dtsi | 88 +
1 file changed, 88 insertions(+)
diff --git a/arch/mips/boot/dts/mscc/ocelot.dtsi
b/arch/mips/boot/dts/mscc
Add phy to switch port connections for PCB123 for internal PHYs.
Cc: James Hogan
Signed-off-by: Alexandre Belloni
---
arch/mips/boot/dts/mscc/ocelot_pcb123.dts | 20
1 file changed, 20 insertions(+)
diff --git a/arch/mips/boot/dts/mscc/ocelot_pcb123.dts
b/arch/mips/boot
ating
interrupts).
Cc: James Hogan
Alexandre Belloni (7):
dt-bindings: net: add DT bindings for Microsemi MIIM
net: mscc: Add MDIO driver
dt-bindings: net: add DT bindings for Microsemi Ocelot Switch
net: mscc: Add initial Ocelot switch support
MIPS: mscc: Add switch to ocelot
MIPS:
DT bindings for the Microsemi MII Management Controller found on Microsemi
SoCs
Cc: Rob Herring
Reviewed-by: Florian Fainelli
Signed-off-by: Alexandre Belloni
---
.../devicetree/bindings/net/mscc-miim.txt | 26 +++
1 file changed, 26 insertions(+)
create mode 100644
nternal PHYs?
>
> I'm just wondering if they should be linked together by default. Or a
> comment added to the commit message about why they are not linked
> together here.
>
They are dual media ports so they are not necessarily using the
integrated PHY but can use SerDEs1G lanes.
I'll add that to the commit message.
--
Alexandre Belloni, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
DT bindings for the Microsemi MII Management Controller found on Microsemi
SoCs
Cc: Rob Herring
Signed-off-by: Alexandre Belloni
---
.../devicetree/bindings/net/mscc-miim.txt | 25 ++
1 file changed, 25 insertions(+)
create mode 100644 Documentation/devicetree
Add phy to switch port connections for PCB123 for internal PHYs.
Cc: James Hogan
Signed-off-by: Alexandre Belloni
---
arch/mips/boot/dts/mscc/ocelot_pcb123.dts | 16
1 file changed, 16 insertions(+)
diff --git a/arch/mips/boot/dts/mscc/ocelot_pcb123.dts
b/arch/mips/boot/dts
Add myself as a maintainer for the Microsemi Ethernet switches.
Signed-off-by: Alexandre Belloni
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 14ce8b290fea..45be80225130 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9177,6 +9177,12
Add Microsemi Ocelot internal PHY ids. For now, simply use the genphy
functions but more features are available.
Cc: Raju Lakkaraju
Signed-off-by: Alexandre Belloni
---
drivers/net/phy/mscc.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/net/phy/mscc.c b/drivers
Ocelot has an integrated switch, add support for it.
Cc: James Hogan
Signed-off-by: Alexandre Belloni
---
arch/mips/boot/dts/mscc/ocelot.dtsi | 84 +
1 file changed, 84 insertions(+)
diff --git a/arch/mips/boot/dts/mscc/ocelot.dtsi
b/arch/mips/boot/dts
external CPU using PCIe. I have a
PoC for that but it is still a bit clunky.
Also, support for integration on other SoCs will be submitted.
The ocelot dts changes are here for reference and should probably go
through the MIPS tree once the bindings are accepted.
Cc: James Hogan
Alexandre Belloni (8
DT bindings for the Ethernet switch found on Microsemi Ocelot platforms.
Cc: Rob Herring
Signed-off-by: Alexandre Belloni
---
.../devicetree/bindings/net/mscc-ocelot.txt| 62 ++
1 file changed, 62 insertions(+)
create mode 100644 Documentation/devicetree/bindings
Add a driver for the Microsemi MII Management controller (MIIM) found on
Microsemi SoCs.
On Ocelot, there are two controllers, one is connected to the internal
PHYs, the other one can communicate with external PHYs.
Signed-off-by: Alexandre Belloni
---
drivers/net/ethernet/Kconfig
On 23/03/2018 at 14:17:48 -0700, Florian Fainelli wrote:
> On 03/23/2018 01:11 PM, Alexandre Belloni wrote:
> > +
> > + phy0: ethernet-phy@0 {
> > + reg = <0>;
> > + };
> > +
On 23/03/2018 at 14:08:10 -0700, Florian Fainelli wrote:
> On 03/23/2018 01:11 PM, Alexandre Belloni wrote:
> > Add Microsemi Ocelot internal PHY ids. For now, simply use the genphy
> > functions but more features are available.
> >
> > Cc: Raju Lakkaraju
> >
On 23/03/2018 at 21:49:39 +0100, Andrew Lunn wrote:
> On Fri, Mar 23, 2018 at 09:11:12PM +0100, Alexandre Belloni wrote:
> > Add a driver for the Microsemi MII Management controller (MIIM) found on
> > Microsemi SoCs.
> > On Ocelot, there are two controllers, one is conn
+ if (mscc_miim_read(bus, i, MII_PHYSID1) < 0)
> > + bus->phy_mask |= BIT(i);
> > + }
>
> What is this used for? You have an OF MDIO bus which would create a
> phy_device for each node specified, is this a similar workaround to what
> drivers/net/p
t; It sounds like the correct fix is for get_phy_id() to look at the
> error code for mdiobus_read(bus, addr, MII_PHYSID1). If it is EIO and
> maybe ENODEV, set *phy_id to 0x and return. The scan code
> should then do the correct thing.
>
That could work indeed. Do you want me to test and send a patch?
--
Alexandre Belloni, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
f-by: Antoine Tenart
Reviewed-by: Alexandre Belloni
> ---
> drivers/net/ethernet/mscc/ocelot_board.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/ethernet/mscc/ocelot_board.c
> b/drivers/net/ethernet/mscc/ocelot_board.c
> index 18df7d934e81
| 2 +-
> drivers/net/ethernet/smsc/Kconfig| 6 +++---
> drivers/net/wireless/cisco/Kconfig | 2 +-
> drivers/pwm/Kconfig | 2 +-
> drivers/rtc/Kconfig | 2 +-
Acked-by: Alexandre Belloni
> drivers/spi/Kconfig | 4 ++--
> d
On 23/03/2018 at 14:41:25 -0700, Florian Fainelli wrote:
> On 03/23/2018 01:11 PM, Alexandre Belloni wrote:
> > Add a driver for Microsemi Ocelot Ethernet switch support.
> >
> > This makes two modules:
> > mscc_ocelot_common handles all the common features that do
orwarding frames. And this is the case because b53_enable_port()
does put 0 in B53_PORT_CTRL.
The fact is that ocelot doesn't have separate controls. The port is
either forwarding or not. If it is not forwarding, then there is nothing
to tell the HW to do.
--
Alexandre Belloni, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
t; properly for these modified functions.
>
> Miscellanea:
>
> o Remove extra trailing ; and blank line from xfs_agf_verify
>
> Signed-off-by: Joe Perches
For RTC:
Acked-by: Alexandre Belloni
--
Alexandre Belloni, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
d-by: Alexandre Belloni
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
first goal was to get access to
phylink_ethtool_get_pauseparam/phylink_ethtool_set_pauseparam and the
flow control logic instead of having to open code it.
There are also boards with a zynqmp and SFP cages.
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
gt; include/soc/mscc/ocelot.h | 1 +
> net/dsa/tag_ocelot.c | 11 +-
> 7 files changed, 168 insertions(+), 110 deletions(-)
>
This series is leading to multiple crashes on my vc7524 board. I'm
trying to pinpoint the problematic commits
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
ethernet-phy@1 {
> - reg = <0x1>;
> - reset-gpios = <&pioE 6 1>;
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + ether
4,
> - rx_data_skews, 4);
> + rx_data_skews, 4, &update);
>
> ksz9031_of_load_skew_values(phydev, of_node,
> MII_KSZ9031RN_TX_DATA_PAD_SKEW, 4,
> - tx_data_skews, 4);
> + tx_data_skews, 4, &update);
> +
> + if (update && phydev->interface != PHY_INTERFACE_MODE_RGMII)
> + phydev_warn(phydev,
> + "*-skew-ps values should be used only with
> phy-mode = \"rgmii\"\n");
>
> /* Silicon Errata Sheet (DS8691D or DS8692D):
>* When the device links in the 1000BASE-T slave mode only,
> --
> 2.26.0.rc2
>
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On 11/07/2020 00:54:53+0200, Andrew Lunn wrote:
> On Sat, Jul 11, 2020 at 12:36:10AM +0200, Alexandre Belloni wrote:
> > Hi Oleksij,
> >
> > This patch breaks Ethernet on the sama5d3 Xplained and I have not been
> > able to unbreak it.
>
> Hi Alexandre
&
the phy-mode has to be set to rgmii-rxid.
Fixes: bcf3440c6dd78bfe ("net: phy: micrel: add phy-mode support for the
KSZ9031 PHY")
Signed-off-by: Alexandre Belloni
---
drivers/net/ethernet/cadence/macb_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ne
gt; rew_op = ocelot_port->ptp_cmd;
> - if (ocelot_port->ptp_cmd == IFH_REW_OP_TWO_STEP_PTP) {
> - rew_op |= (ocelot_port->ts_id % 4) << 3;
> - ocelot_port->ts_id++;
> - }
> + /* Retrieve timestamp ID populated inside skb->cb[0] of the
> + * clone by ocelot_port_add_txtstamp_skb
> + */
> + if (ocelot_port->ptp_cmd == IFH_REW_OP_TWO_STEP_PTP)
> + rew_op |= clone->cb[0] << 3;
>
> packing(injection, &rew_op, 125, 117, OCELOT_TAG_LEN, PACK, 0);
> }
> --
> 2.25.1
>
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
ot_release_ports from the error path of mscc_ocelot_init_ports.
>
> Signed-off-by: Vladimir Oltean
> Reviewed-by: Horatiu Vultur
Tested-by: Alexandre Belloni
Reviewed-by: Alexandre Belloni
> ---
> Changes in v2:
> Keep a reference to the 'ports' OF node at caller
On 18/09/2020 04:07:29+0300, Vladimir Oltean wrote:
> From: Vladimir Oltean
>
> This driver was not unregistering its network interfaces on unbind.
> Now it is.
>
> Signed-off-by: Vladimir Oltean
> Reviewed-by: Horatiu Vultur
Tested-by: Alexandre Belloni
Reviewed-
ng down the driver, and add
> a new function ocelot_deinit_port() to the switch library, mirror of
> ocelot_init_port(), which needs to be called by the driver for all ports
> it has initialized.
>
> Signed-off-by: Vladimir Oltean
Tested-by: Alexandre Belloni
Reviewed-by: Ale
Oltean
Reviewed-by: Alexandre Belloni
> ---
> drivers/net/ethernet/mscc/ocelot_ptp.c | 3 ++-
> include/soc/mscc/ocelot_ptp.h | 3 ++-
> 2 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/ethernet/mscc/ocelot_ptp.c
> b/drivers/net/ether
The skb should be
> added to the queue before the IRQ can fire.
>
> Fixes: 4e3b0468e6d7 ("net: mscc: PTP Hardware Clock (PHC) support")
> Signed-off-by: Vladimir Oltean
> Reviewed-by: Horatiu Vultur
Tested-by: Alexandre Belloni
Reviewed-by: Alexandre Belloni
>
The skb should be
> added to the queue before the IRQ can fire.
>
> Fixes: 4e3b0468e6d7 ("net: mscc: PTP Hardware Clock (PHC) support")
> Signed-off-by: Vladimir Oltean
> Reviewed-by: Horatiu Vultur
Tested-by: Alexandre Belloni
Reviewed-by: Alexandre Belloni
>
-#define PHY_CFG_PHY_RESET (BIT(5) | BIT(6) | BIT(7) |
> BIT(8))
> -#define MSCC_PHY_REG_PHY_STATUS 0x4
>
> static const u32 vsc9953_ana_regmap[] = {
> REG(ANA_ADVLEARN, 0x00b500),
> --
> 2.25.1
>
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On 18/09/2020 04:07:25+0300, Vladimir Oltean wrote:
> From: Vladimir Oltean
>
> The VSC9953 Seville switch has 2 megabits of buffer split into 4360
> words of 60 bytes each.
>
> Signed-off-by: Vladimir Oltean
> Reviewed-by: Horatiu Vultur
Tested-by: Alexandre Belloni
R
f-by: Vladimir Oltean
> Reviewed-by: Horatiu Vultur
Tested-by: Alexandre Belloni
Reviewed-by: Alexandre Belloni
> ---
> Changes in v2:
> Stopped leaking the 'ports' OF node in the VSC7514 driver.
>
> drivers/net/dsa/ocelot/felix.c | 5 -
> drive
The skb should be
> added to the queue before the IRQ can fire.
>
> Fixes: 4e3b0468e6d7 ("net: mscc: PTP Hardware Clock (PHC) support")
> Signed-off-by: Vladimir Oltean
> Reviewed-by: Horatiu Vultur
Tested-by: Alexandre Belloni
Reviewed-by: Alexandre Belloni
>
The skb should be
> added to the queue before the IRQ can fire.
>
> Fixes: 4e3b0468e6d7 ("net: mscc: PTP Hardware Clock (PHC) support")
> Signed-off-by: Vladimir Oltean
> Reviewed-by: Horatiu Vultur
Tested-by: Alexandre Belloni
Reviewed-by: Alexandre Belloni
>
The skb should be
> added to the queue before the IRQ can fire.
>
> Fixes: 4e3b0468e6d7 ("net: mscc: PTP Hardware Clock (PHC) support")
> Signed-off-by: Vladimir Oltean
> Reviewed-by: Horatiu Vultur
Tested-by: Alexandre Belloni
Reviewed-by: Alexandre Belloni
>
actual skb, but for felix, it is called for the skb's
> clone. That is something which will also be changed in the future.
>
> Signed-off-by: Vladimir Oltean
> Reviewed-by: Horatiu Vultur
Tested-by: Alexandre Belloni
Reviewed-by: Alexandre Belloni
> ---
> Changes i
On 18/09/2020 04:07:26+0300, Vladimir Oltean wrote:
> From: Vladimir Oltean
>
> Do not proceed probing if we couldn't allocate memory for the ports
> array, just error out.
>
> Signed-off-by: Vladimir Oltean
> Reviewed-by: Horatiu Vultur
Tested-by: Alexandre Bello
On 18/09/2020 17:26:03+0200, Alexandre Belloni wrote:
> On 18/09/2020 04:07:23+0300, Vladimir Oltean wrote:
> > From: Vladimir Oltean
> >
> > The TX-timestampable skb is added late to the ocelot_port->tx_skbs. It
> > is in a race with the TX timestamp IRQ, which c
The skb should be
> added to the queue before the IRQ can fire.
>
> Fixes: 4e3b0468e6d7 ("net: mscc: PTP Hardware Clock (PHC) support")
> Signed-off-by: Vladimir Oltean
> Reviewed-by: Horatiu Vultur
Tested-by: Alexandre Belloni
Reviewed-by: Alexandre Belloni
>
The skb should be
> added to the queue before the IRQ can fire.
>
> Fixes: 4e3b0468e6d7 ("net: mscc: PTP Hardware Clock (PHC) support")
> Signed-off-by: Vladimir Oltean
> Reviewed-by: Horatiu Vultur
Tested-by: Alexandre Belloni
Reviewed-by: Alexandre Belloni
>
The skb should be
> added to the queue before the IRQ can fire.
>
> Fixes: 4e3b0468e6d7 ("net: mscc: PTP Hardware Clock (PHC) support")
> Signed-off-by: Vladimir Oltean
> Reviewed-by: Horatiu Vultur
Tested-by: Alexandre Belloni
Reviewed-by: Alexandre Belloni
>
On 18/09/2020 18:54:42+0300, Vladimir Oltean wrote:
> On Fri, Sep 18, 2020 at 05:46:45PM +0200, Alexandre Belloni wrote:
> > On 18/09/2020 13:57:47+0300, Vladimir Oltean wrote:
> > > From: Vladimir Oltean
> > >
> > > Some definitions were likely copied from
>
On 18/09/2020 21:59:50+0300, Vladimir Oltean wrote:
> On Fri, Sep 18, 2020 at 07:37:19PM +0200, Alexandre Belloni wrote:
> > On 18/09/2020 18:54:42+0300, Vladimir Oltean wrote:
> > > On Fri, Sep 18, 2020 at 05:46:45PM +0200, Alexandre Belloni wrote:
> > > > On 18/0
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