On 27/05/2019 16.20, Vivien Didelot wrote:
> Hi Rasmus,
>
>>
>> Based on the very systematic description [ieee tags 7 and 6 are mapped
>> to 3, 5 and 4 to 2, 3 and 2 to 1, and 1 and 0 to 0], I strongly believe
>> that 0xfa50 is also the reset value for the 6085, so this is most likely
>> wrong for
Hi Rasmus,
On Mon, 27 May 2019 13:02:04 +, Rasmus Villemoes
wrote:
> > On Mon, 27 May 2019 09:36:13 +, Rasmus Villemoes
> > wrote:
> >> Looking through the data sheets comparing the mv88e6240 and 6250, I
> >> noticed that they have the exact same description of the G1_IEEE_PRI
> >> reg
On 27/05/2019 14.32, Vivien Didelot wrote:
> Hi Rasmus,
>
> On Mon, 27 May 2019 09:36:13 +, Rasmus Villemoes
> wrote:
>> Looking through the data sheets comparing the mv88e6240 and 6250, I
>> noticed that they have the exact same description of the G1_IEEE_PRI
>> register (global1, offset 0x
Hi Rasmus,
On Mon, 27 May 2019 09:36:13 +, Rasmus Villemoes
wrote:
> Looking through the data sheets comparing the mv88e6240 and 6250, I
> noticed that they have the exact same description of the G1_IEEE_PRI
> register (global1, offset 0x18). However, the current code used by 6240 does
>
>
Hi,
Looking through the data sheets comparing the mv88e6240 and 6250, I
noticed that they have the exact same description of the G1_IEEE_PRI
register (global1, offset 0x18). However, the current code used by 6240 does
int mv88e6085_g1_ieee_pri_map(struct mv88e6xxx_chip *chip)
{
/* Reset t
