On Wed, Dec 23, 2020 at 09:58:52PM +0100, Alexandre Belloni wrote:
> On 22/12/2020 15:41:41+0100, Andrew Lunn wrote:
> > > Yes the register based injection/extration is not going to be fast, but
> > > the FDMA and its driver is being sent later as separate series to keep
> > > the size of this revi
On 22/12/2020 15:41:41+0100, Andrew Lunn wrote:
> > Yes the register based injection/extration is not going to be fast, but
> > the FDMA and its driver is being sent later as separate series to keep
> > the size of this review down.
>
> FDMA?
>
> I need a bit more background here, just to make us
Hi Andrew,
On 22.12.2020 15:41, Andrew Lunn wrote:
EXTERNAL EMAIL: Do not click links or open attachments unless you know the
content is safe
On Tue, Dec 22, 2020 at 10:46:12AM +0100, Steen Hegelund wrote:
Hi Andrew,
On Sat, 2020-12-19 at 20:51 +0100, Andrew Lunn wrote:
> EXTERNAL EMAIL: Do
On Tue, Dec 22, 2020 at 10:46:12AM +0100, Steen Hegelund wrote:
> Hi Andrew,
>
> On Sat, 2020-12-19 at 20:51 +0100, Andrew Lunn wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you
> > know the content is safe
> >
> > > + /* Create a phylink for PHY management. Also h
Hi Andrew,
On Sat, 2020-12-19 at 20:51 +0100, Andrew Lunn wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
>
> > + /* Create a phylink for PHY management. Also handles SFPs */
> > + spx5_port->phylink_config.dev = &spx5_port->ndev->dev
> + /* Create a phylink for PHY management. Also handles SFPs */
> + spx5_port->phylink_config.dev = &spx5_port->ndev->dev;
> + spx5_port->phylink_config.type = PHYLINK_NETDEV;
> + spx5_port->phylink_config.pcs_poll = true;
> +
> + /* phylink needs a valid interface mode to par
This adds phylink support for ports and register base injection
and extraction.
Signed-off-by: Steen Hegelund
Signed-off-by: Bjarni Jonasson
Signed-off-by: Lars Povlsen
---
.../net/ethernet/microchip/sparx5/Makefile| 2 +-
.../ethernet/microchip/sparx5/sparx5_main.c | 68 +
.../et
