> > > +/* Serial Management Interface (SMI) uses the following frame format:
> > > + *
> > > + * preamble|start|Read/Write| PHY | REG |TA| Data bits
> > > | Idle
> > > + * |frame| OP code |address |address| |
> > > |
> > > + * read | 32x1´s | 01
On Thu, May 09, 2019 at 04:29:25PM +0200, Andrew Lunn wrote:
> On Wed, May 08, 2019 at 11:13:28PM +0200, Michael Grzeschik wrote:
> > Some microchip phys support the Serial Management Interface Protocol
> > (SMI) for the configuration of the extended register set. We add
> > MII_ADDR_SMI0 as an ava
On Wed, May 08, 2019 at 11:13:28PM +0200, Michael Grzeschik wrote:
> Some microchip phys support the Serial Management Interface Protocol
> (SMI) for the configuration of the extended register set. We add
> MII_ADDR_SMI0 as an availabe interface to the mdiobb write and read
> functions, as this int
Some microchip phys support the Serial Management Interface Protocol
(SMI) for the configuration of the extended register set. We add
MII_ADDR_SMI0 as an availabe interface to the mdiobb write and read
functions, as this interface can be easy realized using the bitbang mdio
driver.
Signed-off-by:
