On 02/15/2017 03:08 PM, Quentin Schulz wrote:
> From: Florian Vallee
>
> According to the m_can user manual changelog the BTP register layout was
> updated with core revision 3.1.0
>
> This change is not backward-compatible and using the current driver along
> with a recent IP results in an inco
On 02/20/2017 05:37 PM, Alexandre Belloni wrote:
> On 19/02/2017 at 16:37:50 +0100, Oliver Hartkopp wrote:
>> Fortunately I was contacted by Bosch this Friday as they want to contribute
>> a driver upgrade to support IP cores up to 3.2.x.
>> Additionally their plan is to use Device Tree information
On 19/02/2017 at 16:37:50 +0100, Oliver Hartkopp wrote:
> Fortunately I was contacted by Bosch this Friday as they want to contribute
> a driver upgrade to support IP cores up to 3.2.x.
> Additionally their plan is to use Device Tree information to determine the
> IP core revision - or at least to
Hi all,
On 02/15/2017 03:08 PM, Quentin Schulz wrote:
From: Florian Vallee
According to the m_can user manual changelog the BTP register layout was
updated with core revision 3.1.0
This change is not backward-compatible and using the current driver along
with a recent IP results in an incorre
From: Florian Vallee
According to the m_can user manual changelog the BTP register layout was
updated with core revision 3.1.0
This change is not backward-compatible and using the current driver along
with a recent IP results in an incorrect bitrate on the wire.
Tested with a SAMA5D2 SoC (CREL
