From:
Date: Fri, 1 May 2020 23:35:35 -0400
> From: Vincent Cheng
>
> This series adds adjust phase to the PTP Hardware Clock device interface.
>
> Some PTP hardware clocks have a write phase mode that has
> a built-in hardware filtering capability. The write phase mode
> utilizes a phase offs
From: Vincent Cheng
This series adds adjust phase to the PTP Hardware Clock device interface.
Some PTP hardware clocks have a write phase mode that has
a built-in hardware filtering capability. The write phase mode
utilizes a phase offset control word instead of a frequency offset
control word
