From: <vincent.cheng...@renesas.com> Date: Fri, 1 May 2020 23:35:35 -0400
> From: Vincent Cheng <vincent.cheng...@renesas.com> > > This series adds adjust phase to the PTP Hardware Clock device interface. > > Some PTP hardware clocks have a write phase mode that has > a built-in hardware filtering capability. The write phase mode > utilizes a phase offset control word instead of a frequency offset > control word. Add adjust phase function to take advantage of this > capability. > > Changes since v1: > - As suggested by Richard Cochran: > 1. ops->adjphase is new so need to check for non-null function pointer. > 2. Kernel coding style uses lower_case_underscores. > 3. Use existing PTP clock API for delayed worker. Series applied.
