On Thu, Dec 20, 2018 at 12:11:50PM +0100, Steen Hegelund wrote:
> The 12/20/2018 11:31, Andrew Lunn wrote:
> > On Thu, Dec 20, 2018 at 10:08:16AM +0100, Steen Hegelund wrote:
> > > When doing indirect access in the Ocelot chip, a command is setup,
> > > issued and then we need to poll until the res
The 12/20/2018 11:31, Andrew Lunn wrote:
> On Thu, Dec 20, 2018 at 10:08:16AM +0100, Steen Hegelund wrote:
> > When doing indirect access in the Ocelot chip, a command is setup,
> > issued and then we need to poll until the result is ready. The polling
> > timeout is specified in milliseconds in th
On Thu, Dec 20, 2018 at 10:08:16AM +0100, Steen Hegelund wrote:
> When doing indirect access in the Ocelot chip, a command is setup,
> issued and then we need to poll until the result is ready. The polling
> timeout is specified in milliseconds in the datasheet and not in
> register access attempts
On 20/12/2018 10:08:16+0100, Steen Hegelund wrote:
> When doing indirect access in the Ocelot chip, a command is setup,
> issued and then we need to poll until the result is ready. The polling
> timeout is specified in milliseconds in the datasheet and not in
> register access attempts.
>
> Signed
When doing indirect access in the Ocelot chip, a command is setup,
issued and then we need to poll until the result is ready. The polling
timeout is specified in milliseconds in the datasheet and not in
register access attempts.
Signed-off-by: Steen Hegelund
---
drivers/net/ethernet/mscc/ocelot.