n't properly start a renegotiation when soft-reset.
-* Explicitly requesting a renegotiation fixes this.
-*/
- if (tp->phydev->autoneg == AUTONEG_ENABLE)
- phy_restart_aneg(tp->phydev);
}
static void rtl_rar_set(struct rtl8169_private *tp,
On 21/03/2019 2:16 pm, liweihang wrote:
On 3/19/2019 7:34 PM, liweihang wrote:
Hi all,
I've met a similar issue and sent an email to discuss about it before:
Question about setting speed and duplex failed after
auto-negotiation disabled on marvell phy
d6ab93364734 net: phy: marvell: Avoid u
On 20/03/2019 2:39 pm, Heiner Kallweit wrote:
On 20.03.2019 06:16, Phil Reid wrote:
On 20/03/2019 11:37 am, Florian Fainelli wrote:
On 3/19/2019 7:34 PM, liweihang wrote:
Hi all,
I've met a similar issue and sent an email to discuss about it before:
Question about setting speed and d
On 20/03/2019 11:37 am, Florian Fainelli wrote:
On 3/19/2019 7:34 PM, liweihang wrote:
Hi all,
I've met a similar issue and sent an email to discuss about it before:
Question about setting speed and duplex failed after auto-negotiation disabled
on marvell phy
d6ab93364734 net: phy: marvell:
On 20/03/2019 12:53 am, Florian Fainelli wrote:
On 3/18/19 6:32 PM, Phil Reid wrote:
On 19/03/2019 1:09 am, Florian Fainelli wrote:
On 3/17/19 7:11 PM, Phil Reid wrote:
On 16/03/2019 5:58 am, Florian Fainelli wrote:
On 3/15/19 1:52 AM, Phil Reid wrote:
G'day All,
I've just u
On 19/03/2019 1:09 am, Florian Fainelli wrote:
On 3/17/19 7:11 PM, Phil Reid wrote:
On 16/03/2019 5:58 am, Florian Fainelli wrote:
On 3/15/19 1:52 AM, Phil Reid wrote:
G'day All,
I've just update from kernel 4.19 to 5.0 on a custom board that has a
marvell
dsa mv88e6085 and the
On 16/03/2019 5:58 am, Florian Fainelli wrote:
On 3/15/19 1:52 AM, Phil Reid wrote:
G'day All,
I've just update from kernel 4.19 to 5.0 on a custom board that has a
marvell
dsa mv88e6085 and the phy on the mv88e6085 will only connect at 10Mb/s with
the above mentioned patch applied.
G'day All,
I've just update from kernel 4.19 to 5.0 on a custom board that has a marvell
dsa mv88e6085 and the phy on the mv88e6085 will only connect at 10Mb/s with
the above mentioned patch applied.
Bisecting the issue lead me to the following patch.
d6ab93364734bd (net: phy: marvell: Avoid un
value_cansleep(gpio, 1);
+ msleep(20);
dev->current_page = 0xff;
}
FWIW:
Reviewed-by: Phil Reid
50);
+ msleep(50);
gpio_set_value(gpio, 1);
- mdelay(20);
+ msleep(20);
dev->current_page = 0xff;
}
Would that also imply gpio_set_value could be gpio_set_value_cansleep?
--
Regards
Phil Reid
devm_gpiod_get_optional() can return an error in addition to a NULL ptr.
Check for error and propagate that to the probe function. Check return
value in probe. This will now handle EPROBE_DEFER for the reset gpio.
Signed-off-by: Phil Reid
---
drivers/net/dsa/lan9303-core.c | 14
Errors need to be prograted back from probe.
Note: I have only compile tested the code as I don't have the hardware.
Egil Hjelmeland has tested it but I haven't
added at Test-by: wasn't in the standard form. Not sure if that's ok or
not.
Changes from v1:
- rebased on net
lan9303_handle_reset never returns anything other than success.
So there's not need for it to return an error code.
Signed-off-by: Phil Reid
---
drivers/net/dsa/lan9303-core.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/net/dsa/lan9303-core.c b/dr
On 7/01/2018 00:54, Egil Hjelmeland wrote:
Den 13. nov. 2017 09:07, skrev Phil Reid:
Replaces Pan Bian patch
"net: dsa: lan9303: correctly check return value of devm_gpiod_get_optional"
Errors need to be prograted back from probe.
Note: I have only compile tested the code as I don&
devm_gpiod_get_optional() can return an error in addition to a NULL ptr.
Check for error and propagate that to the probe function. Check return
value in probe. This will now handle EPROBE_DEFER for the reset gpio.
Signed-off-by: Phil Reid
---
drivers/net/dsa/lan9303-core.c | 13 ++---
1
Replaces Pan Bian patch
"net: dsa: lan9303: correctly check return value of devm_gpiod_get_optional"
Errors need to be prograted back from probe.
Note: I have only compile tested the code as I don't have the hardware.
Phil Reid (2):
net: dsa: lan9303: make lan9303_handle
lan9303_handle_reset never returns anything other than success.
So there's not need for it to return an error code.
Signed-off-by: Phil Reid
---
drivers/net/dsa/lan9303-core.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/net/dsa/lan9303-core.c b/dr
ecks lan9303_handle_reset() return value.
Probably should be checking lan9303_probe_reset_gpio() instead.
--
Regards
Phil Reid
4e02691cf87736bd0824fd37ec02e65
stmmac: move stmmac_clk, pclk, clk_ptp_ref and stmmac_rst to platform structure
--
Regards
Phil Reid
G'day Joao,
On 23/12/2016 01:06, Joao Pinto wrote:
Às 4:57 PM de 12/22/2016, Phil Reid escreveu:
On 22/12/2016 23:47, Joao Pinto wrote:
Hello Phil,
Às 3:42 PM de 12/22/2016, Phil Reid escreveu:
G'day Joao,
On 22/12/2016 20:38, Joao Pinto wrote:
When testing stmmac with my QoS
On 22/12/2016 23:47, Joao Pinto wrote:
Hello Phil,
Às 3:42 PM de 12/22/2016, Phil Reid escreveu:
G'day Joao,
On 22/12/2016 20:38, Joao Pinto wrote:
When testing stmmac with my QoS reference design I checked a problem in the
CSR clock configuration that was impossibilitating th
r_mask)
- << priv->hw->mii.clk_csr_shift);
+ value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift)
+ & priv->hw->mii.clk_csr_mask;
if (priv->plat->has_gmac4)
value |= MII_GMAC4_WRITE;
--
Regards
Phil Reid
. even if I don't know if it
makes sense).
I don't know if others have already made such an adaptation layer
between GMII to RGMII but I'm pretty sure it can't be inserted into the
macb driver.
Bye,
This sounds very similar to the altera emac-splitter.
See stmmac driver for how they handled this.
--
Regards
Phil Reid
the FPGA and also connects
the PTP pps and ext trig signals to the stmmac PTP hardware.
Patch proposed by Phil Collins.
Signed-off-by: Phil Reid
---
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers
Enable PTP FPGA clock, pps and ext trig connections to stmmac.
Note: This hardware configuration is not offically support by Altera.
Phil Reid (1):
net: stmmac: socfgpa: Ensure emac bit set in System Manger for PTP
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c | 16 +---
1
On 16/03/2016 5:36 PM, Giuseppe CAVALLARO wrote:
On 3/15/2016 8:34 AM, Phil Reid wrote:
If a dt mdio entry has been added least assume that we wont
search for phys attached. The DT and of_mdiobus_register already do
this. This stops DSA phys being found and phys created for them, as
this is
If a dt mdio entry has been added least assume that we wont
search for phys attached. The DT and of_mdiobus_register already do
this. This stops DSA phys being found and phys created for them, as
this is handled by the DSA driver.
Signed-off-by: Phil Reid
---
drivers/net/ethernet/stmicro/stmmac
e should be included
in the conditional here. But it looks like if a phy-handle is used
then we don't want to search for phys.
Phil Reid (1):
net: stmmac: Don't search for phys if mdio node is defined.
drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c | 4
1 file changed, 4 insertions(+)
--
1.8.3.1
G'day Giuseppe,
On 11/03/2016 11:32 PM, Giuseppe CAVALLARO wrote:
On 3/11/2016 4:14 PM, Phil Reid wrote:
G'day Giuseppe,
I wont be able to test until Monday.
Concept looks ok to me except for comment below.
On 11/03/2016 9:33 PM, Giuseppe Cavallaro wrote:
Initially the phy_bu
andez
Cc: Dinh Nguyen
Cc: David S. Miller
Cc: Phil Reid
---
V2: use is_pseudo_fixed_link
V3: parse device-tree driver parameters to allocate PHY resources considering
DSA case (+ fixed-link).
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 11 +--
drivers/net/ethernet/stmicro/s
-depth", &plat->tx_fifo_size);
of_property_read_u32(np, "rx-fifo-depth", &plat->rx_fifo_size);
diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
index eead8ab..1b4884c 100644
--- a/include/linux/stmmac.h
+++ b/include/linux/stmmac.h
@@ -94,7 +94,6 @@ struct stmmac_dma_cfg {
};
struct plat_stmmacenet_data {
- char *phy_bus_name;
int bus_id;
int phy_addr;
int interface;
--
Regards
Phil Reid
Provides an options to use the ptp clock routed from the Altera FPGA
fabric. Instead of the defalt eosc1 clock connected to the ARM HPS core.
This setting affects all emacs in the core as the ptp clock is common.
Acked-by: Rob Herring
Signed-off-by: Phil Reid
---
Documentation/devicetree
.
Acked-by: Rob Herring
Signed-off-by: Phil Reid
---
Documentation/devicetree/bindings/net/stmmac.txt | 8 +++
drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c | 26 +++---
.../net/ethernet/stmicro/stmmac/stmmac_platform.c | 2 +-
3 files changed, 32 insertions(+), 4
-by: Phil Reid
---
drivers/net/ethernet/stmicro/stmmac/common.h | 2 +-
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c | 9 ++---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 19 ---
3 files changed, 15 insertions(+), 15 deletions(-)
diff --git a
ve unit address from doc example.
Phil Reid (4):
stmmac: create of compatible mdio bus for stmmac driver
stmmac: Correct documentation on stmmac clocks.
stmmac: Fix calculations for ptp counters when clock input = 50Mhz.
stmmac: socfpga: Provide dt node to config ptp clk source.
.../dev
devm_get_clk looks in clock-name property for matching clock.
the ptp_ref_clk property is ignored.
Acked-by: Rob Herring
Signed-off-by: Phil Reid
---
Documentation/devicetree/bindings/net/stmmac.txt | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a
G'day Giuseppe,
On 11/12/2015 1:16 AM, Giuseppe CAVALLARO wrote:
Hi
also pls fix this typo
stmmac: create of compatible mdio bus for stmacc driver
stmmac
Will do.
On 12/9/2015 9:39 AM, Phil
-by: Phil Reid
---
drivers/net/ethernet/stmicro/stmmac/common.h | 2 +-
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c | 9 ++---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 19 ---
3 files changed, 15 insertions(+), 15 deletions(-)
diff --git a
ve unit address from doc example.
Phil Reid (5):
stmmac: create of compatible mdio bus for stmacc driver
stmmac: Correct documentation on stmmac clocks.
stmmac: Fix calculations for ptp counters when clock input = 50Mhz.
stmmac: socfpga: Provide dt node to config ptp clk source.
.../dev
Provides an options to use the ptp clock routed from the Altera FPGA
fabric. Instead of the defalt eosc1 clock connected to the ARM HPS core.
This setting affects all emacs in the core as the ptp clock is common.
Acked-by: Rob Herring
Signed-off-by: Phil Reid
---
Documentation/devicetree
devm_get_clk looks in clock-name property for matching clock.
the ptp_ref_clk property is ignored.
Acked-by: Rob Herring
Signed-off-by: Phil Reid
---
Documentation/devicetree/bindings/net/stmmac.txt | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a
.
Acked-by: Rob Herring
Signed-off-by: Phil Reid
---
Documentation/devicetree/bindings/net/stmmac.txt | 8 ++
drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c | 31 +++---
.../net/ethernet/stmicro/stmmac/stmmac_platform.c | 2 +-
3 files changed, 31 insertions(+), 10
On 9/12/2015 10:15 AM, kbuild test robot wrote:
url:
https://github.com/0day-ci/linux/commits/Phil-Reid/stmmac-create-of-compatible-mdio-bus-for-stmacc-driver/20151209-094242
config: x86_64-randconfig-b0-12090825 (attached as .config)
reproduce:
# save the attached .config to
Provides an options to use the ptp clock routed from the Altera FPGA
fabric. Instead of the defalt eosc1 clock connected to the ARM HPS core.
This setting affects all emacs in the core as the ptp clock is common.
Signed-off-by: Phil Reid
---
Documentation/devicetree/bindings/net/socfpga
.
Acked-by: Rob Herring
Signed-off-by: Phil Reid
---
Documentation/devicetree/bindings/net/stmmac.txt | 8 +
drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c | 39 ++
.../net/ethernet/stmicro/stmmac/stmmac_platform.c | 2 +-
3 files changed, 34 insertions(+), 15
-by: Phil Reid
---
drivers/net/ethernet/stmicro/stmmac/common.h | 2 +-
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c | 9 ++---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 19 ---
3 files changed, 15 insertions(+), 15 deletions(-)
diff --git a
devm_get_clk looks in clock-name property for matching clock.
the ptp_ref_clk property is ignored.
Acked-by: Rob Herring
Signed-off-by: Phil Reid
---
Documentation/devicetree/bindings/net/stmmac.txt | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a
ing, spaces & lines > 80 chars. Using checkpatch
- Drop PTP register debugfs patch.
Changes from V1:
- Fixed mismatch doc / code for ptp_ref_clk dt node.
- Remove unit address from doc example.
Phil Reid (5):
stmmac: create of compatible mdio bus for stmacc driver
stmmac: Correct docume
.
Acked-by: Rob Herring
Signed-off-by: Phil Reid
---
Documentation/devicetree/bindings/net/stmmac.txt | 8 ++
drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c | 32 --
.../net/ethernet/stmicro/stmmac/stmmac_platform.c | 2 +-
3 files changed, 33 insertions(+), 9
devm_get_clk looks in clock-name property for matching clock.
the ptp_ref_clk property is ignored.
Acked-by: Rob Herring
Signed-off-by: Phil Reid
---
Documentation/devicetree/bindings/net/stmmac.txt | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a
ice tree setting to config
ptp clk source on socfpga platforms.
Changes from V2:
- Formatting, spaces & lines > 80 chars. Using checkpatch
- Drop PTP register debugfs patch.
Changes from V1:
- Fixed mismatch doc / code for ptp_ref_clk dt node.
- Remove unit address from doc example.
Ph
-by: Phil Reid
---
drivers/net/ethernet/stmicro/stmmac/common.h | 2 +-
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c | 9 ++---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 19 ---
3 files changed, 15 insertions(+), 15 deletions(-)
diff --git a
Provides an options to use the ptp clock routed from the Altera FPGA
fabric. Instead of the defalt eosc1 clock connected to the ARM HPS core.
This setting affects all emacs in the core as the ptp clock is common.
Signed-off-by: Phil Reid
---
Documentation/devicetree/bindings/net/socfpga
On 7/12/2015 5:03 PM, Arnd Bergmann wrote:
On Monday 07 December 2015 09:38:43 Phil Reid wrote:
This adds a debugfs entry to view the current status of the ptp
registers.
Signed-off-by: Phil Reid
Your description should explain what this is good for. Why do you
need to look at this through
On 7/12/2015 5:05 PM, Arnd Bergmann wrote:
On Monday 07 December 2015 09:38:44 Phil Reid wrote:
Signed-off-by: Phil Reid
---
Documentation/devicetree/bindings/net/socfpga-dwmac.txt | 2 ++
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c | 9 +
2 files changed, 11 insertions
On 7/12/2015 7:59 PM, Sergei Shtylyov wrote:
On 12/07/2015 04:38 AM, Phil Reid wrote:
+if(dwmac->f2h_ptp_ref_clk)
Please run your patches thru scripts/checkpatch.pl (space needed after
*if*).
[...]
MBR, Sergei
Will do.
--
Regards
Phil Reid
--
To unsubscribe from this l
.
Acked-by: Rob Herring
Signed-off-by: Phil Reid
---
Documentation/devicetree/bindings/net/stmmac.txt | 10 ++-
drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c | 32 --
.../net/ethernet/stmicro/stmmac/stmmac_platform.c | 2 +-
3 files changed, 34 insertions(+), 10
-by: Phil Reid
---
drivers/net/ethernet/stmicro/stmmac/common.h | 2 +-
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c | 8 +---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 18 +++---
3 files changed, 13 insertions(+), 15 deletions(-)
diff --git a
Signed-off-by: Phil Reid
---
Documentation/devicetree/bindings/net/socfpga-dwmac.txt | 2 ++
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c | 10 ++
2 files changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
b/Documentation
devm_get_clk looks in clock-name property for matching clock.
the ptp_ref_clk property is ignored.
Acked-by: Rob Herring
Signed-off-by: Phil Reid
---
Documentation/devicetree/bindings/net/stmmac.txt | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a
This adds a debugfs entry to view the current status of the ptp
registers.
Signed-off-by: Phil Reid
---
drivers/net/ethernet/stmicro/stmmac/stmmac.h | 1 +
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 61 +++
drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h
Signed-off-by: Phil Reid
---
Documentation/devicetree/bindings/net/socfpga-dwmac.txt | 2 ++
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c | 9 +
2 files changed, 11 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
b/Documentation/devicetree
ice tree setting to config
ptp clk source on socfpga platforms.
Changes from V1:
- Fixed mismatch doc / code for ptp_ref_clk dt node.
- Remove unit address from doc example.
Phil Reid (5):
stmmac: create of compatible mdio bus for stmacc driver
stmmac: Correct documentation on stmmac clo
This adds a debugfs entry to view the current status of the ptp
registers.
Signed-off-by: Phil Reid
---
drivers/net/ethernet/stmicro/stmmac/stmmac.h | 1 +
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 61 +++
drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h
-by: Phil Reid
---
drivers/net/ethernet/stmicro/stmmac/common.h | 2 +-
drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c | 8 +---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 18 +++---
3 files changed, 13 insertions(+), 15 deletions(-)
diff --git a
Signed-off-by: Phil Reid
---
Documentation/devicetree/bindings/net/socfpga-dwmac.txt | 2 ++
drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c | 10 ++
2 files changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/socfpga-dwmac.txt
b/Documentation
.
Signed-off-by: Phil Reid
---
Documentation/devicetree/bindings/net/stmmac.txt | 10 ++-
drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c | 32 --
.../net/ethernet/stmicro/stmmac/stmmac_platform.c | 2 +-
3 files changed, 34 insertions(+), 10 deletions(-)
diff --git a
ice tree setting to config
ptp clk source on socfpga platforms.
Phil Reid (5):
stmmac: create of compatible mdio bus for stmacc driver
stmmac: Correct documentation on stmmac clocks.
stmmac: Fix calculations for ptp counters when clock input = 50Mhz.
stmmac: Add ptp debugfs entry.
stm
devm_get_clk looks in clock-name property for matching clock.
the ptp_ref_clk property is ignored.
Signed-off-by: Phil Reid
---
Documentation/devicetree/bindings/net/stmmac.txt | 17 -
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/Documentation/devicetree
her than that the concept looks good and something I has been
>> looking at adding.
>
> Please feel free to test it on your hardware and send a Tested-by :-)
Worked as expected on my hardware, can see the line toggle, chip is configured
correctly.
Tested-by: Phil Reid
>
>>
g the
module to place the device in reset and would save power.
Reloading would reinitialise the port.
--
Regards
Phil Reid
ElectroMagnetic Imaging Technology Pty Ltd
Development of Geophysical Instrumentation & Software
www.electromag.com.au
3 The Avenue, Midland WA 6056, AUSTRALIA
P
Phil Reid (1):
stmmac: Correctly report PTP capabilities.
drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
--
1.8.3.1
--
To unsubscribe from this list: send the line "unsubscribe netdev" in
the body of a message
priv->hwts_*_en indicate if timestamping is enabled/disabled at run
time. But priv->dma_cap.time_stamp and priv->dma_cap.atime_stamp
indicates HW is support for PTPv1/PTPv2.
Signed-off-by: Phil Reid
---
drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c | 7 +--
1 file c
ies. Which would be
(priv->dma_cap.time_stamp || priv->dma_cap.atime_stamp)
Does this seem reasonable?
--
Regards
Phil Reid
--
To unsubscribe from this list: send the line "unsubscribe netdev" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
G'day All,
Prior to submitting a patch I'd just like to get an idea on what the
correct way is to create and register an mdio bus for use by the marvell
dsa driver.
On our system the cpu ethernet port is connected directly to a switch
with a fixed link (1Gbit).
So the driver needs to create an
75 matches
Mail list logo
