On 02/04/2021 at 14:42, Claudiu Beznea wrote:
Restore CMP screener registers on resume path.
Fixes: c1e85c6ce57ef ("net: macb: save/restore the remaining registers and
features")
Signed-off-by: Claudiu Beznea
Acked-by: Nicolas Ferre
Thanks for this fix Claudiu. Best regards,
and hide it for -EPROBE_DEFER.
Signed-off-by: Michael Tretter
Looks good to me:
Acked-by: Nicolas Ferre
Thanks Michael, regards,
Nicolas
---
drivers/net/ethernet/cadence/macb_main.c | 20 +---
1 file changed, 9 insertions(+), 11 deletions(-)
diff --git a/drivers/net
c63861db7 ("net: macb: Add default usrio config to default gem
config")
Signed-off-by: Atish Patra
Indeed.
Acked-by: Nicolas Ferre
Thanks! Best regards,
Nicolas
---
Changes from v1->v2:
1. Fixed that fixes tag.
---
drivers/net/ethernet/cadence/macb_main.c | 1 +
1 file c
ilure
dt-bindings: add documentation for sama7g5 ethernet interface
dt-bindings: add documentation for sama7g5 gigabit ethernet interface
net: macb: add support for sama7g5 gem interface
net: macb: add support for sama7g5 emac interface
For the whole series:
Acked-by: Nicolas Ferre
--
drivers/net/ethernet/agere/Kconfig | 1 +
drivers/net/ethernet/cadence/Kconfig| 1 +
For Cadence macb driver:
Acked-by: Nicolas Ferre
drivers/net/ethernet/faraday/Kconfig| 1 +
drivers/net/ethernet/freescale/Kconfig | 1 +
drivers/net/ethernet/free
On 05/11/2020 at 18:58, Parshuram Thombare wrote:
This patch fixes NULL pointer dereference due to NULL pcs_config
in pcs_ops.
Reported-by: Nicolas Ferre
Link:
https://lore.kernel.org/netdev/2db854c7-9ffb-328a-f346-f68982723...@microchip.com/
Signed-off-by: Parshuram Thombare
Acked-by
On 05/11/2020 at 16:48, Russell King - ARM Linux admin wrote:
On Thu, Nov 05, 2020 at 04:22:18PM +0100, Nicolas Ferre wrote:
On 05/11/2020 at 15:37, Parshuram Thombare wrote:
This patch fixes NULL pointer dereference due to NULL pcs_config
in pcs_ops.
Fixes: e4e143e26ce8 ("net: macb
not refer to it like this.
Reported-by: Nicolas Ferre
Link: https://lkml.org/lkml/2020/11/4/482
You might need to change this to a "lore" link:
https://lore.kernel.org/netdev/2db854c7-9ffb-328a-f346-f68982723...@microchip.com/
Signed-off-by: Parshuram Thombare
This fix looks a bi
On 05/09/2020 at 10:21, Parshuram Thombare wrote:
PAE bit of NCFGR register, when set, pauses transmission
if a non-zero 802.3 classic pause frame is received.
Fixes: 7897b071ac3b ("net: macb: convert to phylink")
Signed-off-by: Parshuram Thombare
For the record:
Acked-by: Nic
K and serve the same content:
Replace HTTP with HTTPS.
Signed-off-by: Alexander A. Klimov
The links go to Cadence. If people from Cadence want to change
something, don't hesitate to speak out. On my side:
Acked-by: Nicolas Ferre
---
Continuing my work started at 93431e060
hweight32() to count set bits in queue_mask
net: macb: do not initialize queue variable
net: macb: remove is_udp variable
drivers/net/ethernet/cadence/macb_main.c | 19 +--
1 file changed, 5 insertions(+), 14 deletions(-)
You can add my:
Acked-by: Nicolas Ferre
For the whole
diu Beznea
Acked-by: Nicolas Ferre
Thanks Claudiu.
Regards,
Nicolas
---
Changes in v2:
- corrected fixes SHA1
drivers/net/ethernet/cadence/macb_main.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb_main.c
b/drivers/net/ethern
It must be:
Fixes: 7897b071ac3b ("net: macb: convert to phylink")
--
Nicolas Ferre
return -EINVAL;
+ }
+
Otherwise, it looks good to me after reading the associated discussion
link in your commit message: thanks for that!
Acked-by: Nicolas Ferre
if (dn)
ret = phylink_of_phy_connect(bp->phylink, dn, 0);
--
2.20.1
--
Nicolas Ferre
On 07/05/2020 at 12:03, Nicolas Ferre wrote:
On 06/05/2020 at 22:18, Jakub Kicinski wrote:
EXTERNAL EMAIL: Do not click links or open attachments unless you know the
content is safe
On Wed, 6 May 2020 13:37:37 +0200 nicolas.fe...@microchip.com wrote:
From: Nicolas Ferre
Use the proper
Russell,
Thanks for the feedback.
On 13/05/2020 at 15:05, Russell King - ARM Linux admin wrote:
On Wed, May 06, 2020 at 01:37:39PM +0200, nicolas.fe...@microchip.com wrote:
From: Nicolas Ferre
Keep previous function goals and integrate phylink actions to them.
phylink_ethtool_get_wol() is
On 06/05/2020 at 22:18, Jakub Kicinski wrote:
EXTERNAL EMAIL: Do not click links or open attachments unless you know the
content is safe
On Wed, 6 May 2020 13:37:37 +0200 nicolas.fe...@microchip.com wrote:
From: Nicolas Ferre
Use the proper struct device pointer to check if the wakeup flag
remap_resource(pdev, 1);
if (!mgmt->reg)
Is your test valid then?
Please use:
if (IS_ERR(base))
return PTR_ERR(base);
As advised by:
lib/devres.c:156
Regards,
Nicolas
return -ENOMEM;
--
2.25.0
--
Nicolas Ferre
vice *pdev)
if (!res)
return -ENODEV;
- mgmt->reg = ioremap(res->start, resource_size(res));
+ mgmt->reg = devm_ioremap(&pdev->dev, res->start, resource_size(res));
if (!mgmt->reg)
return -ENOMEM;
--
Nicolas Ferre
This removes a line left while adding the correct compatibility string for
sama5d3 10/100 interface. Now use the "atmel,sama5d3-macb" string.
Signed-off-by: Nicolas Ferre
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/net/macb.txt | 3 +--
1 file changed, 1 inser
Add a new compatibility string for this product. It's using
at91sam9260-macb layout but has a newer hardware revision: it's safer
to use its own string.
Signed-off-by: Nicolas Ferre
---
v2: applies on top of next-20190206
drivers/net/ethernet/cadence/macb_main.c | 1 +
1 file
Add the compatibility sting documentation for sam9x60 10/100 interface.
Signed-off-by: Nicolas Ferre
---
Hi Rob,
Your tag is missing for this patch.
Documentation/devicetree/bindings/net/macb.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/net
Add this SFR compatible definition for the sam9x60 SoC. Will be needed
in OHCI driver: ohci-at91.c.
Signed-off-by: Nicolas Ferre
---
Documentation/devicetree/bindings/arm/atmel-sysregs.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/atmel
:
sounds okay to everyone? If okay, I'm ready to collect Ack tags...
For the first batch, I send the whole series to everyone. I'll try my best to
reduce subsequent message deliveries if one part of the serries needs rework.
Best regards,
Nicolas
Nicolas Ferre (8):
dt-bindings:
Add this missing compatibility string to the Reset Controller
compatible string chip list.
Signed-off-by: Nicolas Ferre
---
Documentation/devicetree/bindings/arm/atmel-sysregs.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/atmel
Add this SFR compatible definition for the sam9x60 SoC and manage
its use in ohci-at91.c driver.
Signed-off-by: Nicolas Ferre
---
drivers/usb/host/ohci-at91.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
Update the Reset Controller's binding to add new SoC compatibility string.
Signed-off-by: Nicolas Ferre
---
Documentation/devicetree/bindings/arm/atmel-sysregs.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt
b/Document
Add the compatibility sting documentation for sam9x60 10/100 interface.
Signed-off-by: Nicolas Ferre
---
Documentation/devicetree/bindings/net/macb.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/net/macb.txt
b/Documentation/devicetree/bindings/net
Add support for additional reset causes and the proper compatibility
string for sam9x60 SoC. The restart function is the same as the samx7.
Signed-off-by: Nicolas Ferre
---
drivers/power/reset/at91-reset.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/power/reset
Add a new compatibility string for this product. It's using
at91sam9260-macb layout but has a newer hardware revision: it's safer
to use its own string.
Signed-off-by: Nicolas Ferre
---
drivers/net/ethernet/cadence/macb_main.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/d
This removes a line left while adding the correct compatibility string for
sama5d3 10/100 interface. Now use the "atmel,sama5d3-macb" string.
Signed-off-by: Nicolas Ferre
---
Documentation/devicetree/bindings/net/macb.txt | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
di
dev->hw_features |= NETIF_F_RXCSUM;
+ }
if (bp->caps & MACB_CAPS_SG_DISABLED)
dev->hw_features &= ~NETIF_F_SG;
dev->features = dev->hw_features;
--
Nicolas Ferre
fig = {
- .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_NO_GIGABIT_HALF,
+ .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_NO_GIGABIT_HALF
+ | MACB_CAPS_DISABLE_TX_HW_CSUM,
.dma_burst_length = 16,
.clk_init = macb_clk_init,
.init = macb_init,
--
Nico
eird things with TX CSUM in the code
2/ the hw is unable to handle these particular cases.
Best regards,
Nicolas
```
Jennifer Dahm (1):
net/macb: Disable TX checksum offloading on all Zynq-7000
drivers/net/ethernet/cadence/macb.h | 1 +
drivers/net/ethernet/cadence/macb_main.c | 11 ---
2 files changed, 9 insertions(+), 3 deletions(-)
--
Nicolas Ferre
: Nicolas Ferre
---
drivers/net/ethernet/cadence/macb_main.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb_main.c
b/drivers/net/ethernet/cadence/macb_main.c
index e84afcf..eabe14f 100644
--- a/drivers/net/ethernet/cadence
ff-by: Julia Cartwright
> ---
> This is an additional cleanup patch found when looking at this code.
>
>Julia
Acked-by: Nicolas Ferre
Thanks
>
> drivers/net/ethernet/cadence/macb_main.c | 34
>
> 1 file changed, 13 insertions(+)
nerated patch fixes the problem, the right
> solution is to obviate the problem altogether.
>
> Thanks,
>The Other Julia
Julia,
Thanks for your patch, it seems good indeed. Here is my:
Acked-by: Nicolas Ferre
As the patch by Julia L. is already in net-next, I suspect that you
would ne
On 08/11/2017 at 09:56, Michael Grzeschik wrote:
> We add the call of_node_put(bp->phy_node) to all associated error
> paths for memory clean up.
>
> Signed-off-by: Michael Grzeschik
Acked-by: Nicolas Ferre
> ---
> v2: removed extra of_node_put from macb_remove
>
On 08/11/2017 at 09:56, Michael Grzeschik wrote:
> We add the call of_phy_deregister_fixed_link to all associated
> error paths for memory clean up.
>
> Signed-off-by: Michael Grzeschik
Acked-by: Nicolas Ferre
> ---
> v2: removed extra parenthesis
>
> drivers/net/ethe
On 07/11/2017 at 10:59, Michael Grzeschik wrote:
> We add the call of_node_put(bp->phy_node) to all associated error
> paths for memory clean up.
>
> Signed-off-by: Michael Grzeschik
Thanks for your quick update:
Acked-by: Nicolas Ferre
Best regards,
Nicolas
> ---
&
ect(dev->phydev);
> mdiobus_unregister(bp->mii_bus);
> + of_node_put(bp->phy_node);
Isn't this call already done some lines below, just before
"free_netdev(dev);"?
> if ((np) && (of_phy_is_fixed_link(np)))
> of_phy_deregister_fixed_link(np);
> dev->phydev = NULL;
>
Thanks for your patch.
Regards,
--
Nicolas Ferre
On 06/11/2017 at 12:10, Michael Grzeschik wrote:
> We add the call of_phy_deregister_fixed_link to all associated
> error paths for memory clean up.
>
> Signed-off-by: Michael Grzeschik
Acked-by: Nicolas Ferre
Thanks a lot for your quick answer!
Best regards,
Nicolas
> ---
lse {
> for (i = 0; i < PHY_MAX_ADDR; i++)
> @@ -3438,6 +3457,7 @@ static int macb_remove(struct platform_device *pdev)
> clk_disable_unprepare(bp->hclk);
> clk_disable_unprepare(bp->pclk);
> clk_disable_unprepare(bp->rx_clk);
> + of_node_put(bp->phy_node);
> free_netdev(dev);
> }
>
> diff --git a/drivers/net/ethernet/cadence/macb.h
> b/drivers/net/ethernet/cadence/macb.h
> index ec037b0fa2a4d..2510661102bad 100644
> --- a/drivers/net/ethernet/cadence/macb.h
> +++ b/drivers/net/ethernet/cadence/macb.h
> @@ -930,6 +930,7 @@ struct macb {
> struct macb_or_gem_ops macbgem_ops;
>
> struct mii_bus *mii_bus;
> + struct device_node *phy_node;
> int link;
> int speed;
> int duplex;
>
--
Nicolas Ferre
value greater than 1500, it threw error:
sudo ifconfig eth1 mtu 9000
SIOCSIFMTU: Invalid argument
Add this support to driver so that it works as expected and designed.
Signed-off-by: vishnuvardhan
[nicolas.fe...@microchip.com: modify slightly commit msg]
Signed-off-by: Nicolas Ferre
ead code")
>
> Signed-off-by: Colin Ian King
Acked-by: Nicolas Ferre
> ---
> drivers/net/ethernet/cadence/macb_main.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/net/ethernet/cadence/macb_main.c
> b/drivers/net/ethernet/cadence/macb_main.c
&g
> struct macb_or_gem_ops macbgem_ops;
> -
Nit: no need to remove the empty line.
> + struct device_node *phy_node;
> struct mii_bus *mii_bus;
> int link;
> int speed;
>
Thanks for your patch.
Best regards,
--
Nicolas Ferre
: macb: Added PCI wrapper for Platform Driver.")
Means 4.10+
> Signed-off-by: Alexandre Belloni
Acked-by: Nicolas Ferre
Seems a good candidate for net stable.
Bye,
> ---
> drivers/net/ethernet/cadence/macb.c | 18 ++
> 1 file changed, 10 insertions(+), 8
ch was left as a legacy, use
rtnl_link_stats64 instead
Is it still permitted to use it? Would it be to directly move to the
most up-to-date code?
Regards,
> Cc: Nicolas Ferre
> Signed-off-by: Tobias Klauser
> ---
> drivers/net/ethernet/c
et/cadence/macb.h:862:2: error: unknown type name
> 'phy_interface_t'
> phy_interface_t phy_interface;
> ^~~
>
> Add linux/phy.h to macb.h
>
> Signed-off-by: Russell King
Acked-by: Nicolas Ferre
> ---
> drivers/net/ethernet/cadence/macb.h
tive of the SoC capability
>> and whether the PTP support was adequate.
>> I think the capability approach gives better control and
>> it is not really much to add.
>>
>> Regards,
>> Harini
>>
> Yes, I'm referring to TSU bit.
> What if SoC contains multiple Cadence GEMs, some with PTP support and others
> without?
Simply define different DT compatibility strings and we're good.
> Relevant will be checking both, hardware capabilities and SoC capabilities
> from "caps" field.
>
--
Nicolas Ferre
and whether the PTP support was adequate.
> I think the capability approach gives better control and
> it is not really much to add.
Yes, absolutely. In fact we already had this discussion and decided that
this capability scheme was giving much more control at low cost.
Regards,
--
Nicolas Ferre
Le 19/01/2017 à 17:07, Nicolas Ferre a écrit :
> Le 19/01/2017 à 08:56, Andrei Pistirica a écrit :
>> This patch does the following:
>> - MACB/GEM-PTP interface
>> - registers and bitfields for TSU
>> - capability flags to enable PTP per platform basis
>>
&
Le 19/01/2017 à 08:56, Andrei Pistirica a écrit :
> This patch does the following:
> - MACB/GEM-PTP interface
> - registers and bitfields for TSU
> - capability flags to enable PTP per platform basis
>
> Signed-off-by: Andrei Pistirica
Acked-by: Nicolas Ferre
Thanks, regar
dma_burst_length;
> @@ -874,6 +941,8 @@ struct macb {
> unsigned intjumbo_max_len;
>
> u32 wol;
> +
> + struct macb_ptp_info*ptp_info; /* macb-ptp interface */
> };
>
> static inline bool macb_is_gem(struct macb *bp)
> @@ -881,4 +950,9 @@ static inline bool macb_is_gem(struct macb *bp)
> return !!(bp->caps & MACB_CAPS_MACB_IS_GEM);
> }
>
> +static inline bool gem_has_ptp(struct macb *bp)
> +{
> + return !!(bp->caps & MACB_CAPS_GEM_HAS_PTP);
> +}
> +
> #endif /* _MACB_H */
Otherwise, I'm okay with the rest.
I suggest to people that will keep the ball rolling on this topic to
take advantage of the chunks of code that Andrei developed with the help
of Richard and the best practices discussed. I think particularly, if it
makes sense with HW, about:
- gem_ptp_do_[rt]xstamp(bp, skb) dereference scheme
- gem_ptp_adjfine() rationale
- gem_get_ptp_peer() if needed
Regards,
--
Nicolas Ferre
>> On Mon, Jan 2, 2017 at 9:43 PM, Richard Cochran
>> wrote:
>>> On Mon, Jan 02, 2017 at 03:47:07PM +0100, Nicolas Ferre wrote:
>>>> Le 02/01/2017 à 12:31, Richard Cochran a écrit :
>>>>> This Cadence IP core is a complete disaster.
>>>>
>&
lready as v4 (thanks to your fruitful contributions BTW) for this
series and will try to add features for other IP options & revisions
incrementally.
I suspect that Rafal tend to jump too quickly to the latest IP revisions
and add more options to this series: let's not try to pour too much
things into this code right now.
FYI, Andrei will be back online next week.
Regards,
--
Nicolas Ferre
e the one that you
propose, with the test in it, the branch prediction can play his role
without breaking the processor pipeline as the accessors function will
be inlined by the compiler: Am I right?
So, yes, makes sense. Thanks for the hint.
Regards,
--
Nicolas Ferre
t; or "cdns,sama5d2-gem-mdio"
compatibility string.
On the other hand, if it's strictly the same, we can use the
"xlnx,zynq-gem-mdio" compatibility without any problem...
> I'll take care of the other comments in the next version.
>
> Regards,
> Harini
>
--
Nicolas Ferre
ter to use read-modify-write.
> Use the same method for clearing statistics as well.
>
> Signed-off-by: Harini Katakam
Acked-by: Nicolas Ferre
> ---
>
> v2:
> Make ctrl type as u32
> Improve commit description
>
> ---
> drivers/net/ethernet/cadence/macb.c |
t; to ensure an flip from 0 to 1 for NCR.
>
> Signed-off-by: Zumeng Chen
Acked-by: Nicolas Ferre
Thanks, best regards,
> ---
>
> V2 changes:
>
> Add the same wmb for at91ether as well based on reviewer's suggestion.
>
> Cheers,
> drivers/net/ethernet/cade
> + macb_writel(bp, NCR, ctrl);
>
> /* Clear all status flags */
> macb_writel(bp, TSR, -1);
>
--
Nicolas Ferre
exactly the same pattern in function
at91ether_interrupt() can you fix both locations in your patch please?
Thanks, best regards,
--
Nicolas Ferre
>
> Without this fix, the rx queue is not reset properly to recover from
> queue corruption and connection drop may occur.
>
> Signed-off-by: Cyrille Pitchen
> Fixes: 9ba723b081a2 ("net: macb: remove BUG_ON() and reset the queue to
> handle RX errors")
Acked-
evicetree/bindings/net/macb.txt | 1 +
> drivers/net/ethernet/cadence/macb.c| 742
> -
> drivers/net/ethernet/cadence/macb.h| 217 +++-
> 3 files changed, 950 insertions(+), 10 deletions(-)
[..]
--
Nicolas Ferre
>> To: Rafal Ozieblo
>> Cc: Nicolas Ferre; Andrei Pistirica; harini.kata...@xilinx.com;
>> netdev@vger.kernel.org; linux-ker...@vger.kernel.org
>>
Le 18/11/2016 à 09:59, Rafal Ozieblo a écrit :
> Hello,
>
>> From: Harini Katakam [mailto:harinikatakamli...@gmail.com]
>> Sent: 18 listopada 2016 05:30
>> To: Rafal Ozieblo
>> Cc: Nicolas Ferre; harini.kata...@xilinx.com; netdev@vger.kernel.org;
>> linux-k
sed on this runtime
> check.
> For this reason, all the static changes were placed under this check.
We have quite a bunch of options in this driver to determinate what is
the real capacity of the underlying hardware.
If HW configuration registers are not appropriate, and it seems they are
not, I would advice to simply use the DT compatibility string.
Best regards,
--
Nicolas Ferre
gt; µWeb: Embedded Web Framework - http://uweb.workware.net.au/
> WorkWare Systems Pty Ltd
> W: www.workware.net.au P: +61 434 921 300
> E: ste...@workware.net.au
>
>
>
>
>
>
--
Nicolas Ferre
unregister_netdev
> will end up calling macb_close.
>
> Signed-off-by: Xander Huff
> Signed-off-by: Nathan Sullivan
> Signed-off-by: Brad Mouring
Acked-by: Nicolas Ferre
> ---
> drivers/net/ethernet/cadence/macb.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff
ry I missed that obvious point and for
> causing any inconveniences.
>
> BTW, I see there are obviously quite a few users of MACB
> implementations. I'm just curious if anybody else ever encountered the
> checksum problem or if this a matter of Zynq implementation only.
I've just verified that we are affected by this issue as well on sama5d2
(Microchip / Atmel cortex-A5 MPUs).
Thanks for the fix,
--
Nicolas Ferre
s in NAND flash so, no NFS rootfs for me.
>> I've looked at the code and i still don't see how it gets to READY.
>> What i do see is that when you connect the phy to the MAC, the
>> interrupt handler is installed. So maybe there are some PHY interrupts
>> before the interface
; Signed-off-by: Wei Yongjun
Yes,
Acked-by: Nicolas Ferre
Thanks. Best regards,
> ---
> drivers/net/ethernet/cadence/macb.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/ethernet/cadence/macb.c
> b/drivers/net/ethernet/cadence/macb.c
acb_dma_desc) *
> TX_RING_SIZE)
>
> /* level of occupied TX descriptors under which we wake up TX process */
>
--
Nicolas Ferre
Le 15/08/2016 à 21:44, Shubhrajyoti Datta a écrit :
> Some of the platforms like zynqmp ultrascale+ has a
> separate clock gate for the rx clock. Add an optional
> rx_clk so that the clock can be enabled.
>
> Signed-off-by: Shubhrajyoti Datta
Fine with me:
Acked-by: Nicolas Ferr
some work done on his side before I recall your email.
So, could you please re-send your original 1588 patch with Andrei in
copy so that we can all (re-)start the discussion and progress for
adding this feature.
We must also note that some hardware differences between our platforms
may have an impact on the code and how we implement things (as
highlighted on this forum:
http://www.at91.com/discussions/viewtopic.php/f,12/t,25462.html).
Anyway, we'll overcome this and have a widely tested solution at the end
of the day!
Thanks for your patience, bye!
PS: for some reason, I only have this "ping" part of your email but not
the original one
--
Nicolas Ferre
0 + ((hw_q) << 2))
> +#define GEM_TBQPH(hw_q) (0x04C8)
> #define GEM_RBQP(hw_q) (0x0480 + ((hw_q) << 2))
> #define GEM_IER(hw_q)(0x0600 + ((hw_q) << 2))
> #define GEM_IDR(hw_q)(0x0620 + ((hw_q) << 2))
> @@ -249,6 +252,8 @@
> #define GEM_RXBS_SIZE8
> #define GEM_DDRP_OFFSET 24 /* disc_when_no_ahb */
> #define GEM_DDRP_SIZE1
> +#define GEM_ADDR64_OFFSET30 /* Address bus width - 64b or 32b */
> +#define GEM_ADDR64_SIZE 1
>
>
> /* Bitfields in NSR */
> @@ -474,6 +479,10 @@
> struct macb_dma_desc {
> u32 addr;
> u32 ctrl;
> +#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
> + u32 addrh;
> + u32 resvd;
> +#endif
> };
>
> /* DMA descriptor bitfields */
> @@ -777,6 +786,7 @@ struct macb_queue {
> unsigned intIDR;
> unsigned intIMR;
> unsigned intTBQP;
> + unsigned intTBQPH;
>
> unsigned inttx_head, tx_tail;
> struct macb_dma_desc*tx_ring;
>
--
Nicolas Ferre
define MACB_CAPS_GIGABIT_MODE_AVAILABLE 0x2000
> #define MACB_CAPS_SG_DISABLED0x4000
> #define MACB_CAPS_MACB_IS_GEM0x8000
> -#define MACB_CAPS_JUMBO 0x0010
Acked-by: Nicolas Ferre
Can you please send
fig check around phyprobe api in the macb driver.
> #ifdef CONFIG_XILINX_GMII2RGMII
>gmii2rgmii_phyprobe(&bp->converter_phy);
> #endif
Nope!
> 2) Select NET_VENDOR_XILINX in the macb Kconfig
> @ -22,6 +22,7 @@ config MACB
> tristate "Cadence MACB/GEM support"
> depends on HAS_DMA
> select PHYLIB
> + select NET_VENDOR_XILINX
> Please let me know which one you prefer will fix that and will post v3...
First one with my changes is the best. But maybe wait for more feedback...
Bye,
--
Nicolas Ferre
struct phy_device *gmii2rgmii_phy_dev;
> + void *platform_data;
> + int (*mdio_write)(struct mii_bus *bus, int mii_id, int reg,
> + u16 val);
> + void (*fix_mac_speed)(struct gmii2rgmii *xphy, unsigned int speed);
> +};
> +
> +extern int gmii2rgmii_phyprobe(struct gmii2rgmii *xphy);
> +#endif
I see a compilation issue here:
You should provide a way to have this function even if the
NET_VENDOR_XILINX config option is not selected (test to compile with
the sama5_defconfig and you'll see).
What about making this function void in case of !XILINX?
(so, NACK for the series as it is).
Bye,
--
Nicolas Ferre
Le 01/07/2016 11:02, Appana Durga Kedareswara Rao a écrit :
> Hi Nicolas Ferre,
>
> Thanks for the quick review...
>
>>
>> Le 01/07/2016 08:20, Kedareswara rao Appana a écrit :
>>> This patch adds support for gmii2rgmii phy converter in the macb
>
ef _MACB_H
> #define _MACB_H
>
> +#include
No, put it in the macb.c.
> +
> #define MACB_GREGS_NBR 16
> #define MACB_GREGS_VERSION 2
> #define MACB_MAX_QUEUES 8
> @@ -846,6 +848,7 @@ struct macb {
> unsigned intjumbo_max_len;
>
> u32 wol;
> + struct gmii2rgmii converter_phy;
> };
>
> static inline bool macb_is_gem(struct macb *bp)
If Florian and phy guys are okay with the approach, I'm fine with this
patch, once corrected.
Thanks, bye,
--
Nicolas Ferre
this follow-up and the advices you had given to
Alexandre during the debug session when you spotted this problem.
Acked-by: Nicolas Ferre
> ---
> Tracking down the exact commit which started doing that was a little
> difficult, so I can't really provide a proper Fixes tag yet that d
b: don't return NULL from get_phy_device()")
> Signed-off-by: Sergei Shtylyov
Acked-by: Nicolas Ferre
Thanks.
>
> ---
> The patch is against DaveM's 'net-next.git' repo.
>
> drivers/net/ethernet/cadence/macb.c |3 ++-
> 1 file changed, 2 inse
struct macb *bp)
> dev_set_drvdata(&bp->dev->dev, bp->mii_bus);
>
> np = bp->pdev->dev.of_node;
> - if (np) {
> - /* try dt phy registration */
> - err = of_mdiobus_register(bp->mii_bus, np);
> -
> - /* fallback to standard phy registration if no phy were
> - * found during dt phy registration
> - */
> - if (!err && !phy_find_first(bp->mii_bus)) {
> - for (i = 0; i < PHY_MAX_ADDR; i++) {
> - struct phy_device *phydev;
> -
> - phydev = mdiobus_scan(bp->mii_bus, i);
> - if (IS_ERR(phydev)) {
> - err = PTR_ERR(phydev);
> - break;
> - }
> - }
> -
> - if (err)
> - goto err_out_unregister_bus;
> - }
> - } else {
> - if (pdata)
> - bp->mii_bus->phy_mask = pdata->phy_mask;
> -
> - err = mdiobus_register(bp->mii_bus);
> - }
> + if (np)
> + err = macb_mii_of_init(bp, np);
> + else
> + err = macb_mii_pdata_init(bp, pdata);
>
> if (err)
> goto err_out_free_mdiobus;
I'm okay with this. Thanks for having taken the initiative to implement it.
Bye,
--
Nicolas Ferre
Le 29/04/2016 00:15, Sergei Shtylyov a écrit :
> With the 'phylib' now being aware of the "reset-gpios" PHY node property,
> there should be no need to frob the PHY reset in this driver anymore...
>
> Signed-off-by: Sergei Shtylyov
Acked-by: Nicolas Ferre
if (IS_ERR(phydev)) {
> - err = PTR_ERR(phydev);
> - break;
> - }
> - }
> -
> - if (err)
> - goto err_out_unregister_bus;
> - }
> } else {
> if (pdata)
> bp->mii_bus->phy_mask = pdata->phy_mask;
>
--
Nicolas Ferre
e and basically maintaining this DT file, I
think that I'll be informed if people try an unlikely arrangement of
patches on this board.
So either way, I'm okay. But I do think it's not worth thinking too much
about this case.
Bye,
--
Nicolas Ferre
Fix gpio active flag for the phy reset-gpios property. The line is
active low instead of active high.
Actually, this flags was never used by the macb driver.
Reported-by: Sergei Shtylyov
Cc: Andrew Lunn
Cc: David Miller
Signed-off-by: Nicolas Ferre
---
Hi,
Thanks for having reported this bug
Le 12/04/2016 15:54, Sergei Shtylyov a écrit :
> Hello.
>
> On 4/12/2016 12:22 PM, Nicolas Ferre wrote:
>
>>>> With the 'phylib' now being aware of the "reset-gpios" PHY node
>>>> property,
>>>> there should be no need to f
Le 12/04/2016 15:40, Andrew Lunn a écrit :
> On Tue, Apr 12, 2016 at 11:22:10AM +0200, Nicolas Ferre wrote:
>> Le 11/04/2016 04:28, Andrew Lunn a écrit :
>>> On Sat, Apr 09, 2016 at 01:25:03AM +0300, Sergei Shtylyov wrote:
>>>> With the 'phylib' now be
acb_reset_phy(pdev);
>
>/* IP specific init */
>
> @@ -3422,6 +3460,8 @@ static int macb_remove(struct platform_device *pdev)
>
> bp = netdev_priv(dev);
>
> if (bp->phy_dev)
>
>
ut currently works.
>
>>> You potentially need to add a new property and deprecate the old one.
>>
>>I would like to avoid that...
>
> You will need the agreement from the at91-vinco maintainer.
If the at91-vinco has to be modified, you have my agreement that it can
be modified.
Bye,
--
Nicolas Ferre
to it seems correct to me (I mean, with proper flag
specification).
> property, i.e. active low. The new code in the previous patch does
> however take the flags into account. Did you check if there are any
> device trees which have flags, which were never used, but are now
> going to be used and thus break...
Flag was used and you are saying that it's taken into account in new
code... So, what's the issue?
I see a difference in the way the "value" of gpiod_* functions is used.
There may be a misunderstanding here...
Bye,
--
Nicolas Ferre
standing for a long time
in my backlog ;-).
Acked-by: Nicolas Ferre
Bye,
> ---
> drivers/net/ethernet/cadence/macb.c | 59
> ++---
> 1 file changed, 49 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/net/ethernet/cadence/macb.c
>
nterrupt Disable Register
> IMR: Interrupt Mask Register
>
> Signed-off-by: Cyrille Pitchen
> Fixes: bfbb92c44670 ("net: macb: Handle the RXUBR interrupt on all devices")
Acked-by: Nicolas Ferre
Thanks!
> ---
> drivers/net/ethernet/cadence/macb.c | 2 +-
> 1
et in
>>>
>>> s/wouldn't/may not/, sorry. Do I need to resend?
>>
>> No need, I fixed it up by hand.
>>
>> Applied, thanks.
>
> Oops, forgot another tag:
>
> Fixes: 270c499f0993 ("net/macb: Update device tree binding for resetting PHY
> using GPIO")
>
>Too late probably... :-(
Too late also:
Acked-by: Nicolas Ferre
Thanks Sergei!
Bye,
--
Nicolas Ferre
function
comments, to do it in a separate patch (series).
> Also splitting this to more patches will be better. Just by categories
> but that's just my opinion.
Well, yes... but I won't be too picky for such a patch. So here is my:
Acked-by: Nicolas Ferre
Thank for your feedback, bye,
--
Nicolas Ferre
Le 13/03/2016 20:10, Moritz Fischer a écrit :
> checkpatch.pl gave the following error:
>
> ERROR: space required before the open parenthesis '('
> + for(; p < end; p++, offset += 4)
>
> Signed-off-by: Moritz Fischer
Acked-by: Nicolas Ferre
> ---
>
Le 13/03/2016 20:10, Moritz Fischer a écrit :
> Checkpatch suggests using ether_addr_copy over memcpy
> to copy the mac address.
>
> Signed-off-by: Moritz Fischer
Yes:
Acked-by: Nicolas Ferre
> ---
> drivers/net/ethernet/cadence/macb.c | 2 +-
> 1 file changed, 1 ins
Le 13/03/2016 20:10, Moritz Fischer a écrit :
> This commit deals with a bunch of checkpatch suggestions
> that without changing behavior make checkpatch happier.
>
> Signed-off-by: Moritz Fischer
Acked-by: Nicolas Ferre
> ---
> drivers/net/ethernet/c
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