Since my attachment was filtered out, here's the little patch in text.
Minor comment fix of src/sys/arch/amd64/include/pmap.h. :)
diff -u pmap.h pmap2.h
--- pmap.h 2007-07-09 13:14:12.0 +0300
+++ pmap2.h 2007-07-12 11:59:46.0 +0300
@@ -167,7 +167,7 @@
* the following
Minor comment fix of src/sys/arch/amd64/include/pmap.h. :)
diff -u pmap.h pmap2.h
[demime 1.01d removed an attachment of type text/x-patch which had a name of
pmap.h.diff]
Constantine Kousoulos <[EMAIL PROTECTED]> writes:
> Thank you art. You have been crystal clear.
>
> Constantine
No, thank You for making me look in this direction and finding a way to
speed up the pmap by another 10% (hacked up a diff tonight).
//art
Thank you art. You have been crystal clear.
Constantine
Constantine Kousoulos <[EMAIL PROTECTED]> writes:
> A second thing is that recursive mapping works well when we have
> 2-level page tables (as in the i386 architecture).
Try a few more levels of recursion. It works fine.
> When we have 3 or
> more page tables, the recursive mapping just points t
Artur Grabowski wrote:
Constantine Kousoulos <[EMAIL PROTECTED]> writes:
Which one level 1 ptp do we keep at the recursive area? Does OpenBSD
keep the last used level 1 ptp cached at that area? Please clarify.
Huh? That question, no parse.
The top level page table in the amd64 architecture
Constantine Kousoulos <[EMAIL PROTECTED]> writes:
> Which one level 1 ptp do we keep at the recursive area? Does OpenBSD
> keep the last used level 1 ptp cached at that area? Please clarify.
Huh? That question, no parse.
The recursive map is simply the top level page table that we enter into
its
In file src/sys/arch/amd64/include/pmap.h:
* The x86_64 pmap module closely resembles the i386 one. It uses
* the same recursive entry scheme, and the same alternate area
* trick for accessing non-current pmaps. See the i386 pmap.h
* for a description. The obvious difference is that 3 extra
Constantine Kousoulos <[EMAIL PROTECTED]> writes:
> In file src/sys/arch/amd64/include/pmap.h:
>
> 1) There are two entries named "alt.L1 table (PTE pages)" in the
> virtual address space schematic. One entry is for va
> 0x7f80 -
> 0x8000 and the other is for va 0xff80
In file src/sys/arch/amd64/include/pmap.h:
1) There are two entries named "alt.L1 table (PTE pages)" in the virtual
address space schematic. One entry is for va 0x7f80 -
0x8000 and the other is for va 0xff80 -
0x.
I think that for va 0x
10 matches
Mail list logo
