Constantine Kousoulos <[EMAIL PROTECTED]> writes: > In file src/sys/arch/amd64/include/pmap.h: > > 1) There are two entries named "alt.L1 table (PTE pages)" in the > virtual address space schematic. One entry is for va > 0x00007f8000000000 - > 0x0000800000000000 and the other is for va 0xffffff8000000000 - > 0xffffffffffffffff. > > I think that for va 0x00007f8000000000 - 0x0000800000000000 the entry > should be "L1 table (PTE pages)" and not "alt.L1 table (PTE pages)".
Yes, that's correct, I fixed the comment. > 2) There is an unutilized va hole at 0x0000800000000000 - > 0xffff800000000000. What complexity to the calculations does that hole > saves us from? Erm. that hole is there because the amd64 mmu only supports 48 bits of address space. //art