Re: [Mesa-dev] [PATCH 2/2] R600: Convert global store address to dword offset during isel

Reviewed-By: Vincent Lejeune Le jeudi 06 décembre 2012 à 14:09 -0800, Tom Stellard a écrit : > From: Tom Stellard > > --- > lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 1 + > lib/Target/AMDGPU/AMDGPUISelLowering.h | 1 + > lib/Target/AMDGPU/AMDGPUInstrInfo.td | 3

Re: [Mesa-dev] [PATCH 1/2] r600g: rework handling of the constants

Le dimanche 30 décembre 2012 à 10:29 -0500, Tom Stellard a écrit : > On Wed, Dec 26, 2012 at 05:38:27PM +0100, Vincent Lejeune wrote: > > From Vadim Girlin patch > > --- > > src/gallium/drivers/r600/r600_llvm.c | 27 +++ > > src/gallium

Re: [Mesa-dev] [PATCH 01/13] mesa : move bindbuffer{base, range} from transformfeedback.c BindBuffer* functions are part of tfb extension. They are however used by others extensions such as uniform bu

Sorry for this misformating, and thank for the tips :) Vincent Le samedi 12 novembre 2011 à 23:18 +0100, Marek Olšák a écrit : > Hi vlj, > > just one remark unrelated to the patch. > > The commit messages should start with a 76-characters-long summary, > followed by an em

Re: [Mesa-dev] [PATCH] mesa : move bindbuffer{base, range} from transformfeedback.c

Le vendredi 18 novembre 2011 à 13:40 -0700, Brian Paul a écrit : > On 11/18/2011 01:11 PM, vlj wrote: > > BindBuffer* functions are part of tfb extension. They are however > > used by others extensions such as uniform buffer object. > > This patch moves the BindBuffer* definition to to

[Mesa-dev] Common Subexpression Elimination

to follow coding style, using exec_list*, ralloced objects... The algorithm currently only spot binary expressions (that is x + y, x * y, ...) but unary expression (exp(x), ln(x)...) should follow soon. Regards, Vincent. diff --git a/src/glsl/Makefile b/src/glsl/Makefile index 68b98b2..4100414

Re: [Mesa-dev] [PATCH] gallium: Adds PIPE_SHADER_CAP_VARYINGS_PACKING_CONSTRAINTS

Le samedi 25 février 2012 à 10:26 -0500, Brian Paul a écrit : > On Fri, Feb 24, 2012 at 2:44 PM, Vincent Lejeune wrote: > > v2: remove underscore between NO and PERSPECTIVE in > > PIPE_PACKING_CONSTRAINT_SMOOTH_NO_PERSPECTIVE_MIXED > > Any particular reason why? I think

[Mesa-dev] [RFC] glsl-to-llvm

status of the recently announced llvm i965 compiler, I don't know if it has already its own glsl-to-llvm pass or not. If not, it would be really great if this pass was also shared by i965, as the more drivers use it, the more reliable it is. Regards, Vincent Lejeune __

Re: [Mesa-dev] [PATCH 4/7] radeon/llvm: use llvm fabs intrinsic

Le mardi 09 octobre 2012 à 10:49 -0400, Tom Stellard a écrit : > On Mon, Oct 08, 2012 at 04:47:10PM +0200, Vincent Lejeune wrote: > > --- > > src/gallium/drivers/radeon/AMDGPUISelLowering.cpp | 3 +-- > > src/gallium/drivers/radeon/AMDILIntrinsics.td | 1 - > >

[Mesa-dev] [PATCH] R600: Add a ldptr intrinsic to support MSAA.

--- lib/Target/R600/R600ISelLowering.cpp | 6 +- lib/Target/R600/R600Instructions.td | 4 lib/Target/R600/R600Intrinsics.td| 1 + 3 files changed, 10 insertions(+), 1 deletion(-) diff --git a/lib/Target/R600/R600ISelLowering.cpp b/lib/Target/R600/R600ISelLowering.cpp index 126db73.

[Mesa-dev] [PATCH 2/4] r600g/llvm: fix txq for texture buffer

--- src/gallium/drivers/r600/r600_llvm.c | 7 +-- src/gallium/drivers/r600/r600_shader.c | 1 + src/gallium/drivers/radeon/radeon_llvm.h | 1 + 3 files changed, 7 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c inde

[Mesa-dev] [PATCH 1/4] r600g/llvm: fix sample cube shadow

--- src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c index 8ff9abd..ac2e511 100644 --- a/src/gallium/drivers/radeon/ra

[Mesa-dev] [PATCH 3/4] r600g/llvm: Undef z and w component of 2D TXP inst

--- src/gallium/drivers/r600/r600_llvm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c index 54291a1..c700f26 100644 --- a/src/gallium/drivers/r600/r600_llvm.c +++ b/src/gallium/drivers/r600/r600_llv

[Mesa-dev] [PATCH 4/4] r600/llvm: Adds support for MSAA

--- src/gallium/drivers/r600/r600_llvm.c | 47 +++- src/gallium/drivers/r600/r600_shader.c | 1 + src/gallium/drivers/radeon/radeon_llvm.h | 1 + 3 files changed, 48 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/d

[Mesa-dev] [PATCH] radeonsi: Allow Sinking pass to move preloaded const/res/sampl

This fixes a crash in Unigine Heaven 3.0, and probably in some others apps. --- src/gallium/drivers/radeonsi/radeonsi_shader.c | 20 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/radeonsi/radeonsi_shader.c b/src/gallium/drivers/radeonsi/ra

[Mesa-dev] [PATCH] R600/SI: Add SinkingPass before ISel

--- lib/Target/R600/AMDGPUTargetMachine.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/lib/Target/R600/AMDGPUTargetMachine.cpp b/lib/Target/R600/AMDGPUTargetMachine.cpp index d77cddd..f28f27a 100644 --- a/lib/Target/R600/AMDGPUTargetMachine.cpp +++ b/lib/Target/R600/AMDGPUTargetMachine.c

[Mesa-dev] [PATCH] radeonsi: Allow Sinking pass to move preloaded const/res/sampl

This fixes a crash in Unigine Heaven 3.0, and probably in some others apps. --- src/gallium/drivers/radeonsi/radeonsi_shader.c | 27 ++ src/gallium/drivers/radeonsi/si_state.h| 1 + 2 files changed, 24 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers

Re: [Mesa-dev] PATCH: R600/SI: Enable the verifier on most lit tests

3rd patch is reviewed-by:Vincent Lejeune The first one >Subject: [PATCH 1/4] R600/SI: Mark the EXEC register as reserved > >This prevents the machine verifier from complaining about uses of >an undefined physical register. >--- > lib/Target/R600/SIRegisterInfo.cpp | 3 ++- > 1 file changed, 2 in

[Mesa-dev] [PATCH] R600/SI: Support byval arguments

--- lib/Target/R600/AMDGPUCallingConv.td | 7 ++- lib/Target/R600/SIISelLowering.cpp | 3 ++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/lib/Target/R600/AMDGPUCallingConv.td b/lib/Target/R600/AMDGPUCallingConv.td index d26be32..a194e6d 100644 --- a/lib/Target/R600/AMDGPU

[Mesa-dev] [PATCH] radeonsi: Do not set both inreg and byval

--- src/gallium/drivers/radeonsi/radeonsi_shader.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/radeonsi/radeonsi_shader.c b/src/gallium/drivers/radeonsi/radeonsi_shader.c index ab996cc..9d95997 100644 --- a/src/gallium/drivers/radeonsi/radeonsi_s

Re: [Mesa-dev] [PATCH] R600/SI: Support byval arguments

freedesktop.org/archives/mesa-dev/2013-October/046022.html fixes the situation but requires the backend to provide a way to lower byval arguments. This patch provides such support. Vincent > > De : Tom Stellard >À : Vincent Lejeune >Cc : mesa-dev@lists.

[Mesa-dev] [PATCH] radeonsi: Do not set both inreg and byval

--- src/gallium/drivers/radeonsi/radeonsi_shader.c | 9 ++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/radeonsi/radeonsi_shader.c b/src/gallium/drivers/radeonsi/radeonsi_shader.c index ab996cc..209b77e 100644 --- a/src/gallium/drivers/radeonsi/radeonsi

Re: [Mesa-dev] [PATCH] R600: Make sure OQAP defs and uses happen in the same clause

- Mail original - > De : Tom Stellard > À : llvm-comm...@cs.uiuc.edu > Cc : mesa-dev@lists.freedesktop.org; Tom Stellard > Envoyé le : Vendredi 11 octobre 2013 20h10 > Objet : [PATCH] R600: Make sure OQAP defs and uses happen in the same clause > > From: Tom Stellard > > Reading th

[Mesa-dev] [PATCH 1/2] r600/llvm: Fix texbuf for pre EG gen

--- src/gallium/drivers/r600/r600_llvm.c | 29 + 1 file changed, 29 insertions(+) diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c index 34dd3ad..d7fa5f8 100644 --- a/src/gallium/drivers/r600/r600_llvm.c +++ b/src/gallium/driver

[Mesa-dev] [PATCH 2/2] r600/llvm: Fix isampleBuffer on preEG

--- src/gallium/drivers/r600/r600_llvm.c | 15 ++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c index d7fa5f8..5afe3cb 100644 --- a/src/gallium/drivers/r600/r600_llvm.c +++ b/src/gallium/drive

Re: [Mesa-dev] [PATCH] R600: Make sure OQAP defs and uses happen in the same clause

This patch should work when checking than no OQAP is used before beeing queued, assuming that a value in OQAP is consumed and cannot be read twice. However I'm not sure I cover all LDS instructions that queues a value, I only use LDS_RET_READ in switch case. Vincent - Mail ori

[Mesa-dev] [PATCH 1/2] r600/llvm: Fix texbuf for pre EG gen

R600/R700 implementation of tex buffer fetch requires the result of the VFETCH instruction to be ANDed with R600_BUFFER_INFO_CONST_BUFFER, and the last channel to be ORed with the same const buffer. --- src/gallium/drivers/r600/r600_llvm.c | 29 + 1 file changed, 29 ins

[Mesa-dev] [PATCH 2/2] r600/llvm: Fix isampleBuffer on preEG

On R600/R700 hw the data are stored from the channel 2 of the second dword. --- src/gallium/drivers/r600/r600_llvm.c | 15 ++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c index d7fa5f8..5afe3

[Mesa-dev] [PATCH] r600/llvm: Store inputs in function arguments

--- src/gallium/drivers/r600/r600_llvm.c | 125 - src/gallium/drivers/r600/r600_shader.c | 2 + src/gallium/drivers/radeon/radeon_llvm.h | 1 + .../drivers/radeon/radeon_setup_tgsi_llvm.c| 2 +- 4 files changed, 75 insertions(+)

[Mesa-dev] [PATCH] R600: Use function inputs to represent data stored in gpr

--- lib/Target/R600/AMDGPUCallingConv.td| 15 - lib/Target/R600/R600ISelLowering.cpp| 55 ++-- lib/Target/R600/R600Instructions.td | 2 +- lib/Target/R600/R600Intrinsics.td | 8 ++- test/CodeGen/R600/big_alu.ll

Re: [Mesa-dev] [PATCH] R600: Make sure OQAP defs and uses happen in the same clause

I have put some comments below but otherwise the patch is reviewed-by: Vincent Lejeune >-- next part -- >>From 2eb4673e3184af0e077cbe30a594602441e8d98e Mon Sep 17 00:00:00 2001 >From: >>Tom Stellard >Date: Thu, 5 Sep 2013 08:59:32 -0700 >Su

[Mesa-dev] [PATCH] r600/llvm: Store inputs in function arguments

--- src/gallium/drivers/r600/r600_llvm.c | 119 +++ src/gallium/drivers/r600/r600_shader.c | 1 + src/gallium/drivers/radeon/radeon_llvm.h | 1 + 3 files changed, 121 insertions(+) diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/

Re: [Mesa-dev] [PATCH] R600: Make sure OQAP defs and uses happen in the same clause

This patch is : reviewed-by: Vincent Lejeune - Mail original - > De : Tom Stellard > À : Vincent Lejeune > Cc : "mesa-dev@lists.freedesktop.org" ; > "llvm-comm...@cs.uiuc.edu" ; Tom Stellard > > Envoyé le : Jeudi 14 novembre 2013 1h53 > Obje

Re: [Mesa-dev] [PATCH] R600: Don't use trans slot for instructions that read LDS source registers

A few comments below, otherwise : reviewed-by: Vincent Lejeune - Mail original - > De : Tom Stellard > À : llvm-comm...@cs.uiuc.edu > Cc : mesa-dev@lists.freedesktop.org; Tom Stellard > Envoyé le : Vendredi 6 septembre 2013 0h23 > Objet : [PATCH] R600: Don'

[Mesa-dev] [PATCH] R600/SI: Add support for indirect addressing of non default const buffer

NOTE: This is a candidate for the Mesa stable branch. --- lib/Target/R600/R600ISelLowering.cpp | 6 -- lib/Target/R600/R600Instructions.td | 9 - 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/lib/Target/R600/R600ISelLowering.cpp b/lib/Target/R600/R600ISelLowering.cpp

[Mesa-dev] [PATCH] r600g/llvm: Add support for UBO

NOTE: This is a candidate for the Mesa stable branch. --- src/gallium/drivers/r600/r600_llvm.c| 10 +++--- src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c | 17 + src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 4 ++-- 3 files changed, 26 insertions(+

[Mesa-dev] [PATCH] R600: Do not fold single instruction with more that 3 kcache read

It fixes around 100 tfb piglit tests and 16 glean tests. NOTE: This is a candidate for the Mesa stable branch. --- lib/Target/R600/AMDILISelDAGToDAG.cpp | 2 ++ lib/Target/R600/R600LowerConstCopy.cpp | 2 +- test/CodeGen/R600/kcache-fold.ll | 52 ++ 3 file

[Mesa-dev] [PATCH] r600g: Report Instructions Group count with R600_DUMP_SHADERS=1

--- src/gallium/drivers/r600/r600_asm.c | 7 ++- src/gallium/drivers/r600/r600_asm.h | 1 + 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c index 3632aa5..eacdb0c 100644 --- a/src/gallium/drivers/r600/r600

[Mesa-dev] [PATCH 1/2] R600: Increase number of ArrayBase Reg to 32

--- lib/Target/R600/R600RegisterInfo.td | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/Target/R600/R600RegisterInfo.td b/lib/Target/R600/R600RegisterInfo.td index 3812eb7..0718854 100644 --- a/lib/Target/R600/R600RegisterInfo.td +++ b/lib/Target/R600/R600RegisterInfo.

[Mesa-dev] [PATCH 2/2] R600: Support for TBO

NOTE: This is a candidate for the Mesa stable branch. --- lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp | 3 +- lib/Target/R600/R600Instructions.td| 54 ++ lib/Target/R600/R600Intrinsics.td | 2 + 3 files changed, 58 insertions(+), 1 dele

[Mesa-dev] [PATCH 1/4] r600g/llvm: Add support for UBO

NOTE: This is a candidate for the Mesa stable branch. --- src/gallium/drivers/r600/r600_llvm.c| 6 +- src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c | 17 + 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/r600/r600_llvm.c

[Mesa-dev] [PATCH 2/4] r600g/llvm: Fix alpha_to_one piglit tests

--- src/gallium/drivers/r600/r600_llvm.c | 2 ++ src/gallium/drivers/r600/r600_shader.c | 1 + src/gallium/drivers/radeon/radeon_llvm.h | 1 + 3 files changed, 4 insertions(+) diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c index 7a41688..59047e7 10

[Mesa-dev] [PATCH 3/4] r600g/llvm: Set Inputs/Outputs count to 32 (api reported value)

--- src/gallium/drivers/radeon/radeon_llvm.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeon/radeon_llvm.h b/src/gallium/drivers/radeon/radeon_llvm.h index bfeacb5..b1e025b 100644 --- a/src/gallium/drivers/radeon/radeon_llvm.h +++ b/src/gallium/d

[Mesa-dev] [PATCH 4/4] r600g/llvm: Support for TBO

--- src/gallium/drivers/r600/r600_llvm.c | 29 + 1 file changed, 29 insertions(+) diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c index 59047e7..89bcb79 100644 --- a/src/gallium/drivers/r600/r600_llvm.c +++ b/src/gallium/driver

[Mesa-dev] Re : Re: r600g: status of my work on the shader optimization

I think the bad result of llvm can be explained because of the lack of muladd support currently. Unigine 3.0 has a lot of geometry and i suspect vertex shader being almost twice bigger than they are in tgsi case does not help. Fwiw with an hd 6950 I have the same performance in unigine 3 high, m

[Mesa-dev] [PATCH 1/6] R600: Use MUL_IEEE for trig/fdiv intrinsic

--- lib/Target/R600/R600Instructions.td | 8 test/CodeGen/R600/fdiv.v4f32.ll | 8 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/lib/Target/R600/R600Instructions.td b/lib/Target/R600/R600Instructions.td index 0a01400..e4cc06e 100644 --- a/lib/Target/R600/R600

[Mesa-dev] [PATCH 2/6] R600: CONST_ADDRESS node is not marked as mayLoad anymore

mayLoad complexify scheduling and does not bring any usefull info as the location is not writeable at all. --- lib/Target/R600/R600Instructions.td | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/Target/R600/R600Instructions.td b/lib/Target/R600/R600Instructions.td index e4

[Mesa-dev] [PATCH 3/6] R600: Turn BUILD_VECTOR into Reg_Sequence

--- lib/Target/R600/AMDILISelDAGToDAG.cpp | 29 + 1 file changed, 29 insertions(+) diff --git a/lib/Target/R600/AMDILISelDAGToDAG.cpp b/lib/Target/R600/AMDILISelDAGToDAG.cpp index 2e726e9..6b24117 100644 --- a/lib/Target/R600/AMDILISelDAGToDAG.cpp +++ b/lib/Target/R60

[Mesa-dev] [PATCH 4/6] R600: Fix for Unigine when MachineSched is enabled

--- lib/Target/R600/R600Instructions.td | 1 + 1 file changed, 1 insertion(+) diff --git a/lib/Target/R600/R600Instructions.td b/lib/Target/R600/R600Instructions.td index 0a777f1..74106c9 100644 --- a/lib/Target/R600/R600Instructions.td +++ b/lib/Target/R600/R600Instructions.td @@ -1587,6 +1587,

[Mesa-dev] [PATCH 5/6] R600: Remove LowerConstCopyPass and lower CONST_COPY right after ISel.

Maintaining CONST_COPY Instructions until Pre Emit may prevent some ifcvt case and taking them in account for scheduling is difficult for no real benefit. --- lib/Target/R600/AMDGPU.h| 1 - lib/Target/R600/AMDGPUTargetMachine.cpp | 1 - lib/Target/R600/R600ISelLowering.cpp|

[Mesa-dev] [PATCH 6/6] R600: initial scheduler code

single VLIW group). Also it tries to reduce clause switching by grouping instruction of the same kind (ALU/FETCH/CF) together. Vincent Lejeune: - Support for VLIW4 Slot assignement - Recomputation of ScheduleDAG to get more parallelism opportunities Tom Stellard: - Fix assertion failure when trying

Re: [Mesa-dev] [PATCH 7/7] radeon/llvm: enable LICM and DCE pass

Reviewed-by: Vincent Lejeune - Mail original - > De : Christian König > À : mesa-dev@lists.freedesktop.org > Cc : mic...@daenzer.net > Envoyé le : Mardi 5 mars 2013 15h27 > Objet : [Mesa-dev] [PATCH 7/7] radeon/llvm: enable LICM and DCE pass > > From: Christi

Re: [Mesa-dev] [PATCH 7/7] radeon/llvm: enable LICM and DCE pass

LICM stands for Loop Invariant Code Motion. Instructions that does not depend of loop index are moved outside of loop body. (This solves one of llvm generated code Vadim pointed in another thread) DCE is DeadCodeElimination...I don't know the difference between "classic" DCE and aggressive DCE th

[Mesa-dev] [PATCH] R600: Fix JUMP handling so that MachineInstr verification can occur

This allows R600 Target to use the newly created -verify-misched llc flag --- lib/Target/R600/AMDILCFGStructurizer.cpp| 8 +- lib/Target/R600/R600ISelLowering.cpp| 7 +- lib/Target/R600/R600InstrInfo.cpp | 66 ++-- lib/Target/R600/R600Instructions.td

[Mesa-dev] [PATCH] R600: Factorize code handling Const Read Port limitation

--- lib/Target/R600/AMDILISelDAGToDAG.cpp| 34 ++ lib/Target/R600/R600InstrInfo.cpp| 54 ++ lib/Target/R600/R600InstrInfo.h | 3 ++ lib/Target/R600/R600MachineScheduler.cpp | 77 lib/Target/R600/R600MachineSched

[Mesa-dev] [PATCH] R600: Lower clamp constant to constant

--- lib/Target/R600/R600ISelLowering.cpp | 23 +++ test/CodeGen/R600/clamp-constants.ll | 20 2 files changed, 43 insertions(+) create mode 100644 test/CodeGen/R600/clamp-constants.ll diff --git a/lib/Target/R600/R600ISelLowering.cpp b/lib/Target/R600/R6

Re: [Mesa-dev] [PATCH] R600: Factorize code handling Const Read Port limitation

I fixed the coding style issue. The include was a debug leftover line, it shouldn't be there. - Mail original - > De : Tom Stellard > À : Vincent Lejeune > Cc : llvm-comm...@cs.uiuc.edu; mesa-dev@lists.freedesktop.org > Envoyé le : Mercredi 13 mars 2013 21h49 >

[Mesa-dev] [PATCH] R600: Relax some vector constraints on Dot4.

Dot4 now uses 8 scalar operands instead of 2 vectors one which allows register coalescer to remove some unneeded COPY. This patch also defines some structures/functions that can be used to handle every vector instructions (CUBE, Cayman special instructions...) in a similar fashion. --- lib/Target/

Re: [Mesa-dev] [PATCH] R600: Relax some vector constraints on Dot4.

;s why I wrote this patch. Besides, scalar values usually have shorter live interval, lowering register pressure. Shaders that have a dp4 instructions often end up consuming less registers with this patch. Vincent - Mail original ----- > De : Christian König > À : Vincent Lejeune &

Re: [Mesa-dev] Google Summer of Code ideas needed

Hi, If LLVM backend development is allowed, maybe a student could work on improving VLIW5 scheduling for R600 hardware. So far I focused on VLIW4 architecture, but extending the scheduler to support Trans ALU wouldn't be too hard. This would require a way to represent Trans slot compatibility fo

[Mesa-dev] [PATCH] R600: Use CONSTANT_BUFFER_0 address space for Implicit Parameters

It allows the backend to generate reads to constant cache which are faster that VTX_READ. --- lib/Target/R600/R600ISelLowering.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/Target/R600/R600ISelLowering.cpp b/lib/Target/R600/R600ISelLowering.cpp index a0e27ea..caa1899

[Mesa-dev] [PATCH] r600g: Add get/set to handle ALLOC_EXPORT_RAT_WORD0

--- src/gallium/drivers/r600/eg_asm.c | 38 +++ src/gallium/drivers/r600/eg_sq.h | 59 src/gallium/drivers/r600/r600_asm.c| 119 + src/gallium/drivers/r600/r600_asm.h| 8 ++- src/gallium/drivers/r600/r600_shader.c | 3

[Mesa-dev] [PATCH 1/2] R600: Emit native instructions for tex

--- lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp | 169 + lib/Target/R600/R600Instructions.td| 156 +++ 2 files changed, 196 insertions(+), 129 deletions(-) diff --git a/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp b/lib/Target/R600

[Mesa-dev] [PATCH 2/2] R600: Emit CF_ALU and use true kcache register.

--- lib/Target/R600/AMDGPU.h | 1 + lib/Target/R600/AMDGPUTargetMachine.cpp| 1 + lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp | 10 +- lib/Target/R600/R600EmitClauseMarkers.cpp | 243 + lib/Target/R600/R600Instructions.

[Mesa-dev] [PATCH 1/2] r600g/llvm: use native encode for tex

--- src/gallium/drivers/r600/r600_shader.c | 50 ++ 1 file changed, 27 insertions(+), 23 deletions(-) diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c index 29facf7..1e21559 100644 --- a/src/gallium/drivers/r600/r600_sha

[Mesa-dev] [PATCH 2/2] r600g/llvm: Add support for cf_alu native encode

--- src/gallium/drivers/r600/r600_asm.c| 2 +- src/gallium/drivers/r600/r600_asm.h| 1 + src/gallium/drivers/r600/r600_shader.c | 14 ++ 3 files changed, 16 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c i

[Mesa-dev] [PATCH] R600: Emit CF_ALU and use true kcache register.

--- lib/Target/R600/AMDGPU.h | 1 + lib/Target/R600/AMDGPUTargetMachine.cpp| 1 + lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp | 10 +- lib/Target/R600/R600EmitClauseMarkers.cpp | 250 + lib/Target/R600/R600Instructions.

Re: [Mesa-dev] [PATCH] r600g: don't reserve more stack space than required v4

Hi Vadim, Does this patch work ? (It's still not pushed) I'm working on doing native control flow for llvm and intend to port your patch on the control flow reservation. Vincent - Mail original - > De : Vadim Girlin > À : Alex Deucher > Cc : mesa-dev@lists.freed

[Mesa-dev] [PATCH] R600: Add support for native control flow

--- lib/Target/R600/AMDGPU.h | 1 + lib/Target/R600/AMDGPUTargetMachine.cpp| 1 + lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp | 21 +- lib/Target/R600/R600ControlFlowFinalizer.cpp | 264 + lib/Target/R600/R600Instructions.

Re: [Mesa-dev] [PATCH] r600g: don't reserve more stack space than required v4

- Mail original - > De : Vadim Girlin > À : Vincent Lejeune > Cc : Alex Deucher ; "mesa-dev@lists.freedesktop.org" > > Envoyé le : Dimanche 31 mars 2013 22h34 > Objet : Re: [Mesa-dev] [PATCH] r600g: don't reserve more stack space than > required v4 >

[Mesa-dev] [PATCH] R600: Control Flow support for pre EG gen

--- lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp | 30 ++-- lib/Target/R600/R600ControlFlowFinalizer.cpp | 84 +++-- lib/Target/R600/R600Instructions.td| 198 +++-- 3 files changed, 240 insertions(+), 72 deletions(-) diff --git a/lib/Target/R600/M

[Mesa-dev] [PATCH] r600g/llvm: Add support for native isa for pre EG

This fixes bug 62756 : https://bugs.freedesktop.org/show_bug.cgi?id=62756#c12 (Requires corresponding llvm commit) --- src/gallium/drivers/r600/r600_asm.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_

[Mesa-dev] [PATCH] R600: Add VTX_READ_* and RAT_WRITE_CACHELESS_* when computing cf addr

--- lib/Target/R600/R600ControlFlowFinalizer.cpp | 11 ++- test/CodeGen/R600/loop-adress.ll | 44 2 files changed, 54 insertions(+), 1 deletion(-) create mode 100644 test/CodeGen/R600/loop-adress.ll diff --git a/lib/Target/R600/R600ControlFlowFinalize

[Mesa-dev] [PATCH 1/3] R600: Emit used GPRs count

--- lib/Target/R600/AMDGPUAsmPrinter.cpp | 35 +-- lib/Target/R600/AMDGPUAsmPrinter.h | 3 ++- 2 files changed, 35 insertions(+), 3 deletions(-) diff --git a/lib/Target/R600/AMDGPUAsmPrinter.cpp b/lib/Target/R600/AMDGPUAsmPrinter.cpp index dacb033..580cfb4 1006

[Mesa-dev] [PATCH 2/3] R600: Export is emitted as a CF_NATIVE inst

--- lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp | 15 +-- lib/Target/R600/R600Instructions.td| 8 2 files changed, 9 insertions(+), 14 deletions(-) diff --git a/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp b/lib/Target/R600/MCTargetDesc/R600MCCo

[Mesa-dev] [PATCH 3/3] R600: Make Export Instruction not duplicable

--- lib/Target/R600/R600Instructions.td | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/Target/R600/R600Instructions.td b/lib/Target/R600/R600Instructions.td index 2e9a8a3..1c292bb 100644 --- a/lib/Target/R600/R600Instructions.td +++ b/lib/Target/R600/R600Instructions.td @

[Mesa-dev] [PATCH] r600/llvm: Allow arbitrary amount of temps in tgsi to llvm

--- src/gallium/drivers/radeon/radeon_llvm.h | 5 +++ .../drivers/radeon/radeon_setup_tgsi_llvm.c| 41 +++--- 2 files changed, 42 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/radeon/radeon_llvm.h b/src/gallium/drivers/radeon/radeon_llvm.h inde

[Mesa-dev] [PATCH] r600/llvm: Allow arbitrary amount of temps in tgsi to llvm

--- src/gallium/drivers/radeon/radeon_llvm.h | 6 +++ .../drivers/radeon/radeon_setup_tgsi_llvm.c| 43 -- 2 files changed, 45 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/radeon/radeon_llvm.h b/src/gallium/drivers/radeon/radeon_llvm.h inde

Re: [Mesa-dev] PATCHES: R600: Implement work-around for CF stack HW bug

Some cosmetic comments below, otherwise the patches are: reviewed-by: Vincent Lejeune >-OutStreamer.EmitRawText( >- Twine("; Kernel info:\n") + >- "; NumSgprs: " + Twine(KernelInfo.NumSGPR) + "\n" + >- "; NumVgprs:

[Mesa-dev] [PATCH] r600/llvm: use killgt info from llvm

--- src/gallium/drivers/r600/r600_llvm.c | 2 ++ src/gallium/drivers/r600/r600_llvm.h | 1 + src/gallium/drivers/r600/r600_shader.c | 8 ++-- 3 files changed, 9 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c index 20

[Mesa-dev] [PATCH] r600g/llvm: Undefines unrequired texture coord values

This is a port of "r600g:mask unused source components for SAMPLE" patch from Vadim Girlin. --- src/gallium/drivers/r600/r600_llvm.c | 25 - 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_l

Re: [Mesa-dev] R600 Patchset: Emit true ISA

} - Mail original - > De : Tom Stellard > À : llvm-comm...@cs.uiuc.edu > Cc : mesa-dev@lists.freedesktop.org > Envoyé le : Samedi 4 mai 2013 0h53 > Objet : R600 Patchset: Emit true ISA > > Hi, > > The attached patches modify the CodeEmitter to emit true ISA.

Re: [Mesa-dev] R600 Patchset: Emit true ISA

Reviewed-by:Vincent Lejeune - Mail original - > De : Tom Stellard > À : Vincent Lejeune > Cc : "llvm-comm...@cs.uiuc.edu" ; > "mesa-dev@lists.freedesktop.org" > Envoyé le : Lundi 6 mai 2013 17h02 > Objet : Re: R600 Patchset: Emit true ISA > &

Re: [Mesa-dev] [PATCH 2/2] R600: Fix encoding for R600 family GPUs

Thank for fixing this ! Both patches are reviewed-by: vljn at ovi.com - Mail original - > De : Tom Stellard > À : llvm-comm...@cs.uiuc.edu > Cc : mesa-dev@lists.freedesktop.org; Tom Stellard > Envoyé le : Mercredi 15 mai 2013 1h03 > Objet : [Mesa-dev] [PATCH 2/2] R600: Fix encoding fo

Re: [Mesa-dev] R600/SI Patches: A few cleanups for compute

Hi, >-- next part -- >>From dc547a89dac5039ce521f3c27fb23346251d488d Mon Sep 17 00:00:00 2001 >From: >>Tom Stellard >Date: Tue, 7 May 2013 16:26:26 -0400 >Subject: [PATCH 4/7] R600: Swap the legality of rotl and rotr > >The hardware supports rotr and not rotl. >--- > lib

[Mesa-dev] [PATCH 1/4] r600g/llvm: Factorize code loading from const buffer.

--- src/gallium/drivers/r600/r600_llvm.c | 51 +--- 1 file changed, 24 insertions(+), 27 deletions(-) diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c index c6c9123..26d40a2 100644 --- a/src/gallium/drivers/r600/r600_llvm.c

[Mesa-dev] [PATCH 2/4] r600g/llvm: Fix cubearray textureSize

--- src/gallium/drivers/r600/r600_llvm.c | 15 +++ src/gallium/drivers/r600/r600_shader.c | 1 + src/gallium/drivers/radeon/radeon_llvm.h | 1 + 3 files changed, 17 insertions(+) diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c index 26

[Mesa-dev] [PATCH 1/4] r600g/llvm: Factorize code loading from const buffer.

--- src/gallium/drivers/r600/r600_llvm.c | 51 +--- 1 file changed, 24 insertions(+), 27 deletions(-) diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c index c6c9123..26d40a2 100644 --- a/src/gallium/drivers/r600/r600_llvm.c

[Mesa-dev] [PATCH 4/4] r600g/llvm: fix cubemap lod/bias

--- src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c index 0629b89..3f7e79f 100644 --- a/src/gallium/drivers/radeon/radeon_setup_tgsi

[Mesa-dev] [PATCH 3/4] r600g/llvm: Fix texelFetchOffset-2D

--- src/gallium/drivers/r600/r600_llvm.c | 6 ++ 1 file changed, 6 insertions(+) diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c index 3d2c492..c1809b3 100644 --- a/src/gallium/drivers/r600/r600_llvm.c +++ b/src/gallium/drivers/r600/r600_llvm.c @@ -46

[Mesa-dev] [PATCH 2/2] r600g/llvm: fix txq for texture buffer

--- src/gallium/drivers/r600/r600_llvm.c | 7 +-- src/gallium/drivers/r600/r600_shader.c | 1 + src/gallium/drivers/radeon/radeon_llvm.h | 1 + 3 files changed, 7 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c inde

[Mesa-dev] [PATCH 1/2] r600g/llvm: fix sample cube shadow

--- src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c index 3f7e79f..f49170d 100644 --- a/src/gallium/drivers/radeon/ra

Re: [Mesa-dev] R600 Patches: Add support for the local address space

Hi, Thank for your work on this ! Patch 2, 4 and 5 have my rb. >diff --git a/lib/Target/R600/R600InstrInfo.cpp >b/lib/Target/R600/R600InstrInfo.cpp >index b9da74c..6de47f7 100644 >--- a/lib/Target/R600/R600InstrInfo.cpp >+++ b/lib/Target/R600/R600InstrInfo.cpp >@@ -133,6 +133,12 @@ bool R600Ins

[Mesa-dev] R600: Bugfixes

/PS register when R600Packetizers evaluates read port limitations. It prevents some bundling opportunities in some (not so frequent) situation. Vincent 0001-R600-Properly-set-COUNT_3-bit-in-TEX-clause-initiati.patch Description: Binary data 0002-R600-PV-stores-Reg-id-not-index.patch Description

Re: [Mesa-dev] R600 Patches: KCache kernel arguments and 24-bit arithmetic

which should be convertible to a REG_SEQUENCE. Vincent - Mail original - > De : Tom Stellard > À : llvm-comm...@cs.uiuc.edu > Cc : mesa-dev@lists.freedesktop.org > Envoyé le : Mardi 25 juin 2013 23h37 > Objet : [Mesa-dev] R600 Patches: KCache kernel argum

[Mesa-dev] [PATCH] fbo-depth-array:Check completness with a color texture

--- tests/all.py| 2 +- tests/fbo/fbo-depth-array.c | 36 ++-- 2 files changed, 31 insertions(+), 7 deletions(-) diff --git a/tests/all.py b/tests/all.py index 586cead..9aa600f 100644 --- a/tests/all.py +++ b/tests/all.py @@ -2831,7 +2831,7 @@ add_

[Mesa-dev] clEnqueueNDRangeKerne return error -52 with off-line compiled kernel

clGetProgramInfo(). Anybody experienced this? Note: if I used binary llvm/libclc/mesa packages (instead of compiling all of them) my test program works fine. Thank you Vincent ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http

[Mesa-dev] [PATCH] Copy Layered field in reuse_framebuffer_texture_attachment

Fix #83596 https://bugs.freedesktop.org/show_bug.cgi?id=83596 --- src/mesa/main/fbobject.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c index ae3a418..5eaf1a3 100644 --- a/src/mesa/main/fbobject.c +++ b/src/mesa/main/fbobject.c @@ -2299,6

Re: [Mesa-dev] [PATCH 5/5] R600: Fold immediates into ALU instructions when possible v2

It's a nice optimisation, it also makes machine code easier to read.   Reviewed-by: Vincent Lejeune - Mail original - > De : Tom Stellard > À : mesa-dev@lists.freedesktop.org > Cc : Tom Stellard > Envoyé le : Mercredi 28 novembre 2012 23h50 > Objet : [Mesa-dev] [P

[Mesa-dev] [PATCH 1/3] r600g: emit fmul/fadd(fmul) instead of AMDGPU.mul/mad intrinsics

--- src/gallium/drivers/r600/r600_llvm.c | 23 ++ .../drivers/radeon/radeon_setup_tgsi_llvm.c| 10 ++ 2 files changed, 29 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c index

[Mesa-dev] [PATCH 2/3] r600g: use fdiv instruction for TGSI_OPCODE_DIV/RCP

--- src/gallium/drivers/r600/r600_llvm.c | 22 ++ .../drivers/radeon/radeon_setup_tgsi_llvm.c| 4 ++-- 2 files changed, 24 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/r600/r600_llvm.c b/src/gallium/drivers/r600/r600_llvm.c index 35052

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