[Mesa-dev] [PATCH 13/15] i965/miptree: Prepare stencil mapping for isl based

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 32 +++ 1 file changed, 28 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 0854b4eb5d

[Mesa-dev] [PATCH 10/15] i965/miptree: Add option to resolve offsets using isl_surf

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 16 1 file changed, 16 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index c81d345fbc..212dfa30ec 100644 --- a/src

[Mesa-dev] [PATCH 11/15] i965: Add isl based miptree creator

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 76 +++ 1 file changed, 76 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 212dfa30ec..0854b4eb5d 100644

[Mesa-dev] [PATCH 8/8] i965/wm: Use stored hiz surface instead of creating copy

Now the last user of intel_miptree_get_aux_isl_surf() is gone. Reviewed-by: Jason Ekstrand Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 5 +- src/mesa/drivers/dri/i965/intel_mipmap_tree.c| 77 src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 2/8] i965/gen6: Use isl for hiz

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 9 +++-- src/mesa/drivers/dri/i965/gen6_depth_state.c | 12 +++ src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 50 ++- src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 7 ++-- 4

[Mesa-dev] [PATCH 6/8] i965/miptree/gen7+: Use isl for hiz layouts

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c| 4 +- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 4 +- src/mesa/drivers/dri/i965/gen6_depth_state.c | 6 +- src/mesa/drivers/dri/i965/gen7_misc_state.c | 5 +- src/mesa/drivers/dri

[Mesa-dev] i965: Represent aux surfaces (hiz, ccs, mcs) using isl

This is also earlier work in the list. Major difference is that gen6 hiz is now based on the new "side-by-side" layout. Topi Pohjolainen (8): i965/miptree: Refactor isl aux usage resolver i965/gen6: Use isl for hiz i965/miptree: Refactor aux surface allocation i965/miptree: U

[Mesa-dev] [PATCH 3/8] i965/miptree: Refactor aux surface allocation

Reviewed-by: Jason Ekstrand (v1) Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 64 +-- 1 file changed, 41 insertions(+), 23 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 7/8] i965/blorp: Use hiz surface instead of creating copy

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 24 ++-- 1 file changed, 10 insertions(+), 14 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index bd2f8004a4..1d406edaef 100644 --- a/src

[Mesa-dev] [PATCH 4/8] i965/miptree: Use isl for mcs layouts

Reviewed-by: Jason Ekstrand Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c| 2 + src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 8 +- src/mesa/drivers/dri/i965/intel_mipmap_tree.c| 103 --- 3 files changed, 25 insertions

[Mesa-dev] [PATCH 5/8] i965/miptree: Drop MIPTREE_LAYOUT_ACCELERATED_UPLOAD in mcs init

because buffers get unconditionally initialised by cpu writing. Reviewed-by: Jason Ekstrand Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c

[Mesa-dev] [PATCH 1/8] i965/miptree: Refactor isl aux usage resolver

Reviewed-by: Jason Ekstrand Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c| 4 +- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 3 +- src/mesa/drivers/dri/i965/intel_mipmap_tree.c| 47 +++- src/mesa/drivers/dri/i965

[Mesa-dev] i965: Represent depth surfaces using isl

Building on top of hiz and stencil isl, this series first moves gen7+ stencil and then all depth surfaces on top of isl. Topi Pohjolainen (15): i965: Prepare blit engine for isl based miptrees i965: Refactor miptree to isl converter and adjustment i965: Prepare tex, img and rt state

[Mesa-dev] [PATCH 03/15] i965: Prepare tex, img and rt state emission for isl based miptrees

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 18 ++ 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index c6cac22e3b

[Mesa-dev] [PATCH 06/15] i965/miptree: Prepare mapping for isl based

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 35 ++- 1 file changed, 24 insertions(+), 11 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 9c15c1071e

[Mesa-dev] [PATCH 08/15] i965/miptree: Add support isl based miptrees in map_movntdqa()

--- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 17 + 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 9fdd56eaf2..a2d4fa9d92 100644 --- a/src/mesa/drivers/dri/i96

[Mesa-dev] [PATCH 11/15] i965/miptree: Add support for isl in readpixels_tiled_memcpy()

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_pixel_read.c | 27 ++- 1 file changed, 18 insertions(+), 9 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c b/src/mesa/drivers/dri/i965/intel_pixel_read.c index 871559edf9

[Mesa-dev] [PATCH 05/15] i965/miptree: Represent y-tiled stencil copies with isl

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 9 - 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index a401af0423..9c15c1071e 100644 --- a

[Mesa-dev] [PATCH 02/15] i965: Refactor miptree to isl converter and adjustment

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 103 +-- 1 file changed, 57 insertions(+), 46 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index

[Mesa-dev] [PATCH 07/15] i965/miptree: Prepare aux state map for isl based

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 21 ++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 4472f822ea..9fdd56eaf2

[Mesa-dev] [PATCH 09/15] i965/fbo: Add support for isl-based miptrees in rb wrapper

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_fbo.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c index e49f6df408..04ca480dfa 100644 --- a/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 01/15] i965: Prepare blit engine for isl based miptrees

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_blit.c | 62 ++ 1 file changed, 48 insertions(+), 14 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index e79e02a075..456c5e56bc 100644

[Mesa-dev] [PATCH 12/15] i965: Refactor check for separate stencil

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 29 --- src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 4 ++-- 2 files changed, 24 insertions(+), 9 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa

[Mesa-dev] [PATCH 10/15] i965/miptree: Add support for isl based offsets

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 27 +++ 1 file changed, 23 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index a2d4fa9d92

[Mesa-dev] [PATCH 04/15] i965/miptree: Represent w-tiled stencil surfaces with isl

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen7_misc_state.c | 20 ++- src/mesa/drivers/dri/i965/gen8_depth_state.c | 26 ++- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 36 --- 3 files changed, 37 insertions(+), 45

[Mesa-dev] [PATCH 15/15] i965: Represent depth surfaces with isl

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_misc_state.c| 9 +- src/mesa/drivers/dri/i965/gen6_depth_state.c | 2 +- src/mesa/drivers/dri/i965/gen7_misc_state.c | 2 +- src/mesa/drivers/dri/i965/gen8_depth_state.c | 5 +- src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 14/15] i965: Drop redundant check for non-tiled depth buffer

Depth buffers are always Y-tiled. In brw_miptree_choose_tiling() driver opts to use linear buffers for small and 1D but this does not apply for depth - GL_DEPTH_COMPONENT and GL_DEPTH_STENCIL_EXT are considered first. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 13/15] i965/gen4: Set tile offsets to zero after depth rebase

with the single slice miptree backing the renderbuffer. This prepares for ISL based miptrees that calculate offsets on-demand and do not tolerate levels beyond what the miptree has. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_misc_state.c | 10 ++ 1 file changed, 6

[Mesa-dev] [PATCH] intel/compiler/gen9: Pixel shader header only workaround

tants, enable one of the inputs (PSIZ). v3 (Ken, Jason): Use LAYER instead making vulkan emit_3dstate_sbe() happy. CC: Kenneth Graunke CC: Jason Ekstrand CC: Eero Tamminen Signed-off-by: Topi Pohjolainen --- src/intel/compiler/brw_fs.cpp | 29 +

[Mesa-dev] [PATCH 01/16] i965/miptree: Set refcount before failing via _release()

Otherwise one wraps uint to UINT_MAX via -1. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c

[Mesa-dev] i965: Prep work for transitioning to ISL

Here are miscellanious "little" things now and there making the actual transition cleaner/simpler. These sit on top of Jason's ccs-modifiers. Topi Pohjolainen (16): i965/miptree: Set refcount before failing via _release() i965/miptree: Use > 1 instead of > 0 to check for

[Mesa-dev] [PATCH 03/16] i965: Mark read-only args as const in intel_miptree_supports_hiz()

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index b9a00caad2..69a9328d6c 100644 --- a/src

[Mesa-dev] [PATCH 02/16] i965/miptree: Use > 1 instead of > 0 to check for multisampling

Checking against zero currently works as single sampling is represented with zero. Once one moves to isl single sampling really has sample number of one. This keeps later patches simpler. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_blit.c | 4 ++-- 1 file changed, 2

[Mesa-dev] [PATCH 04/16] i965/tex: Use offset helper instead of accessing table directly

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_tex_image.c| 6 -- src/mesa/drivers/dri/i965/intel_tex_subimage.c | 6 -- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 06/16] i965/miptree: Do not rely on msaa type to decide if aux is needed

n the msaa_type. This is now replaced with consideration for number of samples and existence of mcs_buf. All other occurrences consider CMS || UMS which can be represented using single the type of ISL_MSAA_LAYOUT_ARRAY without any tweaks. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri

[Mesa-dev] [PATCH 05/16] i965: Make irb::mt_layer logical instead of physical

same as irb::layer_count. In case of copies and blits msaa surfacas already fall to blorp which natively works with logical slices. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c| 44 +--- src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 10/16] i965/miptree: Add pitch override for imported buffer objects

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 725d2ef061..b2ae807ae9 100644 --- a

[Mesa-dev] [PATCH 07/16] i965/miptree: Check for miptree_create() failures

Rest of the function assumes it always succeeds. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index

[Mesa-dev] [PATCH 09/16] i965/miptree: Stop setting total_width/height for existing bo

Now that image surface vertical slice calculator doesn't depend on total_height, total dimensions are only needed when new buffer objects are created. Therefore one can safely ignore them when miptrees are created for already exisiting buffer objects. Signed-off-by: Topi Pohjolainen ---

[Mesa-dev] [PATCH 08/16] i965/wm: Use isl for determining vertical slice pitch

This helps to drop dependency to miptree::total_height which is used in brw_miptree_get_vertical_slice_pitch(). This is also readily compatible once miptree itself is isl based. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_tex_layout.c | 2 +- src/mesa/drivers/dri

[Mesa-dev] [PATCH 12/16] i965: Use offset helper in intel_readpixels_tiled_memcpy()

providing support for isl based. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_pixel_read.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c b/src/mesa/drivers/dri/i965/intel_pixel_read.c index

[Mesa-dev] [PATCH 11/16] i965/miptree: Pass flags instead of explicit tiling to surface creator

allowing one to isl tiling filter. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 13 - 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c

[Mesa-dev] [PATCH 13/16] i965/wm: Use level offsets directly

dropping dependency to slice table. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c

[Mesa-dev] [PATCH 15/16] i965: Refactor check for separate stencil

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 24 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index b692d55abb

[Mesa-dev] [PATCH 14/16] intel/blorp/gen4: Drop cube map flag for single face copy

This will falsely trigger an assert on number of lyaers once isl is prepared for 3D layouts of Gen4 cube maps. Signed-off-by: Topi Pohjolainen --- src/intel/blorp/blorp_blit.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/src/intel/blorp/blorp_blit.c b/src/intel

[Mesa-dev] [PATCH 16/16] i965/gen4: Set tile offsets to zero after depth rebase

with the single slice miptree backing the renderbuffer. This prepares for ISL based miptrees that calculate offsets on-demand and do not tolerate levels beyond what the miptree has. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_misc_state.c | 10 ++ 1 file changed, 6

[Mesa-dev] [7.5/16] intel/isl: Take 3D surfaces into account in image params

CC: Jason Ekstrand Signed-off-by: Topi Pohjolainen --- src/intel/isl/isl_storage_image.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/intel/isl/isl_storage_image.c b/src/intel/isl/isl_storage_image.c index 4c56e787b5..a8aebce6d4 100644 --- a/src/intel/isl

[Mesa-dev] [v2 8/16] i965/wm: Use isl for filling tex image parameters

This helps to drop dependency to miptree::total_height which is used in brw_miptree_get_vertical_slice_pitch(). CC: Jason Ekstrand Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_tex_layout.c | 2 +- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 100

[Mesa-dev] [PATCH 02/22] i965/miptree: Switch to isl_surf::samples

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c| 16 - src/mesa/drivers/dri/i965/brw_context.c | 2 +- src/mesa/drivers/dri/i965/brw_meta_util.c| 2 +- src/mesa/drivers/dri/i965/brw_tex_layout.c | 4 +-- src/mesa/drivers/dri

[Mesa-dev] [PATCH 05/22] i965/miptree: Store chars-per-pixel even for isl based

This will significantly reduce chrun when switching remaaining surface types to isl. After the full transition it will be easier to calculate on-demand and drop the helper member in miptree. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 1 + 1 file changed

[Mesa-dev] [PATCH 07/22] i965/miptree: Prepare intel_miptree_copy() for isl based

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_blit.c | 20 1 file changed, 16 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index 476cc5..68e9c1ad16 100644 --- a/src/mesa

[Mesa-dev] [PATCH 01/22] i965/miptree: Switch to isl_surf::msaa_layout

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 3 +- src/mesa/drivers/dri/i965/brw_tex_layout.c| 9 ++- src/mesa/drivers/dri/i965/brw_wm.c| 2 +- src/mesa/drivers/dri/i965/intel_fbo.c | 13 +--- src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 03/22] i965/miptree: Switch to isl_surf::tiling

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_misc_state.c | 8 +-- src/mesa/drivers/dri/i965/brw_tex_layout.c | 28 src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 10 +-- src/mesa/drivers/dri/i965/gen6_depth_state.c | 2 +- src/mesa/drivers/dri

[Mesa-dev] [PATCH 06/22] i965: Prepare blit engine for isl based miptrees

v2: Do not concern cpp, pitch and tiling which are already transitioned. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_blit.c | 16 +++- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa

[Mesa-dev] [PATCH 04/22] i965/miptree: Switch to isl_surf::row_pitch

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_misc_state.c | 2 +- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 2 +- src/mesa/drivers/dri/i965/gen6_depth_state.c | 2 +- src/mesa/drivers/dri/i965/gen7_misc_state.c | 4 +- src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 12/22] i965: Prepare image setup from miptree for isl based

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_screen.c | 11 +-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index 7a92ef601b..9c74d2aa54 100644 --- a/src/mesa

[Mesa-dev] [PATCH 11/22] i965: Prepare tex, img and rt state emission for isl based miptrees

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 21 - 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 3f2ca82fdb

[Mesa-dev] i965: Transition depth and stencil surfaces to isl

a lot more complicated than simply introducing the conditional blocks that one removes in the end. These patches pave the way quite a bit also for color surfaces. Patches 16 and 17 switch stencil surfaces to isl and finally the last does the same for depth surfaces. Topi Pohjolainen (22):

[Mesa-dev] [PATCH 13/22] i965/fbo: Add support for isl-based miptrees in rb wrapper

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_fbo.c | 4 1 file changed, 4 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c index 1fa40bb5c9..fee4b6fa8c 100644 --- a/src/mesa/drivers/dri/i965/intel_fbo.c +++ b

[Mesa-dev] [PATCH 08/22] i965/wm: Prepare image surfaces for isl based

There is a functional change: Before update_image_surface() didn't shift the number of layers for 3D, now it does like update_texture_image_param() did. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 22 +++--- 1 file change

[Mesa-dev] [PATCH 09/22] i965: Prepare tex (sub)image for isl based

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_tex_image.c| 20 src/mesa/drivers/dri/i965/intel_tex_subimage.c | 8 +++- 2 files changed, 23 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa

[Mesa-dev] [PATCH 15/22] i965/miptree: Prepare compressed offsets for isl based

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 9 + 1 file changed, 9 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index a0b129adb4..1b8c0da80d 100644 --- a/src/mesa/drivers

[Mesa-dev] [PATCH 14/22] i965/miptree: Add support for imported bo offsets for isl based

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 13 + 1 file changed, 13 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 879036ce77..a0b129adb4 100644 --- a/src/mesa

[Mesa-dev] [PATCH 10/22] i965: Refactor miptree to isl converter and adjustment

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 103 +-- 1 file changed, 57 insertions(+), 46 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index

[Mesa-dev] [PATCH 17/22] i965/miptree: Represent y-tiled stencil copies with isl

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 9 - 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index adaa6a94ab..d96f5c7938 100644 --- a

[Mesa-dev] [PATCH 22/22] i965: Represent depth surfaces with isl

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_clear.c | 5 +- src/mesa/drivers/dri/i965/gen8_depth_state.c | 3 +- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 136 +- 3 files changed, 97 insertions(+), 47 deletions(-) diff --git a/src

[Mesa-dev] [PATCH 20/22] intel/isl/gen4: Represent cube maps with 3D layout

Signed-off-by: Topi Pohjolainen --- src/intel/isl/isl.c | 40 +++- 1 file changed, 35 insertions(+), 5 deletions(-) diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index 12ffe3bb51..90b36c33bc 100644 --- a/src/intel/isl/isl.c +++ b/src/intel/isl/isl.c

[Mesa-dev] [PATCH 19/22] i965/miptree: Prepare 3D surfaces with physical 2D layout

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 39 +++ 1 file changed, 22 insertions(+), 17 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index fafd0c1e59

[Mesa-dev] [PATCH 18/22] i965/miptree: Prepare aux state map for isl based

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 21 ++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index d96f5c7938..fafd0c1e59

[Mesa-dev] [PATCH 16/22] i965/miptree: Represent w-tiled stencil surfaces with isl

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen7_misc_state.c | 20 +- src/mesa/drivers/dri/i965/gen8_depth_state.c | 26 ++ src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 38 --- 3 files changed, 38 insertions(+), 46

[Mesa-dev] [PATCH 21/22] i965: Drop redundant check for non-tiled depth buffer

Depth buffers are always Y-tiled. In brw_miptree_choose_tiling() driver opts to use linear buffers for small and 1D but this does not apply for depth - GL_DEPTH_COMPONENT and GL_DEPTH_STENCIL_EXT are considered first. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965

[Mesa-dev] [1.5/22] i965/miptree: Use num_samples of 1 instead of 0 for single-sampled

will go away in next patch when native miptrees start to use isl_surf::samples as well. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c | 2 +- src/mesa/drivers/dri/i965/brw_context.c| 2 +- src/mesa/drivers/dri/i965/brw_meta_util.c | 2 +- src/

[Mesa-dev] [v2 2/22] i965/miptree: Switch to isl_surf::samples

one, there is no need for MAX2() when converting to ISL. Reviewed-by: Jason Ekstrand (v1) Reviewed-by: Kenneth Graunke (v1) Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.c| 16 - src/mesa/drivers/dri/i965/brw_context.c | 2 +- src

[Mesa-dev] [2.2/22] intel/isl: Add i915 to isl_tiling converter

Suggested-by: Daniel Stone Signed-off-by: Topi Pohjolainen --- src/intel/isl/isl.h | 3 +++ src/intel/isl/isl_drm.c | 17 + 2 files changed, 20 insertions(+) diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h index d81df31a37..af46b6bf29 100644 --- a/src/intel/isl

[Mesa-dev] [2.1/22] i965/miptree: Use isl_tiling_to_i915_tiling()

and drop local copy. Suggested-by: Daniel Stone Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_blit.h| 13 - src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 2 +- 2 files changed, 1 insertion(+), 14 deletions(-) diff --git a/src/mesa/drivers/dri/i965

[Mesa-dev] [v2 3/22] i965/miptree: Switch to isl_surf::tiling

v2 (Daniel): Use isl tiling converters instead of introducing local. Reviewed-by: Jason Ekstrand (v1) Reviewed-by: Kenneth Graunke (v1) Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_misc_state.c | 8 +-- src/mesa/drivers/dri/i965/brw_tex_layout.c | 28

[Mesa-dev] [v2 4/22] i965/miptree: Switch to isl_surf::row_pitch

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_misc_state.c | 2 +- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 2 +- src/mesa/drivers/dri/i965/gen6_depth_state.c | 2 +- src/mesa/drivers/dri/i965/gen7_misc_state.c | 4 +- src/mesa/drivers/dri/i965

[Mesa-dev] [3.1/22] i965/miptree: Take interleaving into account in stencil pitch

This makes intel_mipmap_tree::pitch and isl_surf::row_pitch semantically equivalent. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen7_misc_state.c | 12 +-- src/mesa/drivers/dri/i965/gen8_depth_state.c | 16 + src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 50

[Mesa-dev] [7.5/22] i965/wm: Fix number of layers in 3D images

CC: mesa-sta...@lists.freedesktop.org CC: Kenneth Graunke Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 16 +--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa

[Mesa-dev] [v2 15/22] i965/miptree: Prepare compressed offsets for isl based

v2 (Jason): Simply switch to isl_surf_get_image_offset_el() Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965

[Mesa-dev] [v2 22/22] i965: Represent depth surfaces with isl

. CC: Jason Ekstrand Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_clear.c | 5 +- src/mesa/drivers/dri/i965/gen8_depth_state.c | 3 +- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 130 +- 3 files changed, 91 insertions(+), 47 deletions

[Mesa-dev] [v2 20/22] intel/isl/gen4: Represent cube maps with 3D layout

v2 (Jason): Check for !ISL_SURF_DIM_3D instead of CUBE_BIT. Signed-off-by: Topi Pohjolainen --- src/intel/isl/isl.c | 41 +++-- 1 file changed, 35 insertions(+), 6 deletions(-) diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index 12ffe3bb51

[Mesa-dev] [PATCH 03/17] i965/miptree: Prepare non-tiled fallback for isl based

See brw_miptree_choose_tiling(). Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 36 +++ 1 file changed, 36 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c

[Mesa-dev] [PATCH 01/17] intel/isl: Add missing stencil pitch validation

Signed-off-by: Topi Pohjolainen --- src/intel/isl/isl.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index 7d1356f0ac..4393088409 100644 --- a/src/intel/isl/isl.c +++ b/src/intel/isl/isl.c @@ -1316,8 +1316,10

[Mesa-dev] [PATCH 05/17] intel/isl: Aling non-tiled horizontally by cache line

in order to support blit engine. Signed-off-by: Topi Pohjolainen --- src/intel/isl/isl.c | 16 +++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index 4393088409..90a8be2c58 100644 --- a/src/intel/isl/isl.c +++ b/src/intel

[Mesa-dev] [PATCH 09/17] intel/isl/gen7: Don't allow multisampled surfaces with valign2

arb_internalformat_query2.all internalformat__type pname checks arb_internalformat_query2.max dimensions related pname checks arb_copy_image.arb_copy_image-formats --samples=2/4/6/8 arb_texture_float.multisample-fast-clear gl_arb_texture_float Signed-off-by: Topi Pohjolainen --- src/intel/isl/isl_gen7.c | 42

[Mesa-dev] [PATCH 06/17] intel/isl: Allow 1D surfaces with compressed formats

Signed-off-by: Topi Pohjolainen --- src/intel/isl/isl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c index 90a8be2c58..d747f2fe5a 100644 --- a/src/intel/isl/isl.c +++ b/src/intel/isl/isl.c @@ -1090,7 +1090,7

[Mesa-dev] [PATCH 08/17] intel/isl/gen7: Allow msaa with signed integer formats

numbers. Signed-off-by: Topi Pohjolainen --- src/intel/isl/isl_gen7.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/intel/isl/isl_gen7.c b/src/intel/isl/isl_gen7.c index 4c5edb4b93..ab47a7f622 100644 --- a/src/intel/isl/isl_gen7.c +++ b/src/intel/isl/isl_gen7.c

[Mesa-dev] [PATCH 12/17] i965/miptree: Store compression flag also for isl based

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 8d55429b06..984529d883 100644 --- a/src/mesa/drivers/dri/i965

[Mesa-dev] i965: Transition the rest of surfaces (i.e., color) to isl

iglit series: https://lists.freedesktop.org/archives/piglit/2017-July/022606.html I separated patch 16 in order to ease review. It needs to be squashed into 15 before pushing. Patch 15+16 is checked to work on their own making 17 just a non-functional clean-up. I think the diff-stat and the last patch speak f

[Mesa-dev] [PATCH 02/17] i965/miptree: Prepare has_color_unresolved() for isl based

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 56f524abca..3cbdf3c938 100644 --- a/src

[Mesa-dev] [PATCH 04/17] i965/miptree/gen4: Prepare x-tiled fallback for isl based

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 26 -- 1 file changed, 20 insertions(+), 6 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index cc0e58b74a

[Mesa-dev] [PATCH 13/17] i965/miptree: Relax size alignment for linear surfaces

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 984529d883..73637b0fc5 100644 --- a/src

[Mesa-dev] [PATCH 17/17] i965/miptree: Clean-up unused

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/Makefile.sources | 1 - src/mesa/drivers/dri/i965/brw_blorp.c| 8 +- src/mesa/drivers/dri/i965/brw_tex_layout.c | 735 --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 23 +- src

[Mesa-dev] [PATCH 15/17] i965/miptree: Switch remaining surfaces to isl

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 10 +- src/mesa/drivers/dri/i965/intel_mipmap_tree.c| 119 ++- 2 files changed, 36 insertions(+), 93 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src

[Mesa-dev] [PATCH 10/17] main/teximage: Even on failure use valid format for init()

Otherwise init_teximage_fields_ms() (called by _mesa_init_teximage_fields()) will always assert as it can't find valid base format. Signed-off-by: Topi Pohjolainen --- src/mesa/main/teximage.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/main/teximage.c

[Mesa-dev] [PATCH 07/17] intel/isl/gen7: Allow msaa with 128-bit formats

all tests with all sample numbers and even with 128-bit formats. Signed-off-by: Topi Pohjolainen --- src/intel/isl/isl_format.c | 11 +++ 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/src/intel/isl/isl_format.c b/src/intel/isl/isl_format.c index a9f9c6be73..435b0d003a

[Mesa-dev] [PATCH 14/17] i965/miptree: Drop miptree_array_layout in get_isl_dim_layout()

brw_emit_surface_state(). Hence dropping the unneeded argument separately. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 5 +++-- src/mesa/drivers/dri/i965/intel_mipmap_tree.c| 11 --- src/mesa/drivers/dri/i965/intel_mipmap_tree.h| 3 +-- 3 files

[Mesa-dev] [PATCH 11/17] i965/miptree: Check tex image allocation failures

ing of over 64-bit formats. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_tex.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/mesa/drivers/dri/i965/intel_tex.c b/src/mesa/drivers/dri/i965/intel_tex.c index 82e25fc5ea..7ce2ceb9a2 100644 --- a/src/mesa/drivers/dr

[Mesa-dev] [PATCH 16/17] squash: i965/gen4: Force x-tiling for color surfaces

tiled met the alignment constraints. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c

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