,
> >>> Samuel just fixed up a few fermi-specific bits.
> >>
> >> Can't we use LLVM IR-> TGSI -> nv IR for that?
> >
> > Sure, there's no LLVM IR -> TGSI conversion though.
>
> BTW, Pierre Moreau is working on a SPIR-V -> nv50 ir ad
Hi Samuel,
(some comments further down)
On 11:30 PM - Oct 18 2015, Samuel Pitoiset wrote:
> Like for nvc0, this will allow to split different types of queries and
> to prepare the way for both global performance counters and MP counters.
>
> While we are at it, make use of nv50_query struct inst
Hi Samuel,
(some comments below)
On 11:36 PM - Oct 18 2015, Samuel Pitoiset wrote:
> While we are at it, store the rotate offset for occlusion queries to
> nv50_hw_query like on nvc0.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/gallium/drivers/nouveau/nv50/nv50_query_hw.c | 45
> ++
On 11:06 AM - Oct 19 2015, Samuel Pitoiset wrote:
>
>
> On 10/19/2015 11:01 AM, Pierre Moreau wrote:
> >Hi Samuel,
> >
> >(some comments below)
> >
> >On 11:36 PM - Oct 18 2015, Samuel Pitoiset wrote:
> >>While we are at it, store the rotate offset
Reviewed-by: Pierre Moreau
On 11:30 PM - Oct 18 2015, Samuel Pitoiset wrote:
> Signed-off-by: Samuel Pitoiset
> ---
> src/gallium/drivers/nouveau/nv50/nv50_query.c | 18 --
> src/gallium/drivers/nouveau/nv50/nv50_query.h | 3 ---
> src/gallium/drivers/nouveau/nv
Reviewed-by: Pierre Moreau
On 06:24 PM - Oct 28 2015, Samuel Pitoiset wrote:
> Changes since v2:
> - remove unused 'nv50_hw_query_funcs' struct
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/gallium/drivers/nouveau/Makefile.sources | 2 +
> s
On 01:15 AM - Oct 31 2015, Ilia Mirkin wrote:
> I've switched the st/mesa impl around to be set in the manager, based
> on whether it's a debug context. I've also added a st/clover impl
> (entirely untested beyond compilation) as the OpenCL API appears to
Tested on a Tesla card using the hello_wor
Function arguments do not have an "origin" instruction, causing a
NULL-pointer dereference without this check.
Signed-off-by: Pierre Moreau
---
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/gallium/drivers/nouve
Reviewed-by: Pierre Moreau
On 12:36 am - Oct 06 2016, Karol Herbst wrote:
> helped some ue4 demos and divinity OS shaders
>
> total instructions in shared programs : 2818674 -> 2818606 (-0.00%)
> total gprs used in shared programs: 379273 -> 379273 (0.00%)
> total
Hardware does not support 64-bit integers MAD and MUL operations, so we need
to transform them in 32-bit operations.
Signed-off-by: Pierre Moreau
---
.../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 121 +
1 file changed, 121 insertions(+)
Tested with (the GPU result
Sorry, there should have been a v2 next to PATCH in the subject…
Pierre
On 12:24 am - Oct 16 2016, Pierre Moreau wrote:
> Hardware does not support 64-bit integers MAD and MUL operations, so we need
> to transform them in 32-bit operations.
>
> Signed-off-by: P
On 06:38 pm - Oct 15 2016, Ilia Mirkin wrote:
> On Sat, Oct 15, 2016 at 6:24 PM, Pierre Moreau wrote:
> > Hardware does not support 64-bit integers MAD and MUL operations, so we need
> > to transform them in 32-bit operations.
> >
> > Signed-off-by: Pierre Moreau
>
5/2016 03:24 PM, Pierre Moreau wrote:
> > Hardware does not support 64-bit integers MAD and MUL operations, so we need
> > to transform them in 32-bit operations.
> >
> > Signed-off-by: Pierre Moreau
> > ---
> > .../drivers/nouveau/codegen/nv50_ir_peephole.cpp
Hardware does not support 64-bit integers MAD and MUL operations, so we need
to transform them in 32-bit operations.
Signed-off-by: Pierre Moreau
---
.../drivers/nouveau/codegen/nv50_ir_peephole.cpp | 116 +
1 file changed, 116 insertions(+)
Tested with (the GPU result
Reviewed-by: Pierre Moreau
On 02:54 pm - Oct 31 2016, Samuel Pitoiset wrote:
> Signed-off-by: Samuel Pitoiset
> ---
> .../drivers/nouveau/nvc0/nvc0_query_hw_metric.c| 50
> +++---
> 1 file changed, 7 insertions(+), 43 deletions(-)
>
> diff --git
Are reduction doable on shared atomics as well?
Pierre
On 08:08 pm - Nov 04 2016, Samuel Pitoiset wrote:
> This is similar to NVC0 and GK110 emitters where we emit
> reduction operations instead of atomic operations when the
> destination is not used.
>
> Found after writing some tests which che
Hello everyone,
I have been working on translating SPIR-V to NV50 IR inside Nouveau in order to
run OpenCL kernels, received as SPIR-V binaries, on Nouveau. I have some
patches for clover as well as gallium, but before sending those for review, I
would like to know how to handle the SPIR-V header
Mesa master builds again against LLVM 3.6.
Tested-by: Pierre Moreau
On 07:57 pm - Nov 18 2016, Vedran Miletić wrote:
> The commit 8e430ff8b060b4e8e922bae24b3c57837da6ea77 support for LLVM
> 3.9 and older versionsin Clover. This patch restores it and refactors
> the support usi
vtxfmt.c, function install_vtxfmt
SET_Begin(tab, vfmt->Begin);
SET_Begin calls a macro (SET_by_offset) mapping the vbo_exec_Begin to glBegin.
The macro is located in dispatch.h
Hope it helps you,
Pierre Moreau
> On 27 juil. 2013, at 03:18, ZhiLi wrote:
>
> Hello everyone,
>
;
- Add a dependency on llvm-spirv.
Signed-off-by: Pierre Moreau
---
Dylan, I dropped your Rb since the modification were substantial, even though
you were the one asking for them. I could easily have gotten them wrong. :-)
configure.ac | 38 ++
meson.build
On 2019-01-18 — 16:04, Francisco Jerez wrote:
[snip]
> > diff --git a/src/gallium/state_trackers/clover/core/module.hpp
> > b/src/gallium/state_trackers/clover/core/module.hpp
> > index 2ddd26426fb..ff7e9b6234a 100644
> > --- a/src/gallium/state_trackers/clover/core/module.hpp
> > +++ b/src/galliu
Thank you for the review.
Do you think you’ll have the opportunity to have a look at patches 13 and 16?
(Patch 15 is also missing a review, but I found some improvements to be made
there.)
Thanks,
Pierre
On 2019-01-18 — 15:52, Francisco Jerez wrote:
> Pierre Moreau writes:
>
> >
translating from
SPIR-V to LLVM IR” in the v6.
Signed-off-by: Pierre Moreau
---
src/gallium/state_trackers/clover/Makefile.am | 17 ++-
.../state_trackers/clover/Makefile.sources| 4 +
src/gallium/state_trackers/clover/meson.build | 11 +-
.../clover/spirv/invocation.cpp
: Changed to match the updated “clover/llvm: Allow translating from
SPIR-V to LLVM IR” in the v6.
Signed-off-by: Pierre Moreau
---
src/gallium/state_trackers/clover/Makefile.am | 17 ++-
.../state_trackers/clover/Makefile.sources| 4 +
src/gallium/state_trackers/clover/meson.build | 11
On 2019-01-20 — 16:59, Pierre Moreau wrote:
[snip]
> > Is this patch being used at all in this series?
>
> Not in this one, but it will be in the next merge request which adds support
> for SPIR-V as a second main IR in clover alongside LLVM IR.
> I’ll drop this patch from this
Signed-off-by: Pierre Moreau
---
src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp | 4 ++--
src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.h | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp
b
fix outside of Nouveau, as suggested by Jose Fonseca, since anyone
might need it when GCC switches to C++14 by default with GCC 6.0.
Signed-off-by: Pierre Moreau
---
include/cpp11_math.h| 61 +
src/gallium/auxiliary/util/u_math.h | 3 ++
2
On 01:11 PM - Apr 01 2016, Jose Fonseca wrote:
> On 31/03/16 23:08, Pierre Moreau wrote:
> >Starting from C++11, several math functions, like isinf, moved into the std
> >namespace. Since cmath undefines those functions before redefining them
> >inside
> >the namespace,
:-( I'll have another look this evening. Which version of glibc did it failed
with?
(I saw your reply to the other patch, I'll dig deeper this evening.)
Thanks!
Pierre
> On 13 Apr 2016, at 08:22, Jose Fonseca wrote:
>
>> On 01/04/16 13:18, Pierre Moreau wrote:
>>
On 01:56 AM - Apr 13 2016, Samuel Pitoiset wrote:
> This implements set_shader_images() and resource invalidation for
> images. As OpenGL requires at least 8 images, we are going to expose
> this minimum value even if this might be raised for Kepler, but this
> limit is mainly for Fermi because the
On 01:56 AM - Apr 13 2016, Samuel Pitoiset wrote:
> Similar to surfaces validation for compute shaders.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/gallium/drivers/nouveau/nvc0/nvc0_program.c | 4 +++-
> src/gallium/drivers/nouveau/nvc0/nvc0_tex.c | 26
> -
> 2 f
checks, as only glibc > =2.23 defines
isinf & co. as functions, as suggested by Jose Fonseca.
Signed-off-by: Pierre Moreau
---
include/c99_math.h | 23 +++
1 file changed, 23 insertions(+)
diff --git a/include/c99_math.h b/include/c99_math.h
index 250e08d..192ff13
Ping :-)
On 10:56 PM - Mar 19 2016, Pierre Moreau wrote:
> Generating a `cvt u32 $r0 u64 $r1d` or a `cvt u64 $r0d u32 $r2` makes the GPU
> unhappy. Instead, manually handle the conversion between 64-bit and 32-bit
> values, and use `cvt` to convert between the original target (resp. sour
On 04:17 PM - Apr 17 2016, Ilia Mirkin wrote:
> On Sun, Apr 17, 2016 at 4:07 PM, Pierre Moreau wrote:
> > Ping :-)
> >
> > On 10:56 PM - Mar 19 2016, Pierre Moreau wrote:
> >> Generating a `cvt u32 $r0 u64 $r1d` or a `cvt u64 $r0d u32 $r2` makes the
> >&
on check logic and pushed.
>
> Jose
>
> On 14/04/16 19:43, Pierre Moreau wrote:
> >Starting from C++11, several math functions, like isinf, moved into the std
> >namespace. Since cmath undefines those functions before redefining them
> >inside
> >the namespa
On 11:21 AM - Apr 18 2016, Hans de Goede wrote:
> Hi,
>
> On 17-04-16 22:27, Pierre Moreau wrote:
> >On 04:17 PM - Apr 17 2016, Ilia Mirkin wrote:
> >>On Sun, Apr 17, 2016 at 4:07 PM, Pierre Moreau
> >>wrote:
> >>>Ping :-)
> >>
Tested-by: Pierre Moreau
- Mail original -
> Commit 44673512a84 enabled support for saturating fmul. However
> experimentally this does not seem to work on the older chips.
> Restrict
> the feature to G200 (NVA0) and later.
>
> Reported-by: Pierre Moreau
Reviewed-by: Pierre Moreau
On 08:25 PM - Feb 19 2016, Samuel Pitoiset wrote:
> Compute shaders are totally unsupported. This avoids Clover to
> report that OpenCL is supported on Tesla because it's a lie.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/galli
Hi Samuel,
On 06:44 PM - Feb 24 2016, Samuel Pitoiset wrote:
> Reduce the amount of duplicated code by re-using
> nvc0_program_validate(). While we are at it, change the prototype
> to return void and remove nvc0_compute.h which is now useless.
Why don't you want to know whether the validation wo
ming `nvc0_validate_global_residents()` to
`nvc0_compte_validate_globals()` brings more consistency with the other
`nvXY_compute_validate_*()` functions, but then one might be tempted to rename
`global_residents` to only `globals`. So if we can't remove the other
`*_residents?`, I would probab
Acked-by: Pierre Moreau
On 06:44 PM - Feb 24 2016, Samuel Pitoiset wrote:
> No reason to not validate those global buffers and this might avoid
> fails if someone try to use the global memory from compute programs.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/gallium/dr
On 08:44 PM - Feb 24 2016, Samuel Pitoiset wrote:
>
>
> On 02/24/2016 08:30 PM, Pierre Moreau wrote:
> >Hi Samuel,
> >
> >On 06:44 PM - Feb 24 2016, Samuel Pitoiset wrote:
> >>Reduce the amount of duplicated code by re-using
> >>nvc0_program_validat
an instruction.
Fixes a nullptr dereference in the register allocation pass, while running
compute kernels that do not use $r0.
Signed-off-by: Pierre Moreau
---
src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium
thing to do with $r0, but it does have something
> to do with the fact that nv50 compute makes use of function arguments
> for compute programs.
That's what I meant to write, but reading it again, it is confusing. I'll
rewrite it.
Pierre
>
> -ilia
>
> On Wed, Feb 2
I did hit that issue as well, but I have C++11 forced on my SPIR-V branch.
I guess adding the whitespace will still result in code that works with older
C++ version, so the fix can still be accepted even if we do not plan to switch
to C++11 by default.
Pierre
On 11:16 AM - Mar 09 2016, Samuel P
On 04:27 PM - Mar 10 2016, Samuel Pitoiset wrote:
>
>
> On 03/10/2016 04:23 PM, Ilia Mirkin wrote:
> >On Thu, Mar 10, 2016 at 10:14 AM, Hans de Goede wrote:
> >>Add support for clover / OpenCL kernel input parameters.
> >>
> >>Signed-off-by: Hans de Goede
> >>---
> >> .../drivers/nouveau/codeg
On 11:05 AM - Mar 10 2016, Ilia Mirkin wrote:
> On Thu, Mar 10, 2016 at 11:03 AM, Pierre Moreau wrote:
> > You might want to increment the address by at least
> > `info->prop.cp.inputOffset`, and if inputs still end up in shared on Tesla,
>
> There's a cp.sharedOffse
an instruction.
Signed-off-by: Pierre Moreau
---
src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp
index 62b0aa1
Hum… Something went wrong, sorry. This is the same as the previous patch and
not the updated version…
Pierre
On 02:16 PM - Mar 13 2016, Pierre Moreau wrote:
> On Tesla cards, the first register $r0 contains the thread id; later
> generations use a specialised register for it. In order to p
dereference during the register allocation pass, if
a function had unused arguments.
v2: Rewrite commit message based on Ilia Mirkin's comment
Signed-off-by: Pierre Moreau
---
src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --
Signed-off-by: Pierre Moreau
---
src/gallium/drivers/nouveau/nv50/nv50_state.c | 2 +-
src/gallium/drivers/nouveau/nvc0/nvc0_state.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_state.c
b/src/gallium/drivers/nouveau/nv50
Signed-off-by: Pierre Moreau
---
src/gallium/drivers/nouveau/nv50/nv50_state_validate.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c
b/src/gallium/drivers/nouveau/nv50/nv50_state_validate.c
index 5536978..d06ba4a 100644
--- a/src
> +#define NVC0_CB_AUX_SAMPLE_SIZE (8 * 4 * 2)
> +/* draw parameters (index bais, base instance, drawid) */
> +#define NVC0_CB_AUX_DRAW_INFO 0x180 /* VP */
What is the status of this one? Is the region from 0x180 and after considered
as the `AUX_DRAW_INFO`, and has a s
This fixes a compile error while building Nouveau with C++11 enabled (and
glibc >= 2.23). This happens if SWR is enabled, as it forces C++11.
Signed-off-by: Pierre Moreau
---
src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp | 4
1 file changed, 4 insertions(+)
diff --git a/src/gall
Acked-by: Pierre Moreau
On 09:55 PM - Mar 15 2016, Samuel Pitoiset wrote:
> Having two different variables for the driver constant buffer slot
> is confusing and really useless.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/gallium/drivers/nouveau/codegen/nv50_ir_dri
On 06:34 PM - Mar 18 2016, Vinson Lee wrote:
> Fix clang build error.
>
> CXX codegen/nv50_ir_lowering_nvc0.lo
> codegen/nv50_ir_lowering_nvc0.cpp:1783:42: error: invalid suffix 'd' on
> floating constant
> Value *zero = bld.loadImm(NULL, 0.0d);
>
rence during the register allocation pass, if
a function had unused arguments.
v2: Rewrite commit message based on Ilia Mirkin's comment
v3: Rewrite an incorrect statement in the commit message that was pointed out
by Ilia Mirkin
Signed-off-by: Pierre Moreau
---
src/gallium/drivers/nouve
Fixes:
commit a100d89d09981d2ebb42a7e4643a48e78db8dfe3
Author: Vinson Lee
Date: Fri Mar 18 18:28:28 2016 -0700
nv50,nvc0: Fix invalid constant.
Signed-off-by: Pierre Moreau
---
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 2 +-
1 file changed, 1
v2: Use "Fixes: sha1 (subject)" format for the fixes section, as pointed out
by Ilia Mirin
Fixes: a100d89d0998 ("nv50,nvc0: Fix invalid constant.")
Signed-off-by: Pierre Moreau
---
src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 2 +-
1 file change
Two 32-bit MAD or MUL operations are generated in place of the original 64-bit
operation. All operands can either be signed or unsigned, but they have to be
integers.
Signed-off-by: Pierre Moreau
---
src/gallium/drivers/nouveau/codegen/nv50_ir_build_util.cpp | 11 ++-
1 file changed, 10
river.
Signed-off-by: Pierre Moreau
---
.../nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 59 ++
.../nouveau/codegen/nv50_ir_lowering_nvc0.h| 1 +
2 files changed, 60 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
ting
each of my mads to mul + add…
>
> On Sat, Mar 19, 2016 at 5:56 PM, Pierre Moreau wrote:
> > Two 32-bit MAD or MUL operations are generated in place of the original
> > 64-bit
> > operation. All operands can either be signed or unsigned, but they have to
> >
ar 19, 2016 at 5:56 PM, Pierre Moreau wrote:
> > Generating a `cvt u32 $r0 u64 $r1d` or a `cvt u64 $r0d u32 $r2` makes the
> > GPU
> > unhappy. Instead, manually handle the conversion between 64-bit and 32-bit
> > values, and use `cvt` to convert between the original ta
On 06:24 PM - Mar 19 2016, Ilia Mirkin wrote:
> On Sat, Mar 19, 2016 at 6:15 PM, Pierre Moreau wrote:
> > On 06:05 PM - Mar 19 2016, Ilia Mirkin wrote:
> >> Not 100% sure, but pretty sure this is wrong. Can you provide the
> >> generated sequence of instructions in r
On 06:26 PM - Mar 19 2016, Ilia Mirkin wrote:
> On Sat, Mar 19, 2016 at 6:26 PM, Pierre Moreau wrote:
> > However, you could have some `long bar; char foo = convert_char_sat(bar);`
> > in
> > the OpenCL kernel.
>
> Sure, but the SPIR-V -> nv50/ir converter co
sla. (Tesla will keep hunting you! :-p)
Global and const memory are not completely the same, so I'm somewhat reluctant
to reuse the same variable slot for both of them. But, I'm just giving my
2cents here, so feel free to keep as is.
Regardless of your pick, this is
Acked-by: Pierre Moreau
On 06:41 PM - Mar 19 2016, Ilia Mirkin wrote:
> On Sat, Mar 19, 2016 at 6:36 PM, Pierre Moreau wrote:
> > On 06:26 PM - Mar 19 2016, Ilia Mirkin wrote:
> >> On Sat, Mar 19, 2016 at 6:26 PM, Pierre Moreau
> >> wrote:
> >> > However,
This serie is:
Reviewed-by: Pierre Moreau
Tested-by: Pierre Moreau
Pierre
On 08:54 PM - Mar 15 2016, Samuel Pitoiset wrote:
> From: Samuel Pitoiset
>
> Hi,
>
> This is loosely based on what I did for nvc0 few weeks ago. I have not tested
> this series because I don't
;>
>>>>>>
>>>>>> On Mar 17, 2016 8:27 PM, "Matt Turner" >>>>> <mailto:matts...@gmail.com>> wrote:
>>>>>> >
>>>>>> > On Thu, Mar 17, 2016 at 5:17 PM, Pierre Moreau
>>>>>
On 07:28 PM - May 30 2016, ⚛ wrote:
> This patch enables compilation with -flto.
>
> The performance benefits of LTO (GCC 4.9 & 6.1) are about 1% for glxgears.
> Performance changes in OpenGL games haven't been measured yet, my feeling
> is that they are negligible.
> diff --git a/configure.ac b/
Ok, I found the answer to my question regarding the `-fno-lto`. IMHO that
should be in the commit message, since the patch only checks for availability
and disables LTO in one case, never enabling it explicitely.
Please ignore my previous mail.
Pierre
On 11:06 AM - May 30 2016, Matt Turner wrote:
On 11:14 AM - Dec 14 2015, Samuel Pitoiset wrote:
> frame cannot be NULL in that branch. Spotted by Coverity.
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/gallium/drivers/nouveau/nouveau_video.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/src/gallium/drivers/nouveau/nouveau_vide
On 11:56 AM - Dec 14 2015, Ilia Mirkin wrote:
> No, gp->code_size is set by the validation. You need to put that last.
IIRC, you can't assume in which order the compiler will decide to evaluate the
different expressions being AND'ed.
>
> On Mon, Dec 14, 2015 at 11:51 AM, Samuel Pitoiset
> wrote
On 12:01 PM - Dec 14 2015, Ilia Mirkin wrote:
> On Mon, Dec 14, 2015 at 11:59 AM, Pierre Moreau wrote:
> > On 11:56 AM - Dec 14 2015, Ilia Mirkin wrote:
> >> No, gp->code_size is set by the validation. You need to put that last.
> >
> > IIRC, you can't a
Signed-off-by: Pierre Moreau
---
src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index
Hi Aaron,
On 2017-07-21 — 23:19, Aaron Watry wrote:
> According to section 5.8.4.5 of the 2.0 spec, the CL C version is chosen by:
> 1) If you have -cl-std=CL1.1+ use the version specified
> 2) If not, use the highest 1.x version that the device supports
According to that same part of the spec,
With the comments in patch 4 taken care of, this series is
Reviewed-by: Pierre Moreau
On 2017-07-21 — 23:19, Aaron Watry wrote:
> The first patch is one I've been sitting on for a few weeks while
> I've tried to chase down other issues with clover/llvm/libclc. It
> fixes at
Signed-off-by: Pierre Moreau
---
src/gallium/include/pipe/p_defines.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/include/pipe/p_defines.h
b/src/gallium/include/pipe/p_defines.h
index ce2cfd1d88..71991383c2 100644
--- a/src/gallium/include/pipe/p_defines.h
+++ b/src/gallium
Besides parsing all the opcodes until reaching the EOF character, there
is no way to compute the size of a SPIR-V binary. Therefore, it is
easier to pass it along the SPIR-V binary in pipe_compute_state.
Signed-off-by: Pierre Moreau
---
src/gallium/include/pipe/p_state.h | 1 +
1 file changed
Signed-off-by: Pierre Moreau
---
src/gallium/auxiliary/Makefile.am | 1 +
src/gallium/auxiliary/Makefile.sources| 4 ++
src/gallium/auxiliary/spirv/spirv_utils.c | 75 +++
src/gallium/auxiliary/spirv/spirv_utils.h | 86 +++
4
Signed-off-by: Pierre Moreau
---
include/CL/cl.h | 6 ++
include/CL/cl_platform.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/include/CL/cl.h b/include/CL/cl.h
index 316565d6e4..44d7aedc3e 100644
--- a/include/CL/cl.h
+++ b/include/CL/cl.h
@@ -757,6 +757,12
Signed-off-by: Pierre Moreau
---
src/gallium/auxiliary/Makefile.sources |4 +-
src/gallium/auxiliary/spirv/spirv_linker.c | 1324
src/gallium/auxiliary/spirv/spirv_linker.h | 67 ++
3 files changed, 1394 insertions(+), 1 deletion(-)
create mode 100644 src
Signed-off-by: Pierre Moreau
---
configure.ac | 16
1 file changed, 16 insertions(+)
diff --git a/configure.ac b/configure.ac
index ba042791ad..602aeb279d 100644
--- a/configure.ac
+++ b/configure.ac
@@ -2064,6 +2064,11 @@ AC_ARG_WITH([clang-libdir],
PKG_CHECK_EXISTS([libclc
Signed-off-by: Pierre Moreau
---
include/CL/cl.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/CL/cl.h b/include/CL/cl.h
index 44d7aedc3e..cc8d7ddf60 100644
--- a/include/CL/cl.h
+++ b/include/CL/cl.h
@@ -455,6 +455,7 @@ typedef struct _cl_buffer_region {
#define
, as I
am not that comfortable at writing too much C code: I’ll try to learn from
your comments.
Thank you in advance for reviewing/commenting,
Pierre
[1]: https://github.com/KhronosGroup/SPIRV-Tools/
Pierre Moreau (17):
auxiliary: Introduce utilities for SPIR-V binaries
auxiliary: Implement
Signed-off-by: Pierre Moreau
---
src/gallium/state_trackers/clover/Makefile.am | 10 +-
src/gallium/state_trackers/clover/Makefile.sources | 4 +
.../state_trackers/clover/spirv/invocation.cpp | 481 +
.../state_trackers/clover/spirv/invocation.hpp | 40 ++
4
Signed-off-by: Pierre Moreau
---
.../state_trackers/clover/spirv/spirv.hpp11| 952 +
1 file changed, 952 insertions(+)
create mode 100644 src/gallium/state_trackers/clover/spirv/spirv.hpp11
diff --git a/src/gallium/state_trackers/clover/spirv/spirv.hpp11
b/src
Signed-off-by: Pierre Moreau
---
src/gallium/state_trackers/clover/core/device.cpp | 11 +++
src/gallium/state_trackers/clover/core/device.hpp | 3 +++
2 files changed, 14 insertions(+)
diff --git a/src/gallium/state_trackers/clover/core/device.cpp
b/src/gallium/state_trackers/clover
OpenCL 2.1 gives the ability to query for a program’s IL, which is
returned as a pointer.
Signed-off-by: Pierre Moreau
---
.../state_trackers/clover/core/property.hpp| 39 ++
1 file changed, 39 insertions(+)
diff --git a/src/gallium/state_trackers/clover/core
Signed-off-by: Pierre Moreau
---
src/gallium/state_trackers/clover/core/program.cpp | 19 ++-
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/src/gallium/state_trackers/clover/core/program.cpp
b/src/gallium/state_trackers/clover/core/program.cpp
index 15d559cd93
Creating a program using clCreateProgramWithSource to SPIR-V requires a
non-upstreamed version of LLVM and clang, therefore it is currently not
supported.
Signed-off-by: Pierre Moreau
---
src/gallium/state_trackers/clover/core/program.cpp | 4
1 file changed, 4 insertions(+)
diff --git a
Signed-off-by: Pierre Moreau
---
src/gallium/state_trackers/clover/core/kernel.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/state_trackers/clover/core/kernel.cpp
b/src/gallium/state_trackers/clover/core/kernel.cpp
index 4716705323..328323b6b0 100644
--- a/src/gallium
Signed-off-by: Pierre Moreau
---
src/gallium/state_trackers/clover/api/program.cpp | 35 ---
1 file changed, 25 insertions(+), 10 deletions(-)
diff --git a/src/gallium/state_trackers/clover/api/program.cpp
b/src/gallium/state_trackers/clover/api/program.cpp
index 9d59668f8f
Signed-off-by: Pierre Moreau
---
src/gallium/state_trackers/clover/api/program.cpp | 10 ++
1 file changed, 10 insertions(+)
diff --git a/src/gallium/state_trackers/clover/api/program.cpp
b/src/gallium/state_trackers/clover/api/program.cpp
index 57b8aedb91..5357724939 100644
--- a/src
Signed-off-by: Pierre Moreau
---
src/gallium/state_trackers/clover/api/program.cpp | 29 ++-
src/gallium/state_trackers/clover/core/program.cpp | 57 --
src/gallium/state_trackers/clover/core/program.hpp | 14 ++
3 files changed, 95 insertions(+), 5 deletions
> hopefully this[1] will eventually happen, which would make this less
> of an issue :-)
>
> [1] http://lists.llvm.org/pipermail/llvm-dev/2017-May/112538.html
Indeed! I have seen that thread and made sure to subscribe to the ML not to
miss anything there.
_
This seems like a good idea. I changed the code locally to use
`pipe_llvm_program_header` instead; it does not seem worth it to create a
`pipe_spirv_program_header`, since it would only contain a `num_bytes`
attributes for now.
signature.asc
Description: PGP signature
Signed-off-by: Pierre Moreau
---
src/gallium/drivers/nouveau/codegen/nv50_ir.cpp | 2 +-
src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h | 7 +--
src/gallium/drivers/nouveau/nouveau_compiler.c | 2 +-
src/gallium/drivers/nouveau/nv50/nv50_program.c | 4 +++-
src/gallium
Signed-off-by: Pierre Moreau
---
src/gallium/drivers/nouveau/codegen/nv50_ir.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
index b67a1ddbd5..1f640a348a 100644
--- a
This code was merged commented out, and has stayed that way ever since.
Signed-off-by: Pierre Moreau
---
src/gallium/drivers/nouveau/codegen/nv50_ir.cpp | 12 +++-
src/gallium/drivers/nouveau/codegen/nv50_ir.h | 1 -
2 files changed, 3 insertions(+), 10 deletions(-)
diff --git a/src
1 - 100 of 310 matches
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