Series is
Reviewed-by: Chad Versace
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On Wed 15 Feb 2017, Emil Velikov wrote:
> On 14 February 2017 at 21:02, Chad Versace wrote:
> > On Tue 14 Feb 2017, Kenneth Graunke wrote:
> >> On Tuesday, February 14, 2017 12:38:45 PM PST Chad Versace wrote:
> >> > On Tue 14 Feb 2017, Matt Turner wrote:
>
l/isl.c | 72
> +---
> src/intel/isl/isl.h | 4 +--
> src/intel/vulkan/anv_image.c | 5 +--
> 3 files changed, 40 insertions(+), 41 deletions(-)
Thank you for adding my bool's back to the h
27;t mind keeping
> that. Also, I like that the end result of the restriction is clearly
> spelled out with the old check. I can't say that I care all that much one
> way or the other so long as both the effect (16x 16k surfaces not working)
> and the reason (pitch) are docum
ew->image->aux_surface.isl.size == 0, then the next branch checks
iview->image->aux_usage. It seems more natural to check aux_usage in
both branches.
Anyway, that nit fixup belongs in a different commit anyway, for
bisection's sake.
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On Wed 22 Feb 2017, Jason Ekstrand wrote:
> On Wed, Feb 22, 2017 at 11:09 AM, Chad Versace
> wrote:
>
> > On Mon 20 Feb 2017, Jason Ekstrand wrote:
> > > This just enables basic MSAA compression (no fast clears) for all
> > > multisampled surfaces. This imp
| 7 +++
> src/util/build_id.h | 5 ++---
> 3 files changed, 6 insertions(+), 8 deletions(-)
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On Fri 24 Feb 2017, Jason Ekstrand wrote:
> This prevents a user from using a cache created on one hardware
> generation on a different one. Of course, with Intel hardware, this
> requires moving their drive from one machine to another but it's still
> possible and we should prevent it.
Or if you
On Mon 27 Feb 2017, Jason Ekstrand wrote:
> We've been following the spec changes.
Yup, we have ;) Let's chat on irc today about how to handle the KHX
extensions.
Reviewed-by: Chad Versace
> ---
> src/intel/vulkan/anv_device.c | 2 +-
> 1 file changed, 1 insertion(+), 1
On Mon 27 Feb 2017, Jason Ekstrand wrote:
> On Mon, Feb 27, 2017 at 9:38 AM, Chad Versace
> wrote:
>
> > On Fri 24 Feb 2017, Jason Ekstrand wrote:
> > > This prevents a user from using a cache created on one hardware
> > > generation on a different one. Of
SHA-1 */
>return false;
>
> - memcpy(uuid, build_id_data(note), VK_UUID_SIZE);
> + uint8_t sha1[20];
> + STATIC_ASSERT(VK_UUID_SIZE <= sizeof(sha1));
> + struct mesa_sha1 *sha1_ctx = _mesa_sha1_init();
> + if (sha1_ctx
ese extensions add experimental
> support image and memory sharing between two Vulkan instances. Since
> they're experimental, it's a bit up-for-debate as to whether or not we
> should actually merge them into master. This cover letter seems as good a
> place as any to hol
return vk_errorf(VK_ERROR_INITIALIZATION_FAILED,
> + "build-id too short. It needs to be a SHA");
> + }
s/a SHA/a SHA1/
With that,
Reviewed-by: Chad Versace
>
> uint8_t sha1[20];
> STATIC_ASSERT(VK_UUID_SIZE <= sizeof(sha1));
> s
nv_private.h| 2 +-
> 3 files changed, 6 insertions(+), 5 deletions(-)
Yup.
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On Mon 27 Feb 2017, Jason Ekstrand wrote:
> ---
> src/util/vk_util.h | 17 +
> 1 file changed, 17 insertions(+)
Patch 4 if
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On Mon 27 Feb 2017, Chad Versace wrote:
> For anyone reading the new extension specs and asking "Wait? What's this
> OPAQUE_FD thing? And why do we have memory import/export for Win32
> handles but not for dma_bufs?".
>
> There does exist a dma_buf extension, VK
handle types.
> ---
> src/intel/vulkan/anv_device.c | 6 +-
> src/intel/vulkan/anv_entrypoints_gen.py | 1 +
> 2 files changed, 6 insertions(+), 1 deletion(-)
Patch 6 is
Reviewed-by: Chad Versace
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This is a complete but trivial implementation. It's trivial becasue We
support no external memory capabilities yet. Most of the real work in
this commit is in reworking the UUIDs advertised by the driver.
v2 (chadv):
- Fix chain traversal in vkGetPhysicalDeviceImageFormatProperties2KHR.
Ext
-authored-with: Chad Versace
---
On my branch wip/anv-external-memory.
http://git.kiwitree.net/cgit/~chadv/mesa/log/?h=wip/anv-external-memory
src/intel/vulkan/anv_device.c | 90 +
src/intel/vulkan/anv_entrypoints_gen.py | 1 +
src/intel/vulkan
On Wed 22 Jul 2015, Jason Ekstrand wrote:
> This needs a *lot* more commentary. These calculations are extremely
> tricky and there are almost no comments. For instance, you are
> turning a 2D offset on a tiled surface into a new 2D address into the
> raw view of the surface. Nowhere do you expl
On Tue 28 Jul 2015, Emil Velikov wrote:
> Hello Jim,
>
> On 28 July 2015 at 02:57, Bish, Jim wrote:
> > From: Jim Bish
> >
> Would you mind splitting this into separate patches ? Adding a few
> words in the commit log(s) would be highly preferable.
Yes, please submit separate patches. "One patc
On Tue 11 Aug 2015, Nanley Chery wrote:
> From: Nanley Chery
>
> Only uncompressed formats have a non-void type and actual components per
> pixel.
> Rename _mesa_format_to_type_and_comps to
> _mesa_uncompressed_format_to_type_and_comps and require callers to check if
> the format is not compress
On Tue 11 Aug 2015, Nanley Chery wrote:
> From: Nanley Chery
>
> All compressed formats return GL_FALSE. Remove all switch cases for
> compressed formats. Compressed formats should be at the bottom of
> the switch statement, so ordering is still preserved.
>
> Cc: Jason Ekstrand
> Signed-off-by
a certain category of compressed formats.
>
> Regards,
> Nanley
I like the idea of declaring the compression family as a type of texture
layout.
Patch 3/4 is
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http:
--
> 1 file changed, 17 insertions(+), 135 deletions(-)
I checked every line in this patch and found no errors.
Patch 4/4 is
Reviewed-by: Chad Versace
As an aside... Do you think the format's datatype be stored directly in
the Mesa's format info table? It seems strange that Mesa maintain
On Fri 14 Aug 2015, Chris Wilson wrote:
> On Thu, Aug 13, 2015 at 09:58:52PM -0700, Kenneth Graunke wrote:
> > On Thursday, August 13, 2015 02:57:20 PM Martin Peres wrote:
> > > On 07/08/15 23:13, Chris Wilson wrote:
> > > > intel_update_winsys_renderbuffer_miptree() will release the existing
> > >
k, because
glCopyTexImage*D is unable copy pixels to an ASTC texture.
Other than that, this patch looks good to me. Fix that and it's
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On Tue 28 Jul 2015, Nanley Chery wrote:
> From: Nanley Chery
>
> According to the spec, Tex*Storage* commands are supported if the GL
> implementation has support for immutable textures.
>
> Signed-off-by: Nanley Chery
> ---
> src/mesa/main/texformat.c | 56
> +
On Thu 13 Aug 2015, Nanley Chery wrote:
> From: Nanley Chery
>
> The ASTC spec was revised as follows:
>
>Revision 2, April 28, 2015 - added CompressedTex{Sub,}Image3D to
>commands accepting ASTC format tokens in the New Tokens section [...].
>
> Support only exists in the HDR submode:
>
>
> >
> > On Fri, Aug 14, 2015 at 4:00 PM, Chad Versace
> > wrote:
> >
> >> On Tue 11 Aug 2015, Nanley Chery wrote:
> >> > From: Nanley Chery
> >> >
> >> > Only uncompressed formats have
formats.h | 2 +-
> src/mesa/main/mipmap.c | 2 +-
> 4 files changed, 46 insertions(+), 49 deletions(-)
Patch 1/2 is
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On Wed 19 Aug 2015, Nanley Chery wrote:
> From: Nanley Chery
>
> We currently check that our format info table is sane during context
> initialization in debug builds. Perform this check during
> `make check` instead. This enables format testing in release builds
> and removes the requirement of
is removed, add a gtest to ensure
> all formats are handled.
> v3. Ensure that GL_NO_ERROR is set before returning.
>
> Cc: Brian Paul
> Cc: Chad Versace
> Signed-off-by: Nanley Chery
> ---
> src/mesa/drivers/dri/i915/intel_pixel_read.c | 2 +-
> src/mesa/drivers
On Mon 24 Aug 2015, Nanley Chery wrote:
> On Fri, Aug 21, 2015 at 2:12 PM, Chad Versace
> wrote:
>
> > On Wed 19 Aug 2015, Nanley Chery wrote:
> > > From: Nanley Chery
> > >
> > > We currently check that our format info table is sane during context
>
is removed, add a gtest to ensure
> all formats are handled.
> v3. Ensure that GL_NO_ERROR is set before returning.
> v4. Fix an arg to _mesa_uncompressed_format_to_type_and_comps();
> fix formatting and misc improvements (Chad).
>
> Cc: Brian Paul
> Cc: Chad Versace
&
On Tue 25 Aug 2015, Nanley Chery wrote:
> From: Nanley Chery
>
> Enables _mesa_target_can_be_compressed to return the appropriate GL error
> depending on it's inputs. Use the parameter to return the appropriate GL error
> for ETC2 formats on GLES3.
>
> Suggested-by:
_astc_format().
> v4. use _mesa_is_astc_format().
> v5. place logic in _mesa_target_can_be_compressed.
> v6. fix issues handling ASTC formats.
>
> Signed-off-by: Nanley Chery
> ---
> src/mesa/main/teximage.c | 63
> +++++
On Sun 16 Aug 2015, Nanley Chery wrote:
> The last line of the commit message should say:
>
>GL_RGBA4_S3TC (0x83A3) -> COMPRESSED_RGBA_S3TC_DXT5_EXT (0x83F3)
There's another weird line too, see below.
> On Wed, Aug 12, 2015 at 4:19 PM, Nanley Chery wrote:
>
> > From: Nanley Chery
> >
>
On Wed 26 Aug 2015, Nanley Chery wrote:
> From: Nanley Chery
>
> MESA_FORMAT_RGBA_DXT5 should actually be reserved for GL_RGBA[4]_DXT5_S3TC.
> Also, Gallium and other dri drivers (radeon and nouveau) follow this mapping
> scheme.
>
> Cc: Brian Paul
> Cc: Chad Ver
:
>
> > From: Nanley Chery
> >
> > This function's cases for non-generic compressed formats duplicate
> > the GL to MESA translation in _mesa_glenum_to_compressed_format().
> > This patch replaces the switch cases with a call to the translation
> > fu
On Tue 13 Sep 2016, Nanley Chery wrote:
> On Wed, Sep 07, 2016 at 03:51:14PM -0700, Chad Versace wrote:
> > On Wed 07 Sep 2016, Nanley Chery wrote:
> > > On Fri, Sep 02, 2016 at 11:42:24AM -0700, Chad Versace wrote:
> > > > On Thu 01 Sep 2016, Jason Ekstrand wrote:
Ekstrand
> ---
> src/intel/isl/isl_surface_state.c | 8 ++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
Reviewed-by: Chad Versace
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> + case ISL_DIM_LAYOUT_GEN4_3D:
> + /* QPitch doesn't make sense for ISL_DIM_LAYOUT_GEN4_3D since it uses a
> + * different pitch at each LOD. Also, the QPitch field is ignored for
> + * these surfaces.
Yep.
Reviewed-by: Chad Versace
_
;s needed on SKL, and are deferring the
workaround on the other gens until you had a chance to test it on them?
Either way, the patch is sound. And the workaround doesn't surprise me.
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tform_surfaceless.txt
b/docs/specs/EGL_MESA_platform_surfaceless.txt
new file mode 100644
index 000..b700370
--- /dev/null
+++ b/docs/specs/EGL_MESA_platform_surfaceless.txt
@@ -0,0 +1,108 @@
+Name
+
+MESA_platform_surfaceless
+
+Name Strings
+
+EGL_MESA_platform_surfaceless
+
+Contributo
On Mon 26 Sep 2016, Nanley Chery wrote:
> On Mon, Sep 19, 2016 at 01:49:09PM -0700, Nanley Chery wrote:
> > On Fri, Sep 02, 2016 at 03:16:21PM -0700, Chad Versace wrote:
> > > On Wed 31 Aug 2016, Nanley Chery wrote:
> > > > From: Chad Versace
> > > &
On Mon 26 Sep 2016, Nanley Chery wrote:
> From: Jason Ekstrand
>
> Nanley Chery (amend):
> - Change memset value from 0xff to 0 (a defined value for HiZ).
>
> Signed-off-by: Nanley Chery
>
> ---
>
> v2. Add asserts (Jason)
> Handle NULL return val
On Mon 26 Sep 2016, Nanley Chery wrote:
> From: Nanley Chery
>
> Provides an FPS increase of ~30% on the Sascha triangle and multisampling
> demos.
>
> Clears that happen within a render pass via vkCmdClearAttachments are safe
> even if the clear color changes. This is because the meta implement
On Mon 26 Sep 2016, Nanley Chery wrote:
> From: Chad Versace
>
> Nanley Chery:
> (rebase)
> - Use isl_surf_get_hiz_surf()
> (amend)
> - Only add a HiZ surface onto a depth/stencil attachment
> - Add comment above HiZ surface addition
> - Hide HiZ behind INTEL_VK_HI
On Mon 26 Sep 2016, Nanley Chery wrote:
> Create a function that performs one of three HiZ operations -
> depth/stencil clears, HiZ resolve, and depth resolves.
>
> Signed-off-by: Nanley Chery
>
> ---
>
> v2. Add documentation
> Fix the alignment check
> Don't minify clear rectangle (Ja
On Mon 26 Sep 2016, Nanley Chery wrote:
> From: Chad Versace
>
> Nanley Chery:
> (rebase)
> - Resolve conflicts with new anv_batch_emit macro
> (amend)
> - Handle a QPitch TODO
> - Emit 3DSTATE_HIER_DEPTH_BUFFER on pre-BDW systems
> - Only use HiZ for single-sub
On Tue 27 Sep 2016, Nanley Chery wrote:
> On Tue, Sep 27, 2016 at 11:00:21AM -0700, Chad Versace wrote:
> > As a consequence of that reasoning, we should set
> > 3DSTATE_CLEAR_PARAMS.DepthClearValueValid = 1
> > whenever hiz is enabled, even if we don't care ab
unctional.fence_sync.* deadlock 27/0
dEQP-EGL.functional.reusable_sync.* : 8/17 8/17
piglit egl_khr_fence_sync pass pass
This series lives at
git://git.kiwitree.net/~chadv/mesa review/fences-v02
Chad Versace (7):
egl: Fix missing unlock in eglGetSync
This function converts an attribute list from EGLint[] to EGLAttrib[].
Will be used in following patches to cleanup EGLSync attribute parsing.
---
src/egl/main/eglapi.c | 41 +
src/egl/main/eglapi.h | 2 ++
2 files changed, 43 insertions(+)
diff --git a/sr
On the error path, eglGetSyncAttribKHR neglected to unlock the
EGLDisplay before returning.
Fixes deadlock in dEQP-EGL.functional.fence_sync.invalid.get_invalid_value.
Cc: mesa-sta...@lists.freedesktop.org
Cc: Mark Janes
---
src/egl/main/eglapi.c | 2 +-
1 file changed, 1 insertion(+), 1 deleti
_eglInitSync checked that the display supported the sync type (such as
EGL_SYNC_FENCE), and did it wrong. When the check failed it emitted
EGL_BAD_ATTRIBUTE, but sometimes EGL_BAD_PARAMETER is needed.
_eglCreateSync already does the error checking, and it does it right.
---
src/egl/main/eglsync.c
When the user called eglCreateSync64KHR on a display without
EGL_KHR_cl_event2 (the only extension that exposes it), we returned
EGL_NO_SYNC but did not update the error code.
We also did the same for eglCreateSync on a display without EGL 1.5.
---
src/egl/main/eglapi.c | 14 --
1 fil
When the function encountered an error, it effectively returned
immediately. However, it did so indirectly by breaking out of a loop.
Replace the loop breakout with a explicit 'return'.
Do the same for _eglParseSyncAttribList64 too.
---
src/egl/main/eglsync.c | 14 --
1 file changed,
Pre-patch, there were two code paths for parsing EGLSync attribute
lists: one path for old-style EGLint lists, used by eglCreateSyncKHR,
and another for new-style EGLAttrib lists, used by eglCreateSync (1.5)
and eglCreateSync64 (EGL_KHR_cl_event2).
There were two attrib_list parsing functions,
_
The function stores EGLAttrib values in EGLint variables. On 64-bit
systems, this truncated the values.
Cc: mesa-sta...@lists.freedesktop.org
---
src/egl/main/eglsync.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/src/egl/main/eglsync.c b/src/egl/main/eglsync.c
index
Cacheing the signal status complicates the code for questionable
performance benefit. I added the cacheing long ago, and I now think it
was the wrong decision.
When we later add support for fences based on sync fds (that is, a fd
backed by struct sync_file in Linux 4.8), the cacheing becomes even
The function is tiny and called exactly once. There's no need for it.
---
src/mesa/drivers/dri/i965/intel_syncobj.c | 25 ++---
1 file changed, 6 insertions(+), 19 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_syncobj.c
b/src/mesa/drivers/dri/i965/intel_syncobj.c
We locked an unitialized mutex in the callstack
glClientWaitSync
intel_gl_client_wait_sync
brw_fence_client_wait_sync
because we forgot to initialize it in intel_gl_fence_sync.
(The EGLSync codepath didn't have this bug. It initialized the mutex in
intel_dri_create_sync).
We also forgo
What is the difference between a 'driver_fence' and a 'fence'? Do the
characters 'driver_' add anything helpful? Nope. They do, though, add an
extra 7 chars and pull your eyeballs away to ask "huh? what's that?" one
microsecond too many.
---
src/mesa/drivers/dri/i965/brw_sync.c | 12 ++--
---
src/mesa/drivers/dri/i965/Makefile.sources| 2 +-
src/mesa/drivers/dri/i965/brw_context.h | 2 +-
src/mesa/drivers/dri/i965/{intel_syncobj.c => brw_sync.c} | 0
3 files changed, 2 insertions(+), 2 deletions(-)
rename src/mesa/drivers/dri/i965/{intel_syncobj.c
v/mesa/log/?h=review/brw-sync-v01
Chad Versace (6):
i965/sync: Fix uninitalized usage and leak of mutex
i965/sync: Stop cacheing fence's signal status
i965/sync: Fold brw_fence_has_completed() into caller
i965/sync: Replace 'intel' prefix with 'brw'
i965/sync: R
'intel' is s yesterday ;)
This is yet another patch for the great renaming begun long ago.
---
src/mesa/drivers/dri/i965/brw_context.c | 2 +-
src/mesa/drivers/dri/i965/brw_context.h | 2 +-
src/mesa/drivers/dri/i965/intel_syncobj.c | 70 +++
3 files changed,
On Tue 27 Sep 2016, Chad Versace wrote:
> Test results of dEQP-EGL.functional.gles2.multithread.* on Skylake,
> using deqp-egl directly (no Piglit):
>
> * Before:
> Bajillions of failures and randomly occuring crashes. The
> testrun died on me on 10/10 tri
On Wed 28 Sep 2016, Chris Wilson wrote:
> On Tue, Sep 27, 2016 at 11:51:18PM -0700, Chad Versace wrote:
> > Test results of dEQP-EGL.functional.gles2.multithread.* on Skylake,
> > using deqp-egl directly (no Piglit):
> >
> > * Before:
> > Bajillions
On Thu 29 Sep 2016, Emil Velikov wrote:
> On 28 September 2016 at 07:28, Chad Versace wrote:
>
> > + if (sizeof(int_list[0]) == sizeof(attrib_list[0])) {
> > + attrib_list = (EGLAttrib *) int_list;
> > + } else {
> > + err = _eglConvertIntsTo
On Thu 29 Sep 2016, Emil Velikov wrote:
> On 28 September 2016 at 07:28, Chad Versace wrote:
> > Pre-patch, there were two code paths for parsing EGLSync attribute
> > lists: one path for old-style EGLint lists, used by eglCreateSyncKHR,
> > and another for new-style EGL
On Sun 02 Oct 2016, Kenneth Graunke wrote:
> On Tuesday, September 27, 2016 11:51:20 PM PDT Chad Versace wrote:
> > Cacheing the signal status complicates the code for questionable
> > performance benefit. I added the cacheing long ago, and I now think it
> > was the wrong de
We locked an unitialized mutex in the callstack
glClientWaitSync
intel_gl_client_wait_sync
brw_fence_client_wait_sync
because we forgot to initialize it in intel_gl_fence_sync.
(The EGLSync codepath didn't have this bug. It initialized the mutex in
intel_dri_create_sync).
We also forgo
What is the difference between a 'driver_fence' and a 'fence'? Do the
characters 'driver_' add anything helpful? Nope. They do, though, add an
extra 7 chars and pull your eyeballs away to ask "huh? what's that?" one
microsecond too many.
---
src/mesa/drivers/dri/i965/brw_sync.c | 12 ++--
I'm preparing to implement EGL_ANDROID_native_fence_sync, and I wanted
to land these fixes and cleanups before doing the real work.
Patch 1 is a bugfix. The other patches are cleanups.
This series lives at
http://git.kiwitree.net/cgit/~chadv/mesa/log/?h=review/brw-sync-v02
Chad Versa
This is yet another patch for the great renaming begun long ago.
---
src/mesa/drivers/dri/i965/brw_context.c | 2 +-
src/mesa/drivers/dri/i965/brw_context.h | 2 +-
src/mesa/drivers/dri/i965/intel_syncobj.c | 70 +++
3 files changed, 37 insertions(+), 37 deletions
---
src/mesa/drivers/dri/i965/Makefile.sources| 2 +-
src/mesa/drivers/dri/i965/brw_context.h | 2 +-
src/mesa/drivers/dri/i965/{intel_syncobj.c => brw_sync.c} | 0
3 files changed, 2 insertions(+), 2 deletions(-)
rename src/mesa/drivers/dri/i965/{intel_syncobj.c
gt;> On Tue, Sep 27, 2016 at 03:12:17PM -0700, Chad Versace wrote:
> > >> > On Tue 27 Sep 2016, Nanley Chery wrote:
> > >> > > On Tue, Sep 27, 2016 at 11:00:21AM -0700, Chad Versace wrote:
> > >> >
> > >> > > > As a consequence
On Tue 27 Sep 2016, Nanley Chery wrote:
> On Tue, Sep 27, 2016 at 11:00:14AM -0700, Chad Versace wrote:
> > On Mon 26 Sep 2016, Nanley Chery wrote:
> > > Create a function that performs one of three HiZ operations -
> > > depth/stencil clears, HiZ resolve, and depth re
On Wed 05 Oct 2016, Emil Velikov wrote:
> On 4 October 2016 at 22:31, Chad Versace wrote:
> > On Thu 29 Sep 2016, Emil Velikov wrote:
> >> On 28 September 2016 at 07:28, Chad Versace
> >> wrote:
> >> > Pre-patch, there were two code paths for parsing EGLSy
Pre-patch, there were two code paths for parsing EGLSync attribute
lists: one path for old-style EGLint lists, used by eglCreateSyncKHR,
and another for new-style EGLAttrib lists, used by eglCreateSync (1.5)
and eglCreateSync64 (EGL_KHR_cl_event2).
There were two attrib_list parsing functions,
_
On Thu 06 Oct 2016, Emil Velikov wrote:
> Hi Chad,
>
> On 4 October 2016 at 23:37, Chad Versace wrote:
> > We locked an unitialized mutex in the callstack
> > glClientWaitSync
> > intel_gl_client_wait_sync
> > brw_fence_client_wait_sync
> >
ental Depth Pipecontrol TODO
> Comment on variable naming
>
> src/intel/vulkan/anv_genX.h| 3 +
> src/intel/vulkan/gen7_cmd_buffer.c | 7 ++
> src/intel/vulkan/gen8_cmd_buffer.c | 187
> +++++
>
On Thu 06 Oct 2016, Jason Ekstrand wrote:
> Nice and clean! R-b still applies.
>
> I think I've reviewed everything now. If there's still something missing, let
> me know. May also want to give Chad a chance.
I agree. Nice and clean.
Rev
On Thu 06 Oct 2016, Nanley Chery wrote:
> Signed-off-by: Nanley Chery
> Reviewed-by: Jason Ekstrand
> ---
> src/intel/vulkan/TODO | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Chad Versace
Woo! It's done!
$(AM_V_GEN) echo -n "static const uint8_t " > $@; \
> - sed -e 's,_xml.h,,' <<< "`basename $@`_xml[] = {" >> $@; \
> + echo "`basename $@`_xml[] = {" | sed -e 's,_xml.h,,' >> $@; \
> cat $< | $(
From: Rob Clark
Reduce the noise in the next patch. For EGL_SYNC_NATIVE_FENCE_ANDROID
the sync condition is conditional on EGL_SYNC_NATIVE_FENCE_FD_ANDROID
attribute.
Signed-off-by: Rob Clark
---
src/egl/main/eglsync.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
From: Rob Clark
Required to implement EGL_ANDROID_native_fence_sync.
Signed-off-by: Rob Clark
---
include/GL/internal/dri_interface.h | 44 -
1 file changed, 43 insertions(+), 1 deletion(-)
diff --git a/include/GL/internal/dri_interface.h
b/include/GL/inte
From: Chad Versace
Don't set SyncCondition twice.
---
src/egl/main/eglsync.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/egl/main/eglsync.c b/src/egl/main/eglsync.c
index ccfa474..b1b8c43 100644
--- a/src/egl/main/eglsync.c
+++ b/src/egl/main/eglsync.c
@@ -93,7 +93,6 @@ _eglIni
From: Rob Clark
[chadv]: Resolve rebase conflicts.
Signed-off-by: Rob Clark
---
src/egl/drivers/dri2/egl_dri2.c | 49 +
src/egl/main/eglapi.c | 36 +++---
src/egl/main/eglapi.h | 2 ++
src/egl/main/egldisplay.
h=wip/fences
libdrm: If you want to build this, you also need my libdrm branch:
http://cgit.kiwitree.net/~chadv/libdrm/log/?h=wip/fences
kernel: I have a kernel branch too where I collect other people's
patches. Be warned: if you run it, it will eat your machine'
From: Chad Versace
A variant of intel_batchbuffer_flush() with parameters for in and out
fence fds.
---
src/mesa/drivers/dri/i965/intel_batchbuffer.c | 25 +++--
src/mesa/drivers/dri/i965/intel_batchbuffer.h | 14 --
2 files changed, 27 insertions(+), 12
This a refactor patch; no expected changed in behavior.
Add `enum brw_fence_type` and brw_fence::type. There is only one type
currently, BRW_FENCE_TYPE_BO_WAIT. This patch reduces a lot of noise in
the next, which adds new type BRW_FENCE_TYPE_SYNC_FD.
---
src/mesa/drivers/dri/i965/brw_sync.c | 10
Add EGL_KHR_debug tracing to eglDupNativeFenceFDANDROID, because all EGL
entrypoints support tracing now.
---
src/egl/main/eglapi.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/egl/main/eglapi.c b/src/egl/main/eglapi.c
index 3c0b017..449a2be 100644
--- a/src/egl/main/eglapi.c
+++ b/sr
From: Chad Versace
Close the sync fd *after* the sync's refcount drops to 0.
---
src/egl/drivers/dri2/egl_dri2.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index 0c15c85..70ee270 1
From: Chad Versace
This bool maps to I915_PARAM_HAS_EXEC_FENCE_FD.
TODO: The i915 param is not yet upstream. Wait for the kernel interface
before committing.
---
src/mesa/drivers/dri/i965/intel_screen.c | 3 +++
src/mesa/drivers/dri/i965/intel_screen.h | 2 +-
2 files changed, 4 insertions
Pre-patch, brw_sync.c ignored the return value of
intel_batchbuffer_flush().
When intel_batchbuffer_flush() fails during eglCreateSync
(brw_dri_create_fence), we now give up, cleanup, and return NULL.
When it fails during glFenceSync, however, we blindly continue and hope
for the best because the
Rename to brw_fence_insert_locked(). This is correct because the fence's
mutex is effectively locked, as all callers are also *creators* of the
fence, and have not yet returned the new fence.
This reduces noise in the next patch, which defines and uses
brw_fence_insert(), an unlocked variant.
---
This patch implements a new type of struct brw_fence, one that is based
struct sync_file.
This completes support for EGL_ANDROID_native_fence_sync.
* Background
Linux 4.7 added a new file type, struct sync_file. See
commit 460bfc41fd52959311ed0328163f785e023857af
Author: Gustavo Pado
On Tue 11 Oct 2016, Emil Velikov wrote:
> On 10 October 2016 at 20:41, Rob Clark wrote:
> > On Mon, Oct 10, 2016 at 1:43 PM, Chad Versace
> > wrote:
> >> Testing:
> >>
> >> I haven't yet tested EGL_ANDROID_native_fence_sync with these patch
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