Re: [Mesa-dev] [PATCH] intel: Add more PCI Device IDs for Coffee Lake and Ice Lake.

On Tue, Feb 19, 2019 at 09:36:14AM -0800, Rodrigo Vivi wrote: > On Mon, Feb 18, 2019 at 04:54:34PM +1100, Jonathan Gray wrote: > > Compared to linux and libdrm Mesa is missing a VLV and ICL id. > > > > 0x0f30 > > ff049b6ce21d2814451afd4a116d001712e0116b > > drm/i915: bind driver to ValleyView chip

[Mesa-dev] [Bug 109535] [Tracker] Mesa 19.0 release tracker

https://bugs.freedesktop.org/show_bug.cgi?id=109535 erhar...@mailbox.org changed: What|Removed |Added Depends on||109615 Referenced Bugs: https:/

[Mesa-dev] [Bug 109615] 19.0.0_rc4 fails u_format_test on ppc64

https://bugs.freedesktop.org/show_bug.cgi?id=109615 erhar...@mailbox.org changed: What|Removed |Added Blocks||109535 Referenced Bugs: https:/

Re: [Mesa-dev] [PATCH] i965: fixed clamping in set_scissor_bits when the y is flipped

On Tue, 19 Feb 2019 16:27:56 -0800 Nanley Chery wrote: > On Mon, Dec 10, 2018 at 12:42:40PM +0200, Eleni Maria Stea wrote: > > Calculating the scissor rectangle fields with the y flipped (0 on > > top) can generate negative values that will cause assertion failure > > later on as the scissor fiel

[Mesa-dev] [PATCH v2] i965: fixed clamping in set_scissor_bits when the y is flipped

Calculating the scissor rectangle fields with the y flipped (0 on top) can generate negative values that will cause assertion failure later on as the scissor fields are all unsigned. We must clamp the bbox values again to make sure they don't exceed the fb_height. Also fixed a calculation error. B

Re: [Mesa-dev] [PATCH v3] gallium/auxiliary/vl: Fix transparent issue on compute shader with rgba

Hi Filipe, Can I have your name in the Tested-by list for this patch? Thanks! James Zhu On 2019-02-15 4:19 p.m., Zhu, James wrote: Fixes: 9364d66cb7f7 (Add video compositor compute shader render) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109646 Problem 1,4: they are caused by imc

Re: [Mesa-dev] A few NIR compile time optimisations

On Wed, Feb 20, 2019 at 2:31 AM Connor Abbott wrote: > > > On Wed, Feb 20, 2019 at 4:29 AM Marek Olšák wrote: > >> On Tue, Feb 19, 2019 at 7:57 PM Rob Clark wrote: >> >>> On Tue, Feb 19, 2019 at 6:49 PM Marek Olšák wrote: >>> > >>> > st_link_shader takes 55% of CPU time with NIR, and 9% with T

Re: [Mesa-dev] [Piglit] GitLab migration of Piglit

Given the discussion below, I think we'll make piglit a sub-project of mesa.  Those who need commit access to piglit but not mesa can be added directly to the piglit project. Hi list. Since piglit was also moved to the gitlab, same with mesa, our team is interested in process workflow for con

Re: [Mesa-dev] [PATCH] spirv: handle function pointer returns.

This doesn't apply to master. shader_info doesn't have ptr_size yet. On Tue, Feb 19, 2019 at 7:38 PM Dave Airlie wrote: > From: Dave Airlie > > This was hardcoded to 32, use the physical bit size we setup. > > Signed-off-by: Dave Airlie > --- > src/compiler/spirv/vtn_cfg.c | 2 +- > 1 file c

Re: [Mesa-dev] [PATCH v3] gallium/auxiliary/vl: Fix transparent issue on compute shader with rgba

Tested-by: Bruno Filipe ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] anv: advertise 8 subpixel precision bits

On one side, when emitting 3DSTATE_SF, VertexSubPixelPrecisionSelect is used to select between 8 bit subpixel precision (value 0) or 4 bit subpixel precision (value 1). As this value is not set, means it is taking the value 0, so 8 bit are used. On the other side, in the Vulkan CTS tests, if the r

Re: [Mesa-dev] A few NIR compile time optimisations

Hi, On 20.2.2019 17.32, Marek Olšák wrote: On Wed, Feb 20, 2019 at 2:31 AM Connor Abbott On Wed, Feb 20, 2019 at 4:29 AM Marek Olšák ... That's a harsh reaction to a relatively good benchmarking setup. I use debugoptimized with -DDEBUG. My performance is probably mor

Re: [Mesa-dev] [PATCH] anv: advertise 8 subpixel precision bits

Could we please also add a line which explicitly sets the precision in 3DSTATE_SF? That way it's clearer from the code what's going on. On Wed, Feb 20, 2019 at 11:19 AM Juan A. Suarez Romero wrote: > On one side, when emitting 3DSTATE_SF, VertexSubPixelPrecisionSelect is > used to select betwee

Re: [Mesa-dev] [PATCH] nir: remove non-ssa support from nir_copy_prop()

Reviewed-by: Jason Ekstrand On Wed, Feb 20, 2019 at 12:30 AM Timothy Arceri wrote: > Even in a very basic shader this reduces the time spent in > nir_copy_prop() by ~17%. > > No shader-db changes for radeonsi NIR or i965. > --- > src/compiler/nir/nir_opt_copy_propagate.c | 41 +++--

[Mesa-dev] [Bug 109615] 19.0.0_rc4 fails u_format_test on ppc64

https://bugs.freedesktop.org/show_bug.cgi?id=109615 --- Comment #5 from Matt Turner --- Right, the tests were enabled by commit 54abd2e0844edf005510cb50b001cde8cf0366b7 Author: Eric Anholt Date: Thu Jan 24 09:36:56 2019 -0800 gallium: Enable unit tests as actual meson unit tests. Th

[Mesa-dev] [Bug 109532] ir_variable has maximum access out of bounds -- but it's not out of bounds

https://bugs.freedesktop.org/show_bug.cgi?id=109532 --- Comment #33 from Ian Romanick --- (In reply to andrii simiklit from comment #32) > (In reply to andrii simiklit from comment #31) > > (In reply to Mark Janes from comment #30) > > > (In reply to Mark Janes from comment #28) > > > > > > >

[Mesa-dev] [MR] iris: Add a new experimental Gallium driver for Intel Gen8+ GPUs

Hello, I believe it's finally time to merge my out-of-tree Iris driver into master. While it's not finished, we're up to nearly 800 patches, and so maintaining it out-of-tree is becoming a bit unruly...and it's in solid enough shape that it could benefit from being in-tree. I've opened a merge r

Re: [Mesa-dev] A few NIR compile time optimisations

On 21/2/19 2:32 am, Marek Olšák wrote: On Wed, Feb 20, 2019 at 2:31 AM Connor Abbott > wrote: On Wed, Feb 20, 2019 at 4:29 AM Marek Olšák mailto:mar...@gmail.com>> wrote: On Tue, Feb 19, 2019 at 7:57 PM Rob Clark mailto:robdcl...@gmail.com>> wrote:

[Mesa-dev] [Bug 109698] dri.pc contents invalid when built with meson

https://bugs.freedesktop.org/show_bug.cgi?id=109698 Bug ID: 109698 Summary: dri.pc contents invalid when built with meson Product: Mesa Version: unspecified Hardware: Other OS: Linux (All) Status: NEW Seve

Re: [Mesa-dev] [PATCH 4/4] radeonsi: use SDMA for uploading data through const_uploader

For the _rev2_ version (Patchwork Mesa) series is Tested-by: Dieter Nützel on Polaris 20 UH+UV working flawlessly, now. No 'measurable' speed decrease. - GREAT! Blender, FreeCAD, glmark2 all fine. But I had to have rebased part 4 (see attachment). Dieter Am 07.02.2019 02:22, schrieb Marek O

Re: [Mesa-dev] [PATCH v3] gallium/auxiliary/vl: Fix transparent issue on compute shader with rgba

Reviewed-by: Leo Liu On 2019-02-15 4:19 p.m., Zhu, James wrote: > Fixes: 9364d66cb7f7 (Add video compositor compute shader render) > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109646 > Problem 1,4: they are caused by imcomplete blend comute shader > implementation. So Reverts rgba bac

Re: [Mesa-dev] [PATCH v2] i965: fixed clamping in set_scissor_bits when the y is flipped

On Wed, Feb 20, 2019 at 03:08:29PM +0200, Eleni Maria Stea wrote: > Calculating the scissor rectangle fields with the y flipped (0 on top) > can generate negative values that will cause assertion failure later on > as the scissor fields are all unsigned. We must clamp the bbox values > again to mak

[Mesa-dev] [Bug 104376] [ILK] Browser crashes while switching between fullscreen and windowed video on youtube.

https://bugs.freedesktop.org/show_bug.cgi?id=104376 Anjala changed: What|Removed |Added Assignee|mesa-dev@lists.freedesktop. |dan...@fooishbar.org |org

[Mesa-dev] [PATCH] tgsi: don't set tgsi_info::uses_bindless_images for constbufs and hw atomics

From: Marek Olšák This might have decreased performance for radeonsi/tgsi, because most most shaders claimed they used bindless. Cc: 18.3 19.0 --- src/gallium/auxiliary/tgsi/tgsi_scan.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.

Re: [Mesa-dev] [PATCH] tgsi: don't set tgsi_info::uses_bindless_images for constbufs and hw atomics

I don't think that's right... this is used in e.g. case TGSI_OPCODE_RESQ: if (tgsi_is_bindless_image_file(fullinst->Src[0].Register.File)) info->uses_bindless_images = true; break; And if you call RESQ with a src0 that is not IMAGE or BUFFER, then that's a bindless referen

[Mesa-dev] [PATCH] panfrost: Use tiler fast path (performance boost)

For reasons that are still unclear (speculation included in the comment added in this patch), the tiler? metadata has a fast path that we were not enabling; there looks to be a possible time/memory tradeoff, but the details remain unclear. Regardless, this patch improves performance dramatically.