From: Dave Airlie
So one of the CTS tests tries to allocate a 16384x1 2048 array
texture. This overflows a bunch of calculations when we want it
tiled as the heights goes to 128.
addrlib returns us the correct size (16GB or so), but we mangle
it in the htile calcs due to the 32-bit offset fields
---
src/util/drirc | 27 +--
1 file changed, 21 insertions(+), 6 deletions(-)
diff --git a/src/util/drirc b/src/util/drirc
index 3cf3d8dc69..39ac3c858c 100644
--- a/src/util/drirc
+++ b/src/util/drirc
@@ -166,27 +166,37 @@ TODO: document the other workarounds.
Linking libvulkan_intel.so can fail, due to unresolved references to
libexpat.so.
EXPAT_CFLAGS should be moved as well.
Signed-off-by: Hongxu Jia
---
src/intel/Makefile.common.am | 1 +
src/intel/Makefile.tools.am | 2 --
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/intel/
“Saints Row: Gat out of Hell” benefits from this on slower CPUs in that
usage spikes on individual cores are avoided, which in turn makes it harder
to hit a bug which causes broken audio and the game to hang on exit.
“Saints Row IV” appears to be fine either way, but also exhibits the audio
breaka
Hi Suresh,
in general please don't use HTML mail (e.g. no color or bold formating
etc.. in mails).
Mailing list usually reject that, but Mesa isn't so strict with that so
it hopefully works out.
For more comments see below.
Am 17.10.2017 um 08:36 schrieb Guttula, Suresh:
On 11 October 2017
Quoting Kenneth Graunke (2017-10-16 20:07:05)
> I'd like to try out the
> AMD_pinned_memory support with Left 4 Dead 2, as I know a bunch of
> the Source 1 games use AMD_pinned_memory for better performance...
Finally got around to building a 32b mesa for steam, Left4Dead2 reports:
SDL failed to
We only need to add a check to validate output locations here. For
inputs with invalid locations we will fail to link when we can't
find a matching output in the same (invalid) location.
v2: compute location slots properly depending on shader stage and
variable type / direction
Fixes:
KHR-GL4
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_cmd_buffer.c | 169 +++
1 file changed, 48 insertions(+), 121 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 1cacdda767..b03dc4c864 100644
--- a/src/amd
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_cmd_buffer.c | 59
1 file changed, 30 insertions(+), 29 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index d58bf19b2e..e68174ff69 100644
--- a/src/amd/
Indirect draws with a count buffer will be refactored in a
separate patch.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_cmd_buffer.c | 217 ++-
1 file changed, 143 insertions(+), 74 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/am
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_meta_bufimage.c | 62 -
1 file changed, 26 insertions(+), 36 deletions(-)
diff --git a/src/amd/vulkan/radv_meta_bufimage.c
b/src/amd/vulkan/radv_meta_bufimage.c
index f5bbf3cb90..dfd99aa75f 100644
--- a/s
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_cmd_buffer.c | 38 ++
1 file changed, 26 insertions(+), 12 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index ec4e34966c..e72ef5ffb7 100644
--- a/src/amd/vu
Ported from RadeonSI. The time where shaders are idle should
be shorter now. This can give a little boost, like +6% with
the dynamicubo Vulkan demo.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_cmd_buffer.c | 94
1 file changed, 77 insertions(+)
Similar to the dispatch compute logic but for draw calls. For
convenience, indirect draws will be converted in a separate
patch.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_cmd_buffer.c | 202 ---
1 file changed, 127 insertions(+), 75 deletions(-)
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_cmd_buffer.c | 47 +++-
1 file changed, 22 insertions(+), 25 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index f958d1a14e..ec4e34966c 100644
--- a/src/amd/
Hi,
This series first refactors the draw codepath to follow the dispatch
codepath (ie. using a new structure called radv_draw_info). Then it
adds few helpers, and finally it tries to use a better packet order
in order to reduce the time where shaders are idle.
This is loosely based on RadeonSI an
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_cmd_buffer.c | 46 +---
1 file changed, 34 insertions(+), 12 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index b03dc4c864..d58bf19b2e 100644
--- a/src/amd/
Similar to the dispatch codepath.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_cmd_buffer.c | 85 ++--
1 file changed, 39 insertions(+), 46 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index e68174ff6
Just noticed that I missed the predicate stuff.
On 10/17/2017 11:03 AM, Samuel Pitoiset wrote:
Similar to the dispatch compute logic but for draw calls. For
convenience, indirect draws will be converted in a separate
patch.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_cmd_buffer.c
From: Nicolai Hähnle
When enabled, this will request FreeSync via the hybrid amdgpu DDX's
AMDGPU X11 protocol extension.
Due to limitations in the DDX this will only work for applications
that cover the entire X screen (which is important to keep in mind when
you have a multi-monitor setup).
--
Hi all,
I just sent out a patch that enables FreeSync in Mesa for the somewhat
hacked implementation of FreeSync that exists in our hybrid (amdgpu-pro)
stack's DDX and kernel module. [0]
While this patch isn't meant for upstream, that's as good a time as any
to raise the issue of how a prope
Missed that when I allowed waves to be launched out-of-order.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_cmd_buffer.c | 24 +---
1 file changed, 13 insertions(+), 11 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
ind
On 17/10/17 11:33 AM, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> When enabled, this will request FreeSync via the hybrid amdgpu DDX's
> AMDGPU X11 protocol extension.
>
> Due to limitations in the DDX this will only work for applications
> that cover the entire X screen (which is important
On Monday, 2017-10-16 16:04:06 +, Emil Velikov wrote:
> From: Emil Velikov
>
> The function can fail. Check and teardown accordingly.
>
> Fixes: a43d286ef7f ("gbm: Add import from fd")
> Cc: Kristian Høgsberg
> Signed-off-by: Emil Velikov
> ---
> src/gbm/backends/dri/gbm_dri.c | 8 +++
On Monday, 2017-10-16 16:04:07 +, Emil Velikov wrote:
> From: Emil Velikov
>
> Fixes: 6a7dea93fa7 ("dri: Rework planar image interface")
> Cc: Jakob Bornecrantz
> Signed-off-by: Emil Velikov
> ---
> src/gbm/backends/dri/gbm_dri.c | 23 +++
> 1 file changed, 15 insertion
Thanks!
Reviewed-by: Lionel Landwerlin
On 17/10/17 02:09, Jason Ekstrand wrote:
---
src/compiler/nir/nir.c | 22 +++
src/compiler/nir/nir.h | 4
src/compiler/nir/nir_lower_samplers.c| 27 ++---
On 17/10/17 11:34 AM, Nicolai Hähnle wrote:
> Hi all,
>
> I just sent out a patch that enables FreeSync in Mesa for the somewhat
> hacked implementation of FreeSync that exists in our hybrid (amdgpu-pro)
> stack's DDX and kernel module. [0]
>
> While this patch isn't meant for upstream, that's as
On 17.10.2017 12:07, Michel Dänzer wrote:
On 17/10/17 11:33 AM, Nicolai Hähnle wrote:
From: Nicolai Hähnle
When enabled, this will request FreeSync via the hybrid amdgpu DDX's
AMDGPU X11 protocol extension.
Due to limitations in the DDX this will only work for applications
that cover the enti
On Monday, 2017-10-16 16:04:10 +, Emil Velikov wrote:
> From: Emil Velikov
>
> The new entry point has a way to feedback the error. Thus we no longer
> need to call _mesa_error() but instead we can pass the correct value.
>
> Signed-off-by: Emil Velikov
> ---
> src/mesa/drivers/dri/i965/in
Yeah, it also applies to i965.
I'm guessing we haven't seen that problem because expat gets pulled in
by other bits of the mesa.
Looks good to me, thanks :
Reviewed-by: Lionel Landwerlin
On 17/10/17 02:10, Hongxu Jia wrote:
Linking libvulkan_intel.so can fail, due to unresolved references t
On 17/10/17 17:49, Bas Nieuwenhuizen wrote:
On Tue, Oct 17, 2017 at 7:41 AM, Timothy Arceri wrote:
It looks the original indirect mask was probably copied from
ANV.
Here we drop lowering locals altogether and allow indirects
on inputs where supported.
Sascha Willems demo results:
tessellat
On Monday, 2017-10-16 16:04:11 +, Emil Velikov wrote:
> From: Emil Velikov
>
> Signed-off-by: Emil Velikov
(same code, same comments as the previous/i965 patch apply here)
> ---
> src/mesa/drivers/dri/i915/intel_screen.c | 33
> +---
> 1 file changed, 26 inser
HI Suresh,
Please try to avoid HTML emails. If that's not possible, make sure
your reply is more readable.
At the moment it has 3 different fonts and 3 different colours, which
makes is distracting and hard to read.
Please tweak the quoting format - older replies should be a level
deeper. See [1]
On Monday, 2017-10-16 16:04:12 +, Emil Velikov wrote:
> From: Emil Velikov
>
> Signed-off-by: Emil Velikov
> ---
> src/mesa/drivers/dri/radeon/radeon_screen.c | 37
> +++--
> 1 file changed, 25 insertions(+), 12 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/ra
On 17/10/17 12:29 PM, Nicolai Hähnle wrote:
> On 17.10.2017 12:07, Michel Dänzer wrote:
>> On 17/10/17 11:33 AM, Nicolai Hähnle wrote:
>>> From: Nicolai Hähnle
>>>
>>> When enabled, this will request FreeSync via the hybrid amdgpu DDX's
>>> AMDGPU X11 protocol extension.
>>>
>>> Due to limitations
On 17 October 2017 at 02:10, Hongxu Jia wrote:
> Linking libvulkan_intel.so can fail, due to unresolved references to
> libexpat.so.
>
> EXPAT_CFLAGS should be moved as well.
>
The EXPAT_CFLAGS changes seems to be missing. Did you forget git add?
-Emil
Signed-off-by: Eric Engestrom
---
src/amd/vulkan/meson.build | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/src/amd/vulkan/meson.build b/src/amd/vulkan/meson.build
index a5a4f81352807beac92d..6a416d988674504281c6 100644
--- a/src/amd/vulkan/meson.build
+++ b/src/amd
On 17.10.2017 12:28, Michel Dänzer wrote:
On 17/10/17 11:34 AM, Nicolai Hähnle wrote:
Hi all,
I just sent out a patch that enables FreeSync in Mesa for the somewhat
hacked implementation of FreeSync that exists in our hybrid (amdgpu-pro)
stack's DDX and kernel module. [0]
While this patch isn'
On 17.10.2017 12:41, Michel Dänzer wrote:
On 17/10/17 12:29 PM, Nicolai Hähnle wrote:
On 17.10.2017 12:07, Michel Dänzer wrote:
On 17/10/17 11:33 AM, Nicolai Hähnle wrote:
From: Nicolai Hähnle
When enabled, this will request FreeSync via the hybrid amdgpu DDX's
AMDGPU X11 protocol extension.
On 15/10/17 11:47, Pohjolainen, Topi wrote:
> On Thu, Oct 12, 2017 at 08:38:12PM +0200, Jose Maria Casanova Crespo wrote:
>> ---
>> src/intel/compiler/brw_eu.h| 7 +
>> src/intel/compiler/brw_eu_defines.h| 2 ++
>> src/intel/compiler/brw_eu_emit.c
Reviewed-by: Lionel Landwerlin
On 17/10/17 02:09, Jason Ekstrand wrote:
---
src/intel/vulkan/anv_nir_apply_pipeline_layout.c | 17 +
1 file changed, 5 insertions(+), 12 deletions(-)
diff --git a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
b/src/intel/vulkan/anv_nir_app
On 17 October 2017 at 11:09, Eric Engestrom wrote:
> On Monday, 2017-10-16 16:04:06 +, Emil Velikov wrote:
>> From: Emil Velikov
>>
>> The function can fail. Check and teardown accordingly.
>>
>> Fixes: a43d286ef7f ("gbm: Add import from fd")
>> Cc: Kristian Høgsberg
>> Signed-off-by: Emil V
https://bugs.freedesktop.org/show_bug.cgi?id=103312
Bug ID: 103312
Summary: meson/macOS: Dependency libdrm_intel found: NO
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: Mac OS X (All)
Status: NEW
https://bugs.freedesktop.org/show_bug.cgi?id=103312
Yurii Kolesnykov changed:
What|Removed |Added
URL||https://gist.github.com/yur
On 17 October 2017 at 11:12, Eric Engestrom wrote:
> On Monday, 2017-10-16 16:04:07 +, Emil Velikov wrote:
>> From: Emil Velikov
>>
>> Fixes: 6a7dea93fa7 ("dri: Rework planar image interface")
>> Cc: Jakob Bornecrantz
>> Signed-off-by: Emil Velikov
>> ---
>> src/gbm/backends/dri/gbm_dri.c
On 17 October 2017 at 11:29, Eric Engestrom wrote:
> On Monday, 2017-10-16 16:04:10 +, Emil Velikov wrote:
>> From: Emil Velikov
>>
>> The new entry point has a way to feedback the error. Thus we no longer
>> need to call _mesa_error() but instead we can pass the correct value.
>>
>> Signed-o
On Tue, Oct 17, 2017 at 12:28:17PM +0200, Michel Dänzer wrote:
> On 17/10/17 11:34 AM, Nicolai Hähnle wrote:
> > Hi all,
> >
> > I just sent out a patch that enables FreeSync in Mesa for the somewhat
> > hacked implementation of FreeSync that exists in our hybrid (amdgpu-pro)
> > stack's DDX and k
This patch and patches 1 - 13:
Reviewed-by: Nicolai Hähnle
On 13.10.2017 14:04, Marek Olšák wrote:
From: Marek Olšák
---
src/amd/common/ac_llvm_build.c| 42 ++-
src/amd/common/ac_llvm_build.h| 14
src/amd/common/ac_nir
On 13.10.2017 14:04, Marek Olšák wrote:
From: Marek Olšák
SI_SGPR_CONST_AND_SHADER_BUFFERS now contains the pointer to const buffer 0
if there is no other buffer there.
Benefits:
- there is no constbuf descriptor upload and shader load
It's assumed that all constant addresses are within bound
https://bugs.freedesktop.org/show_bug.cgi?id=103312
--- Comment #1 from Eric Engestrom ---
libdrm_intel is needed to build i915; if you want to disable it you can use
`-Ddri-drivers=i965` (or any other value that doesn't contain `i915`, although
right now those are the only possibilities)
How di
On 16 October 2017 at 23:32, Dieter Nützel wrote:
> Am 16.10.2017 20:13, schrieb Andy Furniss:
>>
>> Emil Velikov wrote:
>>>
>>> On 16 October 2017 at 03:22, Jan Vesely wrote:
On Sun, 2017-10-15 at 00:00 +0100, Andy Furniss wrote:
>
> Andy Furniss wrote:
>>
>> Since
On 17 October 2017 at 13:40, Emil Velikov wrote:
>> With both:
>> -DLLVM_BUILD_LLVM_DYLIB=ON and -DLLVM_LINK_LLVM_DYLIB=ON
>>
> Something's a bit strange:
>
... setting -DLLVM_LINK_LLVM_DYLIB=ON should also set
-DLLVM_BUILD_LLVM_DYLIB=ON [1].
If that's not the case please report it to the LLVM d
* Merge the classes MockCodeLine and MockCodelineWithSwizzle into
one and refactor tests accordingly.
* Change memory allocations to use ralloc* interface.
Signed-off-by: Gert Wollny
---
.../tests/test_glsl_to_tgsi_lifetime.cpp | 481 ++---
1 file changed, 234 inse
https://bugs.freedesktop.org/show_bug.cgi?id=103312
--- Comment #2 from Emil Velikov ---
autotools detects possible drivers per platform and per cpu arch.
The latter may be an overkill but the former is a must IMHO.
--
You are receiving this mail because:
You are the QA Contact for the bug.
You
Don't allocate a zero-sized array, when no texture offsets are given.
Reviewed-by: Nicolai Hähnle
Signed-off-by: Gert Wollny
---
.../tests/test_glsl_to_tgsi_lifetime.cpp | 23 +++---
1 file changed, 16 insertions(+), 7 deletions(-)
diff --git a/src/mesa/state_tracker/
For arrays print the array ID, and with indirect access also print the
reladdr* registers. The reladdr* registers are always used in the
printout, even though the actual code may use an address register.
Specifically, a sequence involving src.reladdr = TEMP[2] and src.index=10
that emits the addre
Dear all,
this is the updated patch set that adds enhanced tracking of IF/ELSE
branches and tracking of reladdr* registers for the register_merge step.
So far patches 1 & 5 (now 8) are
Reviewed-by: Nicolai Hähnle
Changes w.r.t. v1:
* patches 2-4(new): As suggested by Nikolai, these patc
So far indirect addressing was not tracked to estimate the temporary
life time, and it was not needed, because code to load the address
registers was always emitted eliminating the reladdr* handles in the
past glsl-to.tgsi stages. Now, with Mareks patch 9a88580a4b3d allowing
any 1D register to be
Signed-off-by: Gert Wollny
---
.../tests/test_glsl_to_tgsi_lifetime.cpp | 127 ++---
1 file changed, 63 insertions(+), 64 deletions(-)
diff --git a/src/mesa/state_tracker/tests/test_glsl_to_tgsi_lifetime.cpp
b/src/mesa/state_tracker/tests/test_glsl_to_tgsi_lifetime.cpp
With the implementation of the tracking of the registers used in reladdr
asserting that a driver calling merge_register() uses the address register
is no longer needed.
Signed-off-by: Gert Wollny
---
src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 1 -
1 file changed, 1 deletion(-)
diff --git a/sr
Add a code line type that accepts one layer of indirect addressing and
add tests to check that temporary register access used for indirect
addressing is accounted for in the lifetime estimation.
Signed-off-by: Gert Wollny
---
.../tests/test_glsl_to_tgsi_lifetime.cpp | 184 ++
* Test number of operands by using num_inst_src_regs/num_inst_dst_regs
and fix tests accordingly.
Signed-off-by: Gert Wollny
---
src/mesa/state_tracker/tests/test_glsl_to_tgsi_lifetime.cpp | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/mesa/state_tracker/tests/
Improve the life-time evaluation of temporary registers by also tracking
writes in both if and else branches and in up to 32 nested scopes.
As a result the estimated required register life-times can be further
reduced enabling more registers to be merged.
Signed-off-by: Gert Wollny
---
.../state
Additional tests are added that check the tracking of access to temporaries
in if-else branches.
Signed-off-by: Gert Wollny
---
.../tests/test_glsl_to_tgsi_lifetime.cpp | 493 -
1 file changed, 486 insertions(+), 7 deletions(-)
diff --git a/src/mesa/state_tracker/t
By testing my own patches I saw that the meson/vulcan specific build
failed on travis:
https://travis-ci.org/gerddie/mesa/builds/288995180
To check that it is not related to my changes I also did that specific
build with the latest git master (35c66f3e4017) that failed.
https://travis-ci.org/
On 15/10/17 12:00, Pohjolainen, Topi wrote:
> On Thu, Oct 12, 2017 at 08:38:14PM +0200, Jose Maria Casanova Crespo wrote:
>> New shader attribute to mark when a location has 16-bit
>> value. This patch includes support on mesa glsl and nir.
>> ---
>> src/compiler/glsl_types.h | 24 +++
On 17/10/17 01:18 PM, Nicolai Hähnle wrote:
> On 17.10.2017 12:41, Michel Dänzer wrote:
>> On 17/10/17 12:29 PM, Nicolai Hähnle wrote:
>>> On 17.10.2017 12:07, Michel Dänzer wrote:
On 17/10/17 11:33 AM, Nicolai Hähnle wrote:
> From: Nicolai Hähnle
>
> When enabled, this will reque
Hi Gwan-gyeong,
On 6 October 2017 at 22:38, Gwan-gyeong Mun wrote:
> To share common free outdated buffers and update size code.
> This compares width and height arguments with current egl surface dimension,
> if the compared surface dimension is differ, then it free local buffers and
> updates d
On 17/10/17 01:04 PM, Nicolai Hähnle wrote:
> On 17.10.2017 12:28, Michel Dänzer wrote:
>> On 17/10/17 11:34 AM, Nicolai Hähnle wrote:
>>>
>>> Common sense suggests that there need to be two side to FreeSync / VESA
>>> Adaptive Sync support:
>>>
>>> 1. Query the display capabilities. This means que
On Tuesday, 2017-10-17 13:03:28 +, Gert Wollny wrote:
> By testing my own patches I saw that the meson/vulcan specific build
> failed on travis:
>
> https://travis-ci.org/gerddie/mesa/builds/288995180
>
> To check that it is not related to my changes I also did that specific
> build with th
On 17/10/17 02:22 PM, Daniel Vetter wrote:
> On Tue, Oct 17, 2017 at 12:28:17PM +0200, Michel Dänzer wrote:
>> On 17/10/17 11:34 AM, Nicolai Hähnle wrote:
>
>>> Common sense suggests that there need to be two side to FreeSync / VESA
>>> Adaptive Sync support:
>>>
>>> 1. Query the display capabilit
On 6 October 2017 at 22:38, Gwan-gyeong Mun wrote:
> This is added for preventing adding of new color buffers structure and back*
> when new platform backend is added.
> This refactoring separates out the common and platform specific bits.
> This makes odd casting in the platform_foo.c but it prev
Am 17.10.2017 um 15:46 schrieb Michel Dänzer:
On 17/10/17 02:22 PM, Daniel Vetter wrote:
[SNIP]
Finally I'm not sure we want to insist on a target time for freesync. At
least as far as I understand things you just want "as soon as possible".
This might change with some of the VK/EGL/GLX extensio
Hi Gwan-gyeong,
There's a small nit but otherwise looks good.
On 6 October 2017 at 22:38, Gwan-gyeong Mun wrote:
> To share common record buffers and update back buffer code.
> This records all the buffers created by each platform's native window and
> update back buffer for updating buffer's ag
On Friday, 2017-10-06 21:38:35 +, Gwan-gyeong Mun wrote:
> This deduplicates free routines of color_buffers array.
>
> Signed-off-by: Mun Gwan-gyeong
> ---
> src/egl/drivers/dri2/platform_wayland.c | 60
> +
> 1 file changed, 31 insertions(+), 29 deletions(-)
On Tue, Oct 17, 2017 at 03:46:24PM +0200, Michel Dänzer wrote:
> On 17/10/17 02:22 PM, Daniel Vetter wrote:
> > On Tue, Oct 17, 2017 at 12:28:17PM +0200, Michel Dänzer wrote:
> >> On 17/10/17 11:34 AM, Nicolai Hähnle wrote:
> >
> >>> Common sense suggests that there need to be two side to FreeSync
In particular, if the window was destroyed before the present request
completed, xcb_wait_for_special_event() may never return.
Note that the usage of xcb_poll_for_special_event() requires a version
of libxcb that includes commit fad81b63422105f9345215ab2716c4b804ec7986
to work properly.
Signed-o
On 6 October 2017 at 22:38, Gwan-gyeong Mun wrote:
> To share common update buffer age code.
> This updates old buffer's age and sets current back buffer's age to 1.
>
> In preparation to adding of new platform which uses this helper.
>
> v2:
> - Fixes from Eric's review:
>a) Split out series
I sent them out yesterday (sorry you weren't on the CC) and lionel reviewed
them. They were pushed as:
commit 759ab66db036dd911cb589429eb4dbb3eb4fdc4c
Author: Jason Ekstrand
Date: Mon Oct 16 08:50:44 2017 -0700
anv/apply_pipeline_layout: Use nir_tex_instr_remove_src
Reviewed-by: Lion
From: Michel Dänzer
And just reference pipe_resources to it in the validate callbacks.
Avoids pipe_resource leaks when st_framebuffer_validate ends up calling
the validate callback multiple times, e.g. when a window is resized.
v2:
* Use generic stable tag instead of Fixes: tag, since the probl
Emil Velikov wrote:
On a "bad" build (-DLLVM_BUILD_LLVM_DYLIB=ON) I get
andy [~]$ llvm-config --link-shared --libs bitwriter
llvm-config: error: missing: /usr/lib/libLLVMDemangle.so
llvm-config: error: missing: /usr/lib/libLLVMSupport.so
llvm-config: error: missing: /usr/lib/libLLVMBinaryFormat
On 16/10/17 07:16 PM, Thomas Hellstrom wrote:
> On 10/16/2017 04:39 PM, Michel Dänzer wrote:
>> On 16/10/17 02:21 PM, Thomas Hellstrom wrote:
>>> On 10/16/2017 12:53 PM, Thomas Hellstrom wrote:
Hi, Michel,
On 10/16/2017 12:35 PM, Michel Dänzer wrote:
> Hi Thomas,
>
> On 0
On 10/17/2017 04:39 PM, Michel Dänzer wrote:
From: Michel Dänzer
And just reference pipe_resources to it in the validate callbacks.
Avoids pipe_resource leaks when st_framebuffer_validate ends up calling
the validate callback multiple times, e.g. when a window is resized.
v2:
* Use generic st
Emil Velikov wrote:
On 17 October 2017 at 13:40, Emil Velikov wrote:
With both:
-DLLVM_BUILD_LLVM_DYLIB=ON and -DLLVM_LINK_LLVM_DYLIB=ON
Something's a bit strange:
... setting -DLLVM_LINK_LLVM_DYLIB=ON should also set
-DLLVM_BUILD_LLVM_DYLIB=ON [1].
If that's not the case please report it
On Tue, 2017-10-17 at 12:00 +0100, Eric Engestrom wrote:
> Signed-off-by: Eric Engestrom
I would add a line like:
fixes: 17201a2eb0b (radv: port to using updated anv entrypoint/extension
generator.)
> ---
> src/amd/vulkan/meson.build | 10 +-
> 1 file changed, 9 insertions(+), 1 delet
On 17 October 2017 at 15:07, Eric Engestrom wrote:
> On Friday, 2017-10-06 21:38:35 +, Gwan-gyeong Mun wrote:
>> This deduplicates free routines of color_buffers array.
>>
>> Signed-off-by: Mun Gwan-gyeong
>> ---
>> src/egl/drivers/dri2/platform_wayland.c | 60
>> +--
On Tue, Oct 17, 2017 at 03:46:24PM +0200, Michel Dänzer wrote:
> On 17/10/17 02:22 PM, Daniel Vetter wrote:
> > On Tue, Oct 17, 2017 at 12:28:17PM +0200, Michel Dänzer wrote:
> >> On 17/10/17 11:34 AM, Nicolai Hähnle wrote:
> >
> >>> Common sense suggests that there need to be two side to FreeSync
On Tuesday, 2017-10-17 14:55:06 +, Andres Gomez wrote:
> On Tue, 2017-10-17 at 12:00 +0100, Eric Engestrom wrote:
> > Signed-off-by: Eric Engestrom
>
> I would add a line like:
>
> fixes: 17201a2eb0b (radv: port to using updated anv entrypoint/extension
> generator.)
Thanks, I forgot to do
Suggested-by: Andres Gomez
Signed-off-by: Eric Engestrom
---
src/amd/vulkan/meson.build | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/amd/vulkan/meson.build b/src/amd/vulkan/meson.build
index 6a416d988674504281c6..0d433e944efe7a3790a5 100644
--- a/src/amd/vulkan/meson.build
+++ b/src/a
So far the Mesa-internal EGL driver "dri2" returned "DRI2" as its driver
name. This causes confusion, because there is a kernel interface by the
same name where a version 3 is available.
This change attempts to make it clearer that the "dri2" name of the Mesa
EGL driver has nothing to do with that
Eric Engestrom writes:
> On Monday, 2017-10-16 13:54:25 +, Emil Velikov wrote:
>> Hi Harish,
>>
>> Overall looks great, a few comments/questions inline.
>>
>
> I agree with everything Emil said :)
>
>> On 13 October 2017 at 19:49, Harish Krupo wrote:
>> > This passes 33/37 deqp tests rela
On 17/10/17 05:04 PM, Daniel Vetter wrote:
> On Tue, Oct 17, 2017 at 03:46:24PM +0200, Michel Dänzer wrote:
>> On 17/10/17 02:22 PM, Daniel Vetter wrote:
>>> On Tue, Oct 17, 2017 at 12:28:17PM +0200, Michel Dänzer wrote:
On 17/10/17 11:34 AM, Nicolai Hähnle wrote:
>>>
> Common sense sugges
On 17/10/17 05:26 PM, Kai Wasserbäch wrote:
> So far the Mesa-internal EGL driver "dri2" returned "DRI2" as its driver
> name. This causes confusion, because there is a kernel interface by the
> same name where a version 3 is available.
>
> This change attempts to make it clearer that the "dri2" n
On Tue, Oct 17, 2017 at 2:25 PM, Nicolai Hähnle wrote:
> On 13.10.2017 14:04, Marek Olšák wrote:
>>
>> From: Marek Olšák
>>
>> SI_SGPR_CONST_AND_SHADER_BUFFERS now contains the pointer to const buffer
>> 0
>> if there is no other buffer there.
>>
>> Benefits:
>> - there is no constbuf descriptor
Michel Dänzer wrote on 17.10.2017 17:42:
> On 17/10/17 05:26 PM, Kai Wasserbäch wrote:
>> So far the Mesa-internal EGL driver "dri2" returned "DRI2" as its driver
>> name. This causes confusion, because there is a kernel interface by the
>> same name where a version 3 is available.
>>
>> This chang
>
> I also think adding a test for each C++11 feature used in the code is
>
too tedious, regardless of the build system, and it would really need a
> dedicated maintainer.
>
Certainly. Rather than checking for everything, I think a code snippet
that just includes a few c++11-only headers would be
On Mon, Oct 16, 2017 at 10:40 AM, Emil Velikov wrote:
> From: Emil Velikov
>
> Nearly all the distributions* that build Mesa OpenCL, enable the ICD.
> Since building a non-ICD driver has the chance of conflicting with
> existing OpenCL binary (libOpenCL.so).
>
> Furthermore, some applications exp
On Tuesday, 2017-10-17 15:26:00 +, Kai Wasserbäch wrote:
> So far the Mesa-internal EGL driver "dri2" returned "DRI2" as its driver
> name. This causes confusion, because there is a kernel interface by the
> same name where a version 3 is available.
What confusion? Do you have an example?
I'm
Hi Emil,
Thank you for the comments, will fix the code accordingly and send a
v2 patch.
I have answered the question inline.
Emil Velikov writes:
> Hi Harish,
>
> Overall looks great, a few comments/questions inline.
>
> On 13 October 2017 at 19:49, Harish Krupo wrote:
>> This passes 33/37 deq
On 17 October 2017 17:36:06 BST, Harish Krupo
wrote:
> Hi Emil,
>
> Thank you for the comments, will fix the code accordingly and send a
> v2 patch.
> I have answered the question inline.
>
> Emil Velikov writes:
>
> > Hi Harish,
> >
> > Overall looks great, a few comments/questions inline.
>
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