Looks good to me, assuming this does not bring new unexpected
regressions, the series is:
Reviewed-by: Iago Toral Quiroga
On Mon, 2016-04-18 at 23:52 -0700, Kenneth Graunke wrote:
> This reworks opt_vector_float() so that there's only one place that
> flushes out any accumulated state and emits
Hi,
On Tue, 2016-04-19 at 08:53 +1000, Timothy Arceri wrote:
> On Mon, 2016-04-18 at 19:44 +0300, Andres Gomez wrote:
> >
> > Hi,
> >
> > I would really appreciate if you could find some time to review
> > this
> > patch.
> Is there a patch somewhere that makes use of this change?
Sorry, I sho
I just tried the commit d3c98c73d on i965 GPU
but it became black screen on surfaceflinger
starting.
Just hope to know if anyone has tested
and can confirm that. Or it's a stupid mistake
I made.
--
Chih-Wei
Android-x86 project
http://www.android-x86.org
_
https://bugs.freedesktop.org/show_bug.cgi?id=95003
Serge Martin changed:
What|Removed |Added
Resolution|--- |NOTOURBUG
Status|NEW
Changes from v2:
- Remains of vertex buffer descriptor support have been removed. Both
wrt the space calculation and allocating CE ram.
- Failing to create a preamble IB now rersults in failure.
- Misc style fixes in patch 5 and 12.
- Bas
Bas Nieuwenhuizen (9):
winsys/amdgpu: Enlarg
v2: Load previous list for new CS instead of re-emitting
all descriptors.
v3: Do radeon_add_to_buffer_list in si_ce_upload.
Signed-off-by: Bas Nieuwenhuizen
Reviewed-by: Marek Olšák
---
src/gallium/drivers/radeonsi/si_descriptors.c | 74 +++
1 file changed, 64 inser
From: Marek Olšák
Reviewed-by: Bas Nieuwenhuizen
---
src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 5 ---
src/gallium/winsys/amdgpu/drm/amdgpu_bo.h | 6 +++
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 68 +++
src/gallium/winsys/amdgpu/drm/amdgpu_cs.h | 16
4
For use by radeonsi.
v2: Make sure that it works for all 64 bits set.
Signed-off-by: Bas Nieuwenhuizen
Reviewed-by: Marek Olšák
---
src/gallium/auxiliary/util/u_math.h | 14 ++
1 file changed, 14 insertions(+)
diff --git a/src/gallium/auxiliary/util/u_math.h
b/src/gallium/auxilia
Signed-off-by: Bas Nieuwenhuizen
Reviewed-by: Marek Olšák
---
src/gallium/drivers/radeonsi/sid.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/sid.h
b/src/gallium/drivers/radeonsi/sid.h
index 11d6090..516e114 100644
--- a/src/gallium/drivers/radeonsi/sid
Necessary to prevent performance regressions due to extra flushing.
Probably should enlarge it even further when also updating
uniforms through the CE, but this seems large enough for now.
v2: Add preamble IB.
Signed-off-by: Bas Nieuwenhuizen
Reviewed-by: Marek Olšák
---
src/gallium/winsys/am
Signed-off-by: Bas Nieuwenhuizen
Reviewed-by: Marek Olšák
---
src/gallium/drivers/radeonsi/si_descriptors.c | 23 +++
src/gallium/drivers/radeonsi/si_pipe.c| 11 +++
src/gallium/drivers/radeonsi/si_pipe.h| 3 +++
3 files changed, 37 insertions(+)
dif
Based on work by Marek Olšák.
v2: Add preamble IB.
Leaves the load packet in the space calculation as the
radeon winsys might not be able to support a premable.
The added space calculation may look expensive, but
is converted to a constant with (at least) -O2 and -O3.
v3: - Fix code style.
From: Marek Olšák
Not used by drivers.
Reviewed-by: Bas Nieuwenhuizen
---
src/gallium/drivers/radeon/radeon_winsys.h| 1 -
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 8
src/gallium/winsys/amdgpu/drm/amdgpu_cs.h | 1 +
src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 10
We can then upload only the dirty ones with the constant engine.
Signed-off-by: Bas Nieuwenhuizen
Reviewed-by: Marek Olšák
---
src/gallium/drivers/radeonsi/si_descriptors.c | 37 ---
src/gallium/drivers/radeonsi/si_state.h | 9 +--
2 files changed, 29 insertio
Signed-off-by: Bas Nieuwenhuizen
Reviewed-by: Marek Olšák
---
src/gallium/drivers/radeonsi/si_pipe.h | 1 +
src/gallium/drivers/radeonsi/si_state_draw.c | 24
2 files changed, 25 insertions(+)
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h
b/src/gallium/dri
v2: Use 32 byte alignment.
v3: Don't allocate CE space for vertex buffer descriptors.
Signed-off-by: Bas Nieuwenhuizen
---
src/gallium/drivers/radeonsi/si_descriptors.c | 33 +++
src/gallium/drivers/radeonsi/si_state.h | 3 +++
2 files changed, 27 insertions(+), 9
From: Marek Olšák
v2: Use the correct IB to update request (Bas Nieuwenhuizen)
v3: Add preamble IB. (Bas Nieuwenhuizen)
Reviewed-by: Marek Olšák
---
src/gallium/drivers/radeon/radeon_winsys.h | 30 ++
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 88 --
src/ga
v2: Load previous list for new CS instead of re-emitting
all descriptors.
v3: Do radeon_add_to_buffer_list in si_ce_upload.
Signed-off-by: Bas Nieuwenhuizen
Reviewed-by: Marek Olšák
---
Forgot to save the file before amending
src/gallium/drivers/radeonsi/si_descriptors.c | 74 +++
Reviewed-by: Marek Olšák
Marek
On Tue, Apr 19, 2016 at 11:57 AM, Bas Nieuwenhuizen
wrote:
> Based on work by Marek Olšák.
>
> v2: Add preamble IB.
>
> Leaves the load packet in the space calculation as the
> radeon winsys might not be able to support a premable.
>
> The added space calculation
Reviewed-by: Marek Olšák
Marek
On Tue, Apr 19, 2016 at 11:58 AM, Bas Nieuwenhuizen
wrote:
> v2: Use 32 byte alignment.
>
> v3: Don't allocate CE space for vertex buffer descriptors.
>
> Signed-off-by: Bas Nieuwenhuizen
> ---
> src/gallium/drivers/radeonsi/si_descriptors.c | 33
>
https://bugs.freedesktop.org/show_bug.cgi?id=94907
--- Comment #4 from Jose Fonseca ---
For the record, this issue has now been fixed in a more generic fashion in
commit 649704f1f7c9e1d0990d34a76154b2eb656bee42
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Reviewed-by: Marek Olšák
Marek
On Tue, Apr 19, 2016 at 12:05 PM, Bas Nieuwenhuizen
wrote:
> v2: Load previous list for new CS instead of re-emitting
> all descriptors.
>
> v3: Do radeon_add_to_buffer_list in si_ce_upload.
>
> Signed-off-by: Bas Nieuwenhuizen
> Reviewed-by: Marek Olšák
> -
There can be read-after-write hazards when transitioning from compute
to graphics and vice versa. Is the user expected to call
glMemoryBarrier in this case or do we need to synchronize explicitly
in the driver?
Marek
On Tue, Apr 19, 2016 at 1:39 AM, Bas Nieuwenhuizen
wrote:
> v2: Add more CS_PAR
Reviewed-by: Marek Olšák
Marek
On Tue, Apr 19, 2016 at 1:39 AM, Bas Nieuwenhuizen
wrote:
> v2: Use chip_class instead of family.
>
> v3: Check kernel version for SI.
>
> Signed-off-by: Bas Nieuwenhuizen
> ---
> docs/GL3.txt | 4 ++--
> docs/relnotes/11.3.0.ht
On Mon, Apr 18, 2016 at 5:38 PM, Marek Olšák wrote:
> Packed formats are the only formats that need byte-swapping between
> components. The only gallium packed formats are:
> - 10_10_10_2
> - 5_5_5_1
> - 5_6_5
> - 4_4_4_4
> - 3_3_2
> - 24_8
> - 8_24
> - 32_8_24 (not sure
> - 11_11_10
> - 5_5_5_9
>
On 18/04/16 16:30, Tom Stellard wrote:
On Mon, Apr 18, 2016 at 10:14:35AM +0100, Jose Fonseca wrote:
All power of two of up native vector length.
There is actually a bug in lp_build_round for v2, whereby it doesn't
round to nearest. Fixing is left to the future, but the test is now
able to exp
Write by ssbo/image is completely synchronized by glMemoryBarrier, not
by the driver. Even for the write after read hazard, the user needs to
put a barrier before the write. This includes all writes by compute.
For transform feedback we apply the same rules as for graphics:
reading from the feedba
On Tue, Apr 19, 2016 at 9:10 AM, Michel Dänzer wrote:
> On 19.04.2016 00:03, Ilia Mirkin wrote:
>> On Mon, Apr 18, 2016 at 10:47 AM, Oded Gabbay wrote:
>>> On Thu, Apr 14, 2016 at 6:44 PM, Ilia Mirkin wrote:
>>>
>>> To make the GPU do a conversion during blitting, I need to configure
>>> registe
OK.
Reviewed-by: Marek Olšák
Marek
On Tue, Apr 19, 2016 at 1:19 PM, Bas Nieuwenhuizen
wrote:
> Write by ssbo/image is completely synchronized by glMemoryBarrier, not
> by the driver. Even for the write after read hazard, the user needs to
> put a barrier before the write. This includes all wri
Dear gentlemen,
please forgive me. It's some time ago I tried to upstream patches. I'm afraid
it's not the right prcoess I'm using here. :-(
Attached you find a patch. It has been a fix for
https://bugzilla.opensuse.org/show_bug.cgi?id=962609
CU,
Stefan
Public Key available
-
Signed-off-by: Bas Nieuwenhuizen
---
src/gallium/drivers/radeonsi/si_compute.c | 16 +++-
src/gallium/drivers/radeonsi/si_shader.c | 3 ++-
2 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_compute.c
b/src/gallium/drivers/radeonsi/si_co
Signed-off-by: Bas Nieuwenhuizen
---
src/gallium/drivers/radeonsi/si_compute.c| 4
src/gallium/drivers/radeonsi/si_state.h | 2 ++
src/gallium/drivers/radeonsi/si_state_draw.c | 4 ++--
3 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_co
Dear gentlemen,
unfortunately the patch by Jimmy Berry didn't get too much attention, when he
posted it first. Maybe this time it's different. Find it attached.
Thanks,
Stefan
Public Key available
--
Stefan Dirsch (Res. & Dev.) SUSE LINUX Gmb
On Mon, Apr 18, 2016 at 6:03 PM,
Ilia Mirkin wrote:
> On Mon, Apr 18, 2016 at 10:47 AM, Oded Gabbay wrote:
>> On Thu, Apr 14, 2016 at 6:44 PM, Ilia Mirkin wrote:
>>> On Thu, Apr 14, 2016 at 11:08 AM, Oded Gabbay wrote:
> Wouldn't it make more sense to handle such issues in transfer_map?
>>>
https://bugs.freedesktop.org/show_bug.cgi?id=95020
Bug ID: 95020
Summary: a bug asking for an account
Product: Mesa
Version: git
Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
Severity: normal
https://bugs.freedesktop.org/show_bug.cgi?id=95020
Jan Ziak <0xe2.0x9a.0...@gmail.com> changed:
What|Removed |Added
CC||0xe2.0x9a.0...@gmail
https://bugs.freedesktop.org/show_bug.cgi?id=95020
--- Comment #2 from Jan Ziak <0xe2.0x9a.0...@gmail.com> ---
Name, email and account name are provided in the GPG public key. Account name
is in parentheses.
Thanks.
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-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
On 14/04/16 22:39, Jason Ekstrand wrote:
> On Tue, Apr 12, 2016 at 1:05 AM, Samuel Iglesias Gonsálvez <
> sigles...@igalia.com> wrote:
>
>> From: Connor Abbott
>>
>> --- src/compiler/nir/nir_builder.h | 7 +++ 1 file changed, 7
>> insertions
From: Rob Clark
Signed-off-by: Rob Clark
---
src/compiler/nir/nir_lower_tex.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/src/compiler/nir/nir_lower_tex.c b/src/compiler/nir/nir_lower_tex.c
index 4999603..7740e58 100644
--- a/src/compiler/nir/nir_lower_t
From: Rob Clark
This *seems* like a hw bug, and maybe only applies to certain a4xx
variants/revisions. But setting the SRGB bit in sampler view state
(texconst0) causes invalid alpha for ASTC textures. Work around this
by doing the srgb->linear conversion in the shader instead.
This fixes 392
From: Rob Clark
Signed-off-by: Rob Clark
---
src/compiler/nir/nir.h | 7 ++
src/compiler/nir/nir_lower_tex.c | 46
2 files changed, 53 insertions(+)
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index bbbc208..2c0f705 10064
On Tue, Apr 19, 2016 at 6:56 AM, Marek Olšák wrote:
> Reviewed-by: Marek Olšák
>
> Marek
>
> On Tue, Apr 19, 2016 at 1:39 AM, Bas Nieuwenhuizen
> wrote:
>> v2: Use chip_class instead of family.
>>
>> v3: Check kernel version for SI.
>>
>> Signed-off-by: Bas Nieuwenhuizen
>> ---
>> docs/GL3.txt
https://bugs.freedesktop.org/show_bug.cgi?id=95022
Bug ID: 95022
Summary: error: GLSL 1.50 is not supported.
Product: Mesa
Version: git
Hardware: Other
OS: All
Status: NEW
Severity: normal
Priori
On Tue, Apr 19, 2016 at 9:58 AM, Rob Clark wrote:
> From: Rob Clark
>
> This *seems* like a hw bug, and maybe only applies to certain a4xx
> variants/revisions. But setting the SRGB bit in sampler view state
> (texconst0) causes invalid alpha for ASTC textures. Work around this
> by doing the s
On Tue, Apr 19, 2016 at 4:03 PM, Alex Deucher wrote:
> On Tue, Apr 19, 2016 at 6:56 AM, Marek Olšák wrote:
>> Reviewed-by: Marek Olšák
>>
>> Marek
>>
>> On Tue, Apr 19, 2016 at 1:39 AM, Bas Nieuwenhuizen
>> wrote:
>>> v2: Use chip_class instead of family.
>>>
>>> v3: Check kernel version for SI
On Tue, Apr 19, 2016 at 10:11 AM, Bas Nieuwenhuizen
wrote:
> On Tue, Apr 19, 2016 at 4:03 PM, Alex Deucher wrote:
>> On Tue, Apr 19, 2016 at 6:56 AM, Marek Olšák wrote:
>>> Reviewed-by: Marek Olšák
>>>
>>> Marek
>>>
>>> On Tue, Apr 19, 2016 at 1:39 AM, Bas Nieuwenhuizen
>>> wrote:
v2: Use
On Tue, Apr 19, 2016 at 9:11 AM, Stefan Dirsch wrote:
> Dear gentlemen,
>
> unfortunately the patch by Jimmy Berry didn't get too much attention, when he
> posted it first. Maybe this time it's different. Find it attached.
FYI, you're limiting the audience of the patch by not sending it
properly.
v2: Use chip_class instead of family.
v3: Check kernel version for SI.
v4: Preemptively allow amdgpu winsys for SI.
Signed-off-by: Bas Nieuwenhuizen
---
docs/GL3.txt | 4 ++--
docs/relnotes/11.3.0.html | 1 +
src/gallium/drivers/radeon/r60
On Tue, Apr 19, 2016 at 10:30 AM, Bas Nieuwenhuizen
wrote:
> v2: Use chip_class instead of family.
>
> v3: Check kernel version for SI.
>
> v4: Preemptively allow amdgpu winsys for SI.
>
> Signed-off-by: Bas Nieuwenhuizen
Reviewed-by: Alex Deucher
> ---
> docs/GL3.txt
On 18 April 2016 at 18:53, Francisco Jerez wrote:
> Emil Velikov writes:
>
>> On 18 April 2016 at 04:43, Francisco Jerez wrote:
>>> Grazvydas Ignotas writes:
>>>
On Sun, Apr 17, 2016 at 2:50 AM, Emil Velikov
wrote:
> On 16 April 2016 at 02:00, Grazvydas Ignotas wrote:
>> Th
https://bugs.freedesktop.org/show_bug.cgi?id=95022
--- Comment #1 from Gustaw Smolarczyk ---
I think it's using a compatibility profile instead of a core profile, which
limits the OpenGL version to 3.0 in mesa.
--
You are receiving this mail because:
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You are
On 18 April 2016 at 19:01, Ian Romanick wrote:
> On 04/18/2016 08:06 AM, Emil Velikov wrote:
>> On 18 April 2016 at 04:43, Francisco Jerez wrote:
>>> Grazvydas Ignotas writes:
>>>
On Sun, Apr 17, 2016 at 2:50 AM, Emil Velikov
wrote:
> On 16 April 2016 at 02:00, Grazvydas Ignotas
This still doesn't quite give what you want. One can also have an llvm
with component shared libs. So there's three different options for llvm
library configurations: a single shared lib, component shared libs, or
component static libs. To ensure you're getting just the static libs or
just the s
On Tue, Apr 19, 2016 at 3:11 PM, Oded Gabbay wrote:
> On Mon, Apr 18, 2016 at 6:03 PM,
> Ilia Mirkin wrote:
>> On Mon, Apr 18, 2016 at 10:47 AM, Oded Gabbay wrote:
>>> On Thu, Apr 14, 2016 at 6:44 PM, Ilia Mirkin wrote:
On Thu, Apr 14, 2016 at 11:08 AM, Oded Gabbay
wrote:
>> Wou
The MaxComputeWorkGroupInvocations constant is used in
compute_version_es2() instead of extensions->ARB_compute_shader
as ES has lower requirements than desktop GL.
Both i965 and gallium set this constant before enabling compute support.
Signed-off-by: Daniel Scharrer
---
This currently causes
Reviewed-by: Marek Olšák
Marek
On Tue, Apr 19, 2016 at 4:30 PM, Bas Nieuwenhuizen
wrote:
> v2: Use chip_class instead of family.
>
> v3: Check kernel version for SI.
>
> v4: Preemptively allow amdgpu winsys for SI.
>
> Signed-off-by: Bas Nieuwenhuizen
> ---
> docs/GL3.txt
These are already set in initialize_context_to_defaults().
Signed-off-by: Daniel Scharrer
---
src/compiler/glsl/main.cpp | 11 ---
1 file changed, 11 deletions(-)
diff --git a/src/compiler/glsl/main.cpp b/src/compiler/glsl/main.cpp
index d253575..c410bdd 100644
--- a/src/compiler/glsl/m
https://bugs.freedesktop.org/show_bug.cgi?id=95020
Emil Velikov changed:
What|Removed |Added
Status|NEW |RESOLVED
Resolution|---
https://bugs.freedesktop.org/show_bug.cgi?id=94086
Chuck Atkins changed:
What|Removed |Added
Attachment #122974|0 |1
is obsolete|
On Tue, Apr 19, 2016 at 10:09 AM, Ilia Mirkin wrote:
> atic void
>> +fd4_set_sampler_views(struct pipe_context *pctx, unsigned shader,
>> + unsigned start, unsigned nr,
>> + struct pipe_sampler_view **views)
>> +{
>> + struct fd_context *ctx = fd_context(pctx);
>>
https://bugs.freedesktop.org/show_bug.cgi?id=92850
--- Comment #61 from Iaroslav Andrusyak ---
hd 7790 mesa-git
Works for me with aces -safe and with any settings but without shadows enabled,
with shadows i got
state_tracker/st_cb_fbo.c:431:st_update_renderbuffer_surface: Assertion `level
<= re
https://bugs.freedesktop.org/show_bug.cgi?id=95020
Jan Ziak <0xe2.0x9a.0...@gmail.com> changed:
What|Removed |Added
Resolution|WONTFIX |---
Sta
Reviewed-by: Marek Olšák
It looks like the key change here is the use of si_shader_create,
which calls si_fix_num_sgprs, which is what the title describes. This
is something that should be mentioned in the commit message, because
it's not immediately obvious from the patch.
Marek
On Tue, Apr 19
Reviewed-by: Marek Olšák
Marek
On Tue, Apr 19, 2016 at 2:51 PM, Bas Nieuwenhuizen
wrote:
> Signed-off-by: Bas Nieuwenhuizen
> ---
> src/gallium/drivers/radeonsi/si_compute.c| 4
> src/gallium/drivers/radeonsi/si_state.h | 2 ++
> src/gallium/drivers/radeonsi/si_state_draw.c | 4
https://bugs.freedesktop.org/show_bug.cgi?id=95022
--- Comment #2 from Kenneth Graunke ---
If you're trying to replay a trace, try using "glretrace --core file.trace".
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https://bugs.freedesktop.org/show_bug.cgi?id=95020
--- Comment #5 from Jan Ziak <0xe2.0x9a.0...@gmail.com> ---
Created attachment 123060
--> https://bugs.freedesktop.org/attachment.cgi?id=123060&action=edit
GPG public key (ASCII "armored")
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https://bugs.freedesktop.org/show_bug.cgi?id=95020
--- Comment #6 from Kenneth Graunke ---
The AccountRequests page describes the mechanics of how to sign up for a
freedesktop.org account. As Emil said, these aren't usually granted without a
project lead granting you commit access to their repos
https://bugs.freedesktop.org/show_bug.cgi?id=95020
--- Comment #7 from Jan Ziak <0xe2.0x9a.0...@gmail.com> ---
(In reply to Emil Velikov from comment #3)
> In general commit access isn't given to people without a good patch history.
> Please work on that first - send your patches to the mailing li
https://bugs.freedesktop.org/show_bug.cgi?id=95020
--- Comment #8 from Jan Ziak <0xe2.0x9a.0...@gmail.com> ---
(In reply to Kenneth Graunke from comment #6)
> Perhaps more to the point: why do you want an account? What do you need it
> for?
The only answer to that question would be in the form o
https://bugs.freedesktop.org/show_bug.cgi?id=95020
--- Comment #9 from Emil Velikov ---
(In reply to Jan Ziak from comment #4)
> (In reply to Emil Velikov from comment #3)
> > Hi Zak,
>
> I find it fascinating that https://www.freedesktop.org/wiki/AccountRequests/
> is saying "You MUST include y
https://bugs.freedesktop.org/show_bug.cgi?id=95020
--- Comment #10 from Jan Ziak <0xe2.0x9a.0...@gmail.com> ---
(In reply to Kenneth Graunke from comment #6)
> I don't understand the basis for saying "My patches will not be accepted" -
I have a different style of thinking about code. I have a hun
On Mon, Apr 18, 2016 at 11:53 PM, Michael Schellenberger Costa <
mschellenbergerco...@googlemail.com> wrote:
> Hi Jason,
>
> stupid optional nitpick , but could you go for anv_batch_emit_block?
> Normally abbreviations below 3 characters aren't really worth it.
>
Given that the last two patches d
https://bugs.freedesktop.org/show_bug.cgi?id=95020
Jan Ziak <0xe2.0x9a.0...@gmail.com> changed:
What|Removed |Added
Status|REOPENED|RESOLVED
Re
On Tue, Apr 19, 2016 at 6:58 AM, Rob Clark wrote:
> From: Rob Clark
>
> Signed-off-by: Rob Clark
> ---
> src/compiler/nir/nir.h | 7 ++
> src/compiler/nir/nir_lower_tex.c | 46
>
> 2 files changed, 53 insertions(+)
>
> diff --git a/src/co
https://bugs.freedesktop.org/show_bug.cgi?id=95020
--- Comment #11 from Rob Clark ---
(In reply to Jan Ziak from comment #10)
> (In reply to Kenneth Graunke from comment #6)
> > I don't understand the basis for saying "My patches will not be accepted" -
>
> I have a different style of thinking a
On Tue, Apr 19, 2016 at 1:06 PM, Jason Ekstrand wrote:
>
>
> On Tue, Apr 19, 2016 at 6:58 AM, Rob Clark wrote:
>>
>> From: Rob Clark
>>
>> Signed-off-by: Rob Clark
>> ---
>> src/compiler/nir/nir.h | 7 ++
>> src/compiler/nir/nir_lower_tex.c | 46
>> ++
https://bugs.freedesktop.org/show_bug.cgi?id=95020
--- Comment #12 from Daniel Stone ---
(In reply to Jan Ziak from comment #4)
> (In reply to Emil Velikov from comment #3)
> > In general commit access isn't given to people without a good patch history.
>
> This requirement isn't written on
> ht
Code was using an incorrect address for the base pointer.
v2: use swr_resource_data() utility function.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94979
---
src/gallium/drivers/swr/swr_resource.h | 2 +-
src/gallium/drivers/swr/swr_state.cpp | 12 ++--
2 files changed, 7 in
https://bugs.freedesktop.org/show_bug.cgi?id=94957
Ilia Mirkin changed:
What|Removed |Added
Attachment #122980|0 |1
is obsolete|
On 19 April 2016 at 03:29, Jonathan Gray wrote:
> For systems without udev or sysfs that use drm ioctls in the loader
> drm authentication must take place earlier or the loader will fail
> "MESA-LOADER: failed to get param for i915".
>
> Patch from Mark Kettenis.
>
> Cc: "11.2 11.1"
> Signed-off-
This series solves the false positive that Ilia found recently.
On the thread I mention that my preferred option would be try to set
is_lhs before processing the function parameters on a pass similar to
verify_parameter_modes, in order to avoid two different places raising
the same warning. This i
It silence by default warnings with function parameters, as the
parameters need to be processed in order to have the actual and the
formal parameter, and the function signature. Then it raises the
warning if needed at verify_parameter_modes where other in/inout modes
checks are done.
---
src/compi
Just to allow to call set_is_lhs on any ast_node without a casting. Useful
when processing a ast_node list that we know it contain ast_expression.
---
Worth to note that ast_node has other dummy implementations, like
ast_node::hir.
src/compiler/glsl/ast.h | 2 ++
src/compiler/glsl/ast_t
---
src/gallium/drivers/radeonsi/si_shader.c | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index c26960b..3b6d6e9 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++
We're trying to move to more of the new style intrinsics with include
the correct target name, and map directly to ISA instructions.
v2:
- Only do this with LLVM 3.8 and newer.
---
src/gallium/drivers/radeonsi/si_shader.c | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
The ds_bpermute instruction allows threads to transfer data directly
to or from the vgprs of other threads. These instructions use the lds
hardware to transfer data, but do not read or write lds memory.
DDX BEFORE:| DDX AFTER:
|
v_mbcnt_
Cc-ing Matt, the author of the commit.
On 19 April 2016 at 03:31, Jonathan Gray wrote:
> Use the defines Mesa configure sets to indicate presence of the bswap32
> builtins. This lets i965 work on OpenBSD again after the changes that
> were made in 0a5d8d9af42fd77fce1492d55f958da97816961a.
>
> Si
https://bugs.freedesktop.org/show_bug.cgi?id=94957
--- Comment #6 from Roland Scheidegger ---
I wonder what deqp doesn't like about our nearest_mipmap_linear implementation
(all filtering errors use that).
Also, I'm wondering if the test is overly picky about pow. The spec says right
there the er
On 19 April 2016 at 04:03, Jonathan Gray wrote:
> Any objections to this?
>
Absolutely none. I simply missed it.
> On Mon, Dec 21, 2015 at 04:39:55PM +1100, Jonathan Gray wrote:
>> Use dev_node_from_fd() with HAVE_LIBDRM to provide an implmentation
>> of loader_get_device_name_for_fd() for non-li
On Mon, Apr 18, 2016 at 9:31 PM, Jonathan Gray wrote:
> Use the defines Mesa configure sets to indicate presence of the bswap32
> builtins. This lets i965 work on OpenBSD again after the changes that
> were made in 0a5d8d9af42fd77fce1492d55f958da97816961a.
>
> Signed-off-by: Jonathan Gray
> ---
https://bugs.freedesktop.org/show_bug.cgi?id=94957
--- Comment #7 from Ilia Mirkin ---
(In reply to Roland Scheidegger from comment #6)
> I wonder what deqp doesn't like about our nearest_mipmap_linear
> implementation (all filtering errors use that).
Error mask for
dEQP-GLES3.functional.texture
The range metadata tells LLVM the range of expected values for this intrinsic,
so it can do some additional optimizations on the result.
---
src/gallium/drivers/radeonsi/si_shader.c | 29 ++---
1 file changed, 26 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drive
On Tue, Apr 19, 2016 at 10:15 AM, Rob Clark wrote:
> On Tue, Apr 19, 2016 at 1:06 PM, Jason Ekstrand
> wrote:
> >
> >
> > On Tue, Apr 19, 2016 at 6:58 AM, Rob Clark wrote:
> >>
> >> From: Rob Clark
> >>
> >> Signed-off-by: Rob Clark
> >> ---
> >> src/compiler/nir/nir.h | 7 ++
On Mon, Apr 18, 2016 at 7:31 PM, Jonathan Gray wrote:
> Use the defines Mesa configure sets to indicate presence of the bswap32
> builtins. This lets i965 work on OpenBSD again after the changes that
> were made in 0a5d8d9af42fd77fce1492d55f958da97816961a.
>
> Signed-off-by: Jonathan Gray
Revie
bump
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On Mon, Apr 18, 2016 at 11:48 PM, Kenneth Graunke wrote:
> On Gen7+, the thread payload provides the sample ID - we can read it
> in two instructions, without any elaborate calculations. We don't even
> need a state dependency - this will properly produce zero in the
> non-MSAA case. Unfortunate
On Tue, Apr 19, 2016 at 5:59 PM, Marek Olšák wrote:
> On Tue, Apr 19, 2016 at 3:11 PM, Oded Gabbay wrote:
>> On Mon, Apr 18, 2016 at 6:03 PM,
>> Ilia Mirkin wrote:
>>> On Mon, Apr 18, 2016 at 10:47 AM, Oded Gabbay wrote:
On Thu, Apr 14, 2016 at 6:44 PM, Ilia Mirkin wrote:
> On Thu, Ap
While doing some other work, I noticed that prog_to_nir supported SLE,
SGT, SNE, and SEQ. It's impossible for those opcodes to occur in the
prog_to_nir path because that could only have come from the
NV_vertex_program2 (or other NV assembly program) extension. We removed
those quite some time ago
From: Ian Romanick
There is nothing left that can generate them. These used to be
generated by ir_to_mesa or by the assembler for various NV extensions
that have been removed.
Signed-off-by: Ian Romanick
---
src/mesa/drivers/dri/i915/i915_fragprog.c | 148 --
src/m
From: Ian Romanick
Nothing that consumes the output of this backend consumes them
navtively. This is *not* the way i915 has implemented these
instructions, but, as far as I am able to tell, this is the way both the
Cg compiler and the HLSL compiler implement these operations.
Signed-off-by: Ian
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