Since llvm.SI.tid is used in several places, it would be better to add
a helper function that returns tid.
Also Mesa needs to support LLVM 3.6 too.
Marek
On Sat, Apr 16, 2016 at 4:39 AM, Tom Stellard wrote:
> We're trying to move to more of the new style intrinsics with include
> the correct ta
On 2016-04-15 20:30, Jakob Sinclair wrote:
In other places in radeonsi that require reinterpretation (e.g.
si_blit.c), the surface template is modified instead of changing the
surface after creation. I'm not sure if r600/radeonsi like it if the
format is changed late like here. Seems to be cleane
https://bugs.freedesktop.org/show_bug.cgi?id=83669
Steven Newbury changed:
What|Removed |Added
CC||s_j_newb...@yahoo.co.uk
--- Comment #12
On Sat, Apr 16, 2016 at 8:04 AM, Michel Dänzer wrote:
> On 16.04.2016 14:51, Michel Dänzer wrote:
>> On 16.04.2016 11:39, Tom Stellard wrote:
>>> The ds_bpermute instruction allows threads to transfer data directly
>>> to or from the vgprs of other threads. These instructions use the lds
>>> hard
From: Marek Olšák
---
src/gallium/drivers/radeon/r600_query.h | 43 ++---
1 file changed, 23 insertions(+), 20 deletions(-)
diff --git a/src/gallium/drivers/radeon/r600_query.h
b/src/gallium/drivers/radeon/r600_query.h
index 9f3a917..6bb9374 100644
--- a/src/gallium
From: Marek Olšák
---
src/gallium/include/pipe/p_shader_tokens.h | 303 -
1 file changed, 164 insertions(+), 139 deletions(-)
diff --git a/src/gallium/include/pipe/p_shader_tokens.h
b/src/gallium/include/pipe/p_shader_tokens.h
index c25786e..26512d2 100644
--- a/src
From: Marek Olšák
---
src/gallium/auxiliary/tgsi/tgsi_ureg.c | 3 +--
src/gallium/auxiliary/util/u_inlines.h | 22 --
src/gallium/drivers/radeonsi/si_state_shaders.c | 2 +-
src/gallium/state_trackers/nine/nine_shader.c | 13 +
4 files change
From: Marek Olšák
---
src/gallium/drivers/radeonsi/si_shader.h | 212 +--
1 file changed, 119 insertions(+), 93 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.h
b/src/gallium/drivers/radeonsi/si_shader.h
index 013c8a2..dab572c 100644
--- a/src/gall
From: Marek Olšák
no change in behavior, because both are defined the same
---
src/gallium/drivers/softpipe/sp_image.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/softpipe/sp_image.c
b/src/gallium/drivers/softpipe/sp_image.c
index a7c7328..f72c4e7 100
From: Marek Olšák
we should use MESA_SHADER_* everywhere, but we're not ready for that yet
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c | 6 +-
src/gallium/auxiliary/nir/tgsi_to_nir.c | 16 +--
src/gallium/auxiliary/tgsi/tgsi_dump.c| 10 +-
src/gallium/auxiliar
From: Marek Olšák
and remove number assignments which are consecutive
---
src/gallium/include/pipe/p_defines.h | 378 +++
1 file changed, 205 insertions(+), 173 deletions(-)
diff --git a/src/gallium/include/pipe/p_defines.h
b/src/gallium/include/pipe/p_defines.h
This series is,
Reviewed-by: Edward O'Callaghan
On 2016-04-16 22:50, Marek Olšák wrote:
From: Marek Olšák
---
src/gallium/drivers/radeon/r600_query.h | 43
++---
1 file changed, 23 insertions(+), 20 deletions(-)
diff --git a/src/gallium/drivers/radeon/r600_que
Patches 1 & 2 are,
Reviewed-by: Edward O'Callaghan
i`ll have to spend some time looking at the others tomorrow..
On 2016-04-16 22:50, Marek Olšák wrote:
From: Marek Olšák
and remove number assignments which are consecutive
---
src/gallium/include/pipe/p_defines.h | 378
+++
On 2016-04-16 20:20, Marek Olšák wrote:
On Sat, Apr 16, 2016 at 8:04 AM, Michel Dänzer
wrote:
On 16.04.2016 14:51, Michel Dänzer wrote:
On 16.04.2016 11:39, Tom Stellard wrote:
The ds_bpermute instruction allows threads to transfer data directly
to or from the vgprs of other threads. These i
In order to support cases where gen9 uses RGBA format to back client
requested RGB, one needs to have means to force alpha channel to one
when user requested RGB surface is used as blit source.
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_blorp.cpp | 3 ++-
src/mesa/d
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index 444ba26..35ab9af 100644
--- a/src
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_blorp_blit.cpp| 2 +-
src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp | 3 ++-
src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 2 +-
src/mesa/drivers/dri/i965/brw_fs.h | 2 +-
src/mesa/drivers/dri/i965/brw_fs
This series adds blorp pipeline upload support for gen8 and gen9,
switches over to blorp blits (except for 2X and 16X msaa which don't
have support in blorp yet) and finally re-introduces blorp clears
for gen6-9. This makes it possible to close bug 94181 preventing
single sample compression getting
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_state.h | 3 +++
src/mesa/drivers/dri/i965/gen8_misc_state.c | 3 +--
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_state.h
b/src/mesa/drivers/dri/i965/brw_state.h
index 9a2d1ad
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/gen8_misc_state.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/gen8_misc_state.c
b/src/mesa/drivers/dri/i965/gen8_misc_state.c
index a46b252..c0014e5 100644
--- a/src/mesa/drivers/dri
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/gen6_blorp.cpp | 30 ++
1 file changed, 22 insertions(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp
b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
index f3ce42c..d635962 100644
--- a
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_state.h | 15
src/mesa/drivers/dri/i965/gen8_surface_state.c | 51 +-
2 files changed, 41 insertions(+), 25 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_state.h
b/src/mesa/driv
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/gen7_blorp.cpp | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp
b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
index eae1e30..4debeb3 100644
--- a/src/mesa/drivers/dri/i965
Currently the size is sizeof(float) times too large. One reserves
GEN6_BLORP_VBO_SIZE many floats whereas GEN6_BLORP_VBO_SIZE stands
for the size of vertex buffer in bytes.
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/gen6_blorp.cpp | 31 ++-
1 file c
Otherwise switch from blorp to compute failes. Note that this now
follows the normal i965 upload logic found in gen7_upload_urb().
Effectively vs_size changes from 2 to 1 and vs_start from 2 to 4.
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/gen7_blorp.cpp | 19 ++--
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=94181
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipm
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_clear.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_clear.c
b/src/mesa/drivers/dri/i965/brw_clear.c
index 841ba5d..d57b677 100644
--- a/src/mesa/drivers/dri/i965/brw_clear.c
+++ b/src
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 44 ++---
src/mesa/drivers/dri/i965/brw_meta_util.h | 8 +
2 files changed, 33 insertions(+), 19 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c
b/src/m
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_blorp.h| 39
src/mesa/drivers/dri/i965/gen7_blorp.cpp | 22 +-
2 files changed, 50 insertions(+), 11 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h
b/src/mesa/
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_blorp.cpp | 3 ++-
src/mesa/drivers/dri/i965/gen6_blorp.cpp | 5 +
src/mesa/drivers/dri/i965/gen8_blorp.cpp | 4 +++-
3 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp
b/s
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 10 +-
src/mesa/drivers/dri/i965/brw_meta_util.h | 5 +
2 files changed, 10 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c
b/src/mesa/drivers/dri/
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_blorp.cpp | 4
src/mesa/drivers/dri/i965/brw_blorp.h| 1 +
src/mesa/drivers/dri/i965/gen6_blorp.cpp | 5 +
src/mesa/drivers/dri/i965/gen8_blorp.cpp | 9 +
4 files changed, 19 insertions(+)
diff --git a/src/me
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_blorp.cpp | 1 +
src/mesa/drivers/dri/i965/brw_blorp.h| 1 +
src/mesa/drivers/dri/i965/gen7_blorp.cpp | 2 ++
src/mesa/drivers/dri/i965/gen8_blorp.cpp | 1 +
4 files changed, 5 insertions(+)
diff --git a/src/mesa/drivers/dri/
Also add the additional render format check to the same utility.
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 40 -
src/mesa/drivers/dri/i965/brw_meta_util.h | 5
2 files changed, 25 insertions(+), 20 deletions(-)
diff
In case there is no source it means the program does a simple
clear or a resolve. In such case there is no need to program
sampling state or enable pixel kill in fragment shader.
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/gen6_blorp.cpp | 13 +
src/mesa/drivers/dri
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_blorp.cpp | 3 ++-
src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 4 ++--
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp
b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 26 +++--
src/mesa/drivers/dri/i965/brw_meta_util.h | 5 +
2 files changed, 21 insertions(+), 10 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c
b/src/m
Generator is only needed for getting the assembly.
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_blorp_blit.cpp| 23 ++-
src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp | 22 --
src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h | 6 +
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/Makefile.sources | 1 +
src/mesa/drivers/dri/i965/brw_blorp.h | 3 +
src/mesa/drivers/dri/i965/gen8_blorp.cpp | 694 +
3 files changed, 698 insertions(+)
create mode 100644 src/mesa/drivers/dri/i
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/gen8_ds_state.c | 22 ++
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen8_ds_state.c
b/src/mesa/drivers/dri/i965/gen8_ds_state.c
index d91eb77..976e3cc 100644
--- a/src/
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 16 +---
src/mesa/drivers/dri/i965/brw_meta_util.h | 6 ++
2 files changed, 15 insertions(+), 7 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c
b/src/mesa/drive
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 10 ++
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 9 +++--
2 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
b/src/mesa/drivers/dri/i96
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_blorp.cpp | 6 +-
src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 8 +---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 3 +--
3 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i96
which results into, for example, urb configuration to be re-emitted
even though it is not needed. There are a few emitters that rely
solely on BRW_NEW_CONTEXT in driver state. These can be addressed
using GL-state instead (similarly to gen8_hiz_exec()):
gen6_sf_state: _NEW_PROGRAM
gen7_sf_st
On gen8 color resolving won't work anymore if the target isn't
the first entry in the binding table.
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_blorp.h | 2 +-
src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp | 4
2 files changed, 5 insertions(+), 1 deletion(
This partially reverts 2f28a0dc23165123cf1e8b5942acad37878edd8a
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/Makefile.sources| 1 +
src/mesa/drivers/dri/i965/brw_blorp.h | 8 +
src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 4 +-
src/mesa/drivers/dri/i965/brw_
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_blorp.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp
b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index 618949c..5f0083c 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
+++ b/sr
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_blorp.cpp | 4 +++-
src/mesa/drivers/dri/i965/gen7_blorp.cpp | 2 ++
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp
b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index 5f0083c..c
Otherwise clearing with blorp will regress performance in some
synthetic test cases.
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/gen7_blorp.cpp | 14 ++
1 file changed, 14 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp
b/src/mesa/drivers/dri/i
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_blorp.cpp | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp
b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index 1d3b3e2..04a2a74 100644
--- a/src/mesa/drivers/dri/i965/brw_bl
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_context.h | 1 +
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 3 ++-
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 7 +--
src/mesa/drivers/dri/i965/gen8_surface_state.c| 7 ---
4 files changed, 12
I noticed using one synthetic benchmark a sequence where hiz depth
operations are run first followed by a color buffer clear. In such
case there is a difference between blorp and meta clear where meta
configures L3 but blorp doesn't. I didn't see any problems in
practise without the configure but t
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 2 +-
src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tr
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 34 +
src/mesa/drivers/dri/i965/brw_meta_util.h | 2 +-
2 files changed, 19 insertions(+), 17 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c
b/src/mesa
This patch adds additional MOV instruction for all blorp programs
that use SHADER_OPCODE_TXF. Alternative is to augment blorp program
key to tell if z-coordinate is needed, add condition to the blorp
blit compiler and to produce a variant with and without the MOV.
This seems a little overkill.
Sig
Am 16.04.2016 um 15:19 schrieb eocallag...@alterapraxis.com:
> On 2016-04-16 20:20, Marek Olšák wrote:
>> On Sat, Apr 16, 2016 at 8:04 AM, Michel Dänzer
>> wrote:
>>> On 16.04.2016 14:51, Michel Dänzer wrote:
On 16.04.2016 11:39, Tom Stellard wrote:
> The ds_bpermute instruction allows th
On Sat, Apr 16, 2016 at 3:28 PM, Roland Scheidegger wrote:
> Am 16.04.2016 um 15:19 schrieb eocallag...@alterapraxis.com:
>> On 2016-04-16 20:20, Marek Olšák wrote:
>>> On Sat, Apr 16, 2016 at 8:04 AM, Michel Dänzer
>>> wrote:
On 16.04.2016 14:51, Michel Dänzer wrote:
> On 16.04.2016 11:
On Sat, Apr 16, 2016 at 10:36 AM, Marek Olšák wrote:
> On Sat, Apr 16, 2016 at 3:28 PM, Roland Scheidegger
> wrote:
>> Am 16.04.2016 um 15:19 schrieb eocallag...@alterapraxis.com:
>>> On 2016-04-16 20:20, Marek Olšák wrote:
On Sat, Apr 16, 2016 at 8:04 AM, Michel Dänzer
wrote:
> O
On Sat, Apr 16, 2016 at 8:50 AM, Marek Olšák wrote:
> From: Marek Olšák
>
> we should use MESA_SHADER_* everywhere, but we're not ready for that yet
H not sure if this is right. I thought the idea is that TGSI
should be its own self-contained encoding of things, and the shader
type is on
From: Nicolai Hähnle
---
We will soon claim GLES 3.1 support, which requires gl_HelperInvocation,
so now is the time to do this.
This depends on LLVM support: http://reviews.llvm.org/D19191
docs/GL3.txt | 2 +-
src/gallium/drivers/radeonsi/si_shader.c | 11
On 16.04.2016 05:20, Marek Olšák wrote:
On Sat, Apr 16, 2016 at 8:04 AM, Michel Dänzer wrote:
On 16.04.2016 14:51, Michel Dänzer wrote:
On 16.04.2016 11:39, Tom Stellard wrote:
The ds_bpermute instruction allows threads to transfer data directly
to or from the vgprs of other threads. These i
All,
With Topi's gen8/9 blorp patches on the list, I wanted to start a brief
discussion about the future of blorp in the hopes of us all being on the
same page and not stepping on each other's toes. I think everyone is now
agreed that blorp is the future and GL meta should die.
As we continue to
These are just fixes for error paths.
Juha-Pekka Heikkila (2):
meta: Avoid random memory access on error
meta: initialize values to avoid random behaviour on error path
src/mesa/drivers/common/meta_copy_image.c | 2 +-
src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c | 2 +-
2 files
Initialize drawFb to NULL in _mesa_meta_CopyImageSubData_uncompressed()
if getting readFb fails uninitialized drawFb will cause randomness
on cleanup.
Signed-off-by: Juha-Pekka Heikkila
---
src/mesa/drivers/common/meta_copy_image.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --gi
if brw_meta_stencil_blit() errored at wrong place 'target' would
be uninitialized and cause random behaviour on leaving the funtion.
Signed-off-by: Juha-Pekka Heikkila
---
src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/me
On Sat, Apr 16, 2016 at 8:50 AM, Marek Olšák wrote:
> From: Marek Olšák
>
> and remove number assignments which are consecutive
> ---
> src/gallium/include/pipe/p_defines.h | 378
> +++
> 1 file changed, 205 insertions(+), 173 deletions(-)
>
> diff --git a/src/ga
C++ doesn't support designated initializers and g++ in particular doesn't
handle them when the struct gets complicated, i.e. has a union.
---
src/intel/isl/isl.h | 32
1 file changed, 20 insertions(+), 12 deletions(-)
diff --git a/src/intel/isl/isl.h b/src/intel/i
This little series switches our back-end compiler to use libisl for the
surface format introspection it needs for doing image_load_store shader
work-arounds. Format introspection is the one place where thet back-end
compilers still have a dependency on libmesa.
Once this dependency is removed, we
---
configure.ac | 3 ++-
src/Makefile.am | 9 +++--
src/intel/Makefile.am | 4
src/mesa/drivers/dri/i965/Makefile.am | 7 ++-
4 files changed, 15 insertions(+), 8 deletions(-)
diff --git a/configure.ac b/configure.ac
ind
---
.../drivers/dri/i965/brw_fs_surface_builder.cpp| 55 ++
1 file changed, 55 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
b/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
index 0932336..23ad511 100644
--- a/src/mesa/drivers/dri/i
---
.../drivers/dri/i965/brw_fs_surface_builder.cpp| 118 +
1 file changed, 52 insertions(+), 66 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
b/src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp
index 23ad511..fc1fc13 100644
--- a/src/m
---
src/intel/isl/isl.h| 23 +++
src/intel/isl/isl_format.c | 24
2 files changed, 43 insertions(+), 4 deletions(-)
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index c6fe318..c84e685 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/i
We want to call this function from the shader compiler and having a full
isl_device available at that point isn't practical.
---
src/intel/isl/isl.h | 2 +-
src/intel/isl/isl_storage_image.c | 30 +++---
src/intel/isl/isl_surface_state.c | 3 ++-
src/intel/v
---
src/intel/isl/isl_format.c | 34 --
1 file changed, 16 insertions(+), 18 deletions(-)
diff --git a/src/intel/isl/isl_format.c b/src/intel/isl/isl_format.c
index 32bd701..b0450d9 100644
--- a/src/intel/isl/isl_format.c
+++ b/src/intel/isl/isl_format.c
@@ -25,32
---
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 8 +++-
src/mesa/drivers/dri/i965/brw_fs_surface_builder.cpp | 7 +--
src/mesa/drivers/dri/i965/brw_fs_surface_builder.h | 4 ++--
3 files changed, 10 insertions(+), 9 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_n
C++ doesn't define the "restrict" keyword so g++ barfs when it sees isl.h.
Having our own define lets us define it to be a no-op for C++.
---
src/intel/isl/isl.h | 18 ++
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index
---
src/intel/vulkan/anv_image.c | 15 +++
1 file changed, 3 insertions(+), 12 deletions(-)
diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index 7236b81..03a8cb8 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -424,16 +424,6 @@
Previously, we were relying on has_matching_typed_format returning true for
MESA_FORMAT_NONE which, in turn, relied on _mesa_get_format_bytes returning
1 for MESA_FORMAT_NONE. When we switch to ISL, this behaviour will no
longer be something we can rely on.
---
src/mesa/drivers/dri/i965/brw_fs_su
---
src/intel/isl/isl.h | 7 +++
src/intel/isl/isl_storage_image.c | 10 ++
2 files changed, 17 insertions(+)
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index 2982bad..c6fe318 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -912,6 +912,13 @@ en
---
src/intel/isl/isl.h| 2 ++
src/intel/isl/isl_format.c | 15 +++
2 files changed, 17 insertions(+)
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index c84e685..bef2592 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -863,6 +863,8 @@ isl_format_has_in
mcpu=generic doesn't enable sse2, and anvil definitly needs it
---
src/intel/vulkan/Makefile.am | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/vulkan/Makefile.am b/src/intel/vulkan/Makefile.am
index cba6671..a84be72 100644
--- a/src/intel/vulkan/Makefile.am
+++ b/src
This lets us delete some redundant code and keep all of the
image_load_store format lowering logic in one place: libisl.
---
src/mesa/drivers/dri/i965/brw_context.h | 2 -
src/mesa/drivers/dri/i965/brw_surface_formats.c | 109 ---
src/mesa/drivers/dri/i965/brw_wm_su
---
src/intel/vulkan/Makefile.am | 9 +
src/intel/vulkan/anv_private.h | 3 ---
2 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/src/intel/vulkan/Makefile.am b/src/intel/vulkan/Makefile.am
index cba6671..a201bed 100644
--- a/src/intel/vulkan/Makefile.am
+++ b/src/intel/vul
On Sat, Apr 16, 2016 at 8:17 PM, Nicolai Hähnle wrote:
> On 16.04.2016 05:20, Marek Olšák wrote:
>>
>> On Sat, Apr 16, 2016 at 8:04 AM, Michel Dänzer wrote:
>>>
>>> On 16.04.2016 14:51, Michel Dänzer wrote:
On 16.04.2016 11:39, Tom Stellard wrote:
>
> The ds_bpermute instruction
On Sat, Apr 16, 2016 at 9:40 PM, Rob Clark wrote:
> On Sat, Apr 16, 2016 at 8:50 AM, Marek Olšák wrote:
>> From: Marek Olšák
>>
>> and remove number assignments which are consecutive
>> ---
>> src/gallium/include/pipe/p_defines.h | 378
>> +++
>> 1 file changed,
On Sat, Apr 16, 2016 at 6:54 PM, Ilia Mirkin wrote:
> On Sat, Apr 16, 2016 at 8:50 AM, Marek Olšák wrote:
>> From: Marek Olšák
>>
>> we should use MESA_SHADER_* everywhere, but we're not ready for that yet
>
> H not sure if this is right. I thought the idea is that TGSI
> should be its o
https://bugs.freedesktop.org/show_bug.cgi?id=94972
Bug ID: 94972
Summary: blend failures on llvmpipe with llvm 3.7 due to vector
selects
Product: Mesa
Version: git
Hardware: All
OS: All
Status: N
From: Roland Scheidegger
llvm 3.7 sometimes simply miscompiles vector selects.
See https://bugs.freedesktop.org/show_bug.cgi?id=94972
---
src/gallium/auxiliary/gallivm/lp_bld_logic.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_
On Sat, Apr 16, 2016 at 5:04 PM, Marek Olšák wrote:
> On Sat, Apr 16, 2016 at 9:40 PM, Rob Clark wrote:
>> On Sat, Apr 16, 2016 at 8:50 AM, Marek Olšák wrote:
>>> From: Marek Olšák
>>>
>>> and remove number assignments which are consecutive
>>> ---
>>> src/gallium/include/pipe/p_defines.h | 37
On Sat, Apr 16, 2016 at 5:49 PM, Rob Clark wrote:
> On Sat, Apr 16, 2016 at 5:04 PM, Marek Olšák wrote:
>> On Sat, Apr 16, 2016 at 9:40 PM, Rob Clark wrote:
>>> On Sat, Apr 16, 2016 at 8:50 AM, Marek Olšák wrote:
From: Marek Olšák
and remove number assignments which are consecut
https://bugs.freedesktop.org/show_bug.cgi?id=92850
higu...@gmx.net changed:
What|Removed |Added
CC||higu...@gmx.net
--
You are receiving t
Makes me wonder why we didn't use enums in the first place.
But I can't think of any disadvantages.
Reviewed-by: Roland Scheidegger
Am 16.04.2016 um 14:50 schrieb Marek Olšák:
> From: Marek Olšák
>
> and remove number assignments which are consecutive
> ---
> src/gallium/include/pipe/p_define
Reviewed-by: Roland Scheidegger
Am 16.04.2016 um 14:50 schrieb Marek Olšák:
> From: Marek Olšák
>
> ---
> src/gallium/include/pipe/p_shader_tokens.h | 303
> -
> 1 file changed, 164 insertions(+), 139 deletions(-)
>
> diff --git a/src/gallium/include/pipe/p_shader
Am 16.04.2016 um 14:50 schrieb Marek Olšák:
> From: Marek Olšák
>
> Use PIPE_SWIZZLE_* everywhere.
> Use X/Y/Z/W/0/1 instead of RED, GREEN, BLUE, ALPHA, ZERO, ONE.
> The new enum is called pipe_swizzle.
Using PIPE_SWIZZLE insteads sounds reasonable.
Not sure though how I feel about using X/Y/Z/W
Am 16.04.2016 um 14:50 schrieb Marek Olšák:
> From: Marek Olšák
>
> we should use MESA_SHADER_* everywhere, but we're not ready for that yet
> ---
I think the idea initially was that tgsi is essentially self-contained:
you can parse the token stream without any "external" dependencies.
Feels a b
On 16 April 2016 at 22:04, Marek Olšák wrote:
> On Sat, Apr 16, 2016 at 9:40 PM, Rob Clark wrote:
>> On Sat, Apr 16, 2016 at 8:50 AM, Marek Olšák wrote:
>>> From: Marek Olšák
>>>
>>> and remove number assignments which are consecutive
>>> ---
>>> src/gallium/include/pipe/p_defines.h | 378
>>>
On 16 April 2016 at 23:15, Roland Scheidegger wrote:
> Am 16.04.2016 um 14:50 schrieb Marek Olšák:
>> From: Marek Olšák
>>
>> Use PIPE_SWIZZLE_* everywhere.
>> Use X/Y/Z/W/0/1 instead of RED, GREEN, BLUE, ALPHA, ZERO, ONE.
>> The new enum is called pipe_swizzle.
>
> Using PIPE_SWIZZLE insteads so
On 16 April 2016 at 20:45, Jason Ekstrand wrote:
> This little series switches our back-end compiler to use libisl for the
> surface format introspection it needs for doing image_load_store shader
> work-arounds. Format introspection is the one place where thet back-end
> compilers still have a d
For this v2 I did the following changes:
- Use Nicolai's proposed dirty mask structure.
- Use load packets to reinitialize CE ram.
- Use a preamble IB for reinitializing CE ram. I've made the
preamble IB optional in radeonsi, as the radeon kernel
driver does not support it as far as I ca
From: Marek Olšák
Not used by drivers.
Reviewed-by: Bas Nieuwenhuizen
---
src/gallium/drivers/radeon/radeon_winsys.h| 1 -
src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 8
src/gallium/winsys/amdgpu/drm/amdgpu_cs.h | 1 +
src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 10
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