[Mesa-dev] [PATCH] mesa: refactor active attrib queries for glGetProgramiv

Main motivation here is to get rid of iterating IR and encapsulate queries within program resources. No functional changes. Piglit tests calling the modified functionality: - gl-get-active-attrib-returns-all-inputs - glsl-1.50-get-active-attrib-array - getactiveattrib Signed-off-by: Tap

Re: [Mesa-dev] [RFC PATCH 1/2] glsl: Transform pow(x, 4) into (x*x)*(x*x).

On 22.04.2015 20:14, Matt Turner wrote: > On Fri, Apr 17, 2015 at 1:56 PM, Matt Turner wrote: >> Updated numbers look a lot better! >> >> On Tue, Mar 17, 2015 at 4:23 PM, Matt Turner wrote: >>> Without NIR: >>> >>> total instructions in shared programs: 6190374 -> 6190153 (-0.00%) >>> instruction

Re: [Mesa-dev] [PATCH] draw: fix prim ids when there's no gs

On 23/04/15 00:06, srol...@vmware.com wrote: From: Roland Scheidegger We were resetting the prim id count for each run of the prim assembler, hence this only worked when the draw calls were very small (the exact limit depending on the vertex size), since larger draw calls get split up. So, do t

[Mesa-dev] [PATCH] mesa: fix glGetActiveUniformsiv regression

Commit 7519ddb caused regression to glGetActiveUniformsiv. Patch adds back validation loop of all given uniforms before writing any values, not touching params in case of errors is tested by the conformance suite. Signed-off-by: Tapani Pälli Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=

Re: [Mesa-dev] [PATCH] mesa: fix glGetActiveUniformsiv regression

On 23/04/15 14:19, Tapani Pälli wrote: Commit 7519ddb caused regression to glGetActiveUniformsiv. Patch adds back validation loop of all given uniforms before writing any values, not touching params in case of errors is tested by the conformance suite. Signed-off-by: Tapani Pälli Bugzilla: http

Re: [Mesa-dev] [PATCH] mesa: refactor active attrib queries for glGetProgramiv

On 23/04/15 11:13, Tapani Pälli wrote: Main motivation here is to get rid of iterating IR and encapsulate queries within program resources. No functional changes. Piglit tests calling the modified functionality: - gl-get-active-attrib-returns-all-inputs - glsl-1.50-get-active-attrib-a

Re: [Mesa-dev] [Mesa-stable] [PATCH] clover: Call clBuildProgram() notification function when build completes

Humble ping. -Emil On 08/04/15 18:34, Emil Velikov wrote: > Hi Tom, > > Just a friendly reminder that this patch hasn't landed in master yet. > Just making sure it doesn't fall through the cracks :-) > > Cheers > Emil > > On 24 March 2015 at 19:44, Tom Stellard wrote: >> Cc: 10.5 10.4 >> ---

Re: [Mesa-dev] [PATCH 03/14] i965: Add helper functions to calculate the slice pitch of an array or 3D miptree.

I'm going to push patches 3 to 5 from this old series in 48h, they're too much effort to keep up to date. Francisco Jerez writes: > --- > src/mesa/drivers/dri/i965/brw_tex_layout.c| 45 > +-- > src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 18 +++ > 2 file

[Mesa-dev] New stable-branch 10.5 candidate pushed

Hello list, The candidate for the Mesa 10.5.4 is now available. The current patch queue is as follows: - 22 queued - 7 nominated (outstanding) - and 1 rejected (obsolete) patches This time around we have a handful of fixes in st/mesa and the glsl to tgsi codebase, affecting all gallium drivers

Re: [Mesa-dev] [Mesa-stable] [PATCH] clover: Call clBuildProgram() notification function when build completes

Emil Velikov writes: > Humble ping. > This patch is obsolete. IIRC Tom sent a v2 to which I replied with some (mostly trivial) suggestions. There's no v3 yet AFAIK. > -Emil > > On 08/04/15 18:34, Emil Velikov wrote: >> Hi Tom, >> >> Just a friendly reminder that this patch hasn't landed in ma

Re: [Mesa-dev] [PATCH] mesa: fix glGetActiveUniformsiv regression

On Thu, Apr 23, 2015 at 7:34 AM, Martin Peres wrote: > On 23/04/15 14:19, Tapani Pälli wrote: >> >> Commit 7519ddb caused regression to glGetActiveUniformsiv. >> Patch adds back validation loop of all given uniforms before >> writing any values, not touching params in case of errors >> is tested b

Re: [Mesa-dev] Initial amdgpu driver release

On 21/04/15 16:41, Alex Deucher wrote: > On Tue, Apr 21, 2015 at 11:56 AM, Emil Velikov > wrote: >> Hi Alex, >> >> On 20 April 2015 at 23:33, Alex Deucher wrote: >>> I'm pleased to announce the initial release of the new amdgpu driver. >>> This is a partial replacement for the radeon driver for

Re: [Mesa-dev] New stable-branch 10.5 candidate pushed

Hi, On 23 April 2015 at 14:12, Emil Velikov wrote: > Boyan Ding (2): > i965: Add XRGB format to intel_screen_make_configs > i915: Add XRGB format to intel_screen_make_configs This fixes https://bugs.freedesktop.org/show_bug.cgi?id=89689 but re-breaks ES3 MSAA by reverting htt

Re: [Mesa-dev] [PATCH] gallium/radeon: don't crash when getting out-of-bounds TEMP references

On Sat, Apr 11, 2015 at 09:11:13PM +0200, Marek Olšák wrote: > From: Marek Olšák Reviewed-by: Tom Stellard > > --- > src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c | 6 ++ > 1 file changed, 6 insertions(+) > > diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c > b/src/g

Re: [Mesa-dev] [PATCH v4] i965/aa: fixing anti-aliasing bug for thinnest width lines - GEN7

> -Original Message- > From: Matt Turner [mailto:matts...@gmail.com] > Sent: Thursday, April 23, 2015 12:55 AM > To: Predut, Marius > Cc: mesa-dev@lists.freedesktop.org > Subject: Re: [Mesa-dev] [PATCH v4] i965/aa: fixing anti-aliasing bug for > thinnest width lines - GEN7 > > On Thu, Apr

[Mesa-dev] [PATCH v5] i965/aa: fixing anti-aliasing bug for thinnest width lines - GEN6

On SNB and IVB hw, for 1 pixel line thickness or less, the general anti-aliasing algorithm give up - garbage line is generated. Setting a Line Width of 0.0 specifies the rasterization of the “thinnest” (one-pixel-wide), non-antialiased lines. Lines rendered with zero Line Width are rasterized using

[Mesa-dev] [PATCH v5] i965/aa: fixing anti-aliasing bug for thinnest width lines - GEN7

On SNB and IVB hw, for 1 pixel line thickness or less, the general anti-aliasing algorithm give up - garbage line is generated. Setting a Line Width of 0.0 specifies the rasterization of the “thinnest” (one-pixel-wide), non-antialiased lines. Lines rendered with zero Line Width are rasterized using

[Mesa-dev] [PATCH] mesa: add support for exposing up to GL4.2

Add the 4.0/4.1/4.2 extensions lists to compute_version. A coule of extensions aren't in mesa yet, so those are marked with 0 until they become supported. Signed-off-by: Ilia Mirkin --- I wasn't 100% sure about shading_language_packing -- it includes a couple of functions that don't appear until

Re: [Mesa-dev] [PATCH] mesa: add support for exposing up to GL4.2

On Thu, Apr 23, 2015 at 7:53 AM, Ilia Mirkin wrote: > Add the 4.0/4.1/4.2 extensions lists to compute_version. A coule of > extensions aren't in mesa yet, so those are marked with 0 until they > become supported. > > Signed-off-by: Ilia Mirkin > --- > > I wasn't 100% sure about shading_language_p

Re: [Mesa-dev] [PATCH] mesa: add support for exposing up to GL4.2

On Thu, Apr 23, 2015 at 11:08 AM, Matt Turner wrote: > On Thu, Apr 23, 2015 at 7:53 AM, Ilia Mirkin wrote: >> Add the 4.0/4.1/4.2 extensions lists to compute_version. A coule of >> extensions aren't in mesa yet, so those are marked with 0 until they >> become supported. >> >> Signed-off-by: Ilia

Re: [Mesa-dev] [PATCH 09/12] nir: Add a simple growing array data structure

On 13/04/15 01:51, Matt Turner wrote: > On Sun, Apr 12, 2015 at 6:38 PM, Jason Ekstrand wrote: >> >> On Apr 12, 2015 3:24 PM, "Thomas Helland" wrote: >>> >>> Hi, >>> >>> This looks correct as far as I can tell. >>> I have some comments inline, but I don't feel strongly about >>> either of them, s

[Mesa-dev] [PATCH v2] mesa: add support for exposing up to GL4.2

Add the 4.0/4.1/4.2 extensions lists to compute_version. A coule of extensions aren't in mesa yet, so those are marked with 0 until they become supported. Signed-off-by: Ilia Mirkin --- v1 -> v2: move shading_language_packing to 4.2 list src/mesa/main/version.c | 46 +

Re: [Mesa-dev] [PATCH] mesa: add support for exposing up to GL4.2

On Thu, Apr 23, 2015 at 8:15 AM, Ilia Mirkin wrote: > On Thu, Apr 23, 2015 at 11:08 AM, Matt Turner wrote: >> On Thu, Apr 23, 2015 at 7:53 AM, Ilia Mirkin wrote: >>> Add the 4.0/4.1/4.2 extensions lists to compute_version. A coule of >>> extensions aren't in mesa yet, so those are marked with 0

Re: [Mesa-dev] [PATCH v2] mesa: add support for exposing up to GL4.2

Reviewed-by: Matt Turner ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 06/16] i965/blorp: Prepare for attributes other than render position

Note that the magic number of one in gen7 logic is replaced by BRW_SF_URB_ENTRY_READ_OFFSET ( == 1 also) for clarity. On gen6 the change from zero to one (BRW_SF_URB_ENTRY_READ_OFFSET) has no effect for native blorp as blorp doesn't use any additional attributes. In fact, regular pipeline setup al

[Mesa-dev] i965: Blorp state setup refactors

This series introduces virtual member functions for blorp parameters that know how certain part of the batch is to be programmed for the shader in question. This will be taken advantage of later on when I add support for launching glsl-based programs. Topi Pohjolainen (16): i965/blorp: Remove c

[Mesa-dev] [PATCH 10/16] i965/blorp: Use virtual function for wm/ps configuration

instead of resolving the program offset and data. Different flavours of blorp programs (blit, clear, hiz) each have its own parameter type. The decision making on how state is configured will be moved for the parameter type to make instead of branching explicitly in the main body of batch submissio

[Mesa-dev] [PATCH 05/16] i965/blorp: Remove unused arguments

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.h| 7 ++- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 20 +++- src/mesa/drivers/dri/i965/gen7_blorp.cpp | 6 +++--- 3 files changed, 12 insertions(+), 21 deletions(-) diff --git a/src/mesa/drivers/dr

[Mesa-dev] [PATCH 01/16] i965/blorp: Remove constant parameter

This was still needed when we had support for blorp clears but now this is fixed to nop. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 1 - src/mesa/drivers/dri/i965/brw_blorp.h| 8 src/mesa/drivers/dri/i965/gen7_blorp.cpp | 11 --- 3 files

[Mesa-dev] [PATCH 11/16] i965/blorp: Move push const setup for the parameter type to handle

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 2 +- src/mesa/drivers/dri/i965/brw_blorp.h| 7 ++- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 22 +++--- src/mesa/drivers/dri/i965/gen6_blorp.h | 2 +- src/mesa/drivers/dri/i965/gen7_blorp

[Mesa-dev] [PATCH 14/16] i965/blorp/gen7: Move surface setup for the parameter type to handle

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.h| 3 ++ src/mesa/drivers/dri/i965/gen7_blorp.cpp | 55 ++-- 2 files changed, 34 insertions(+), 24 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 04/16] i965/gen7/blorp: Remove unused arguments

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen7_blorp.cpp | 75 1 file changed, 28 insertions(+), 47 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp index d841346..c9e7cb7 100644 --

[Mesa-dev] [PATCH 03/16] i965/blorp: Allow caller to provide sampler settings

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.h| 4 +++- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 15 +-- src/mesa/drivers/dri/i965/gen7_blorp.cpp | 3 ++- 3 files changed, 14 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_b

[Mesa-dev] [PATCH 09/16] i965/blorp: Prepare drawing rectangle for flipped coordinates

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp index 4f4d752..21c8423 100644 --- a/src/mesa/drivers/dri/i965/g

[Mesa-dev] [PATCH 16/16] i965/blorp: Move multisample setup for parameter type to handle

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.h| 2 ++ src/mesa/drivers/dri/i965/gen6_blorp.cpp | 14 ++ src/mesa/drivers/dri/i965/gen7_blorp.cpp | 5 + 3 files changed, 13 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_bl

[Mesa-dev] [PATCH 15/16] i965/blorp: Move vertex uploading for parameter type to handle

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.h| 6 ++ src/mesa/drivers/dri/i965/gen6_blorp.cpp | 11 +-- src/mesa/drivers/dri/i965/gen7_blorp.cpp | 2 +- 3 files changed, 8 insertions(+), 11 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blor

[Mesa-dev] [PATCH 13/16] i965/blorp/gen6: Move surface setup for the parameter type to handle

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.h| 5 src/mesa/drivers/dri/i965/gen6_blorp.cpp | 50 ++-- 2 files changed, 34 insertions(+), 21 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i9

[Mesa-dev] [PATCH 07/16] i965/blorp: Allow blend state to be set for multiple render targets

Original blorp writes only one buffer per shader invocation. Once the launch mechanism is shared with glsl-based programs there will be need for supporting multiple render targets. Also drop the always constant color write disable settings. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/d

[Mesa-dev] [PATCH 12/16] i965/blorp: Move sampler setup for the parameter type to handle

Also move the gen >= 7 specific logic into gen6_blorp.ccp, this will help to avoid more duplication when corresponding logic for glsl-based programs is added. Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.h| 9 +++--- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 47 +

[Mesa-dev] [PATCH 08/16] i965/blorp: Add support for layered rendering

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 6 -- src/mesa/drivers/dri/i965/brw_blorp.h| 4 +++- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 2 +- src/mesa/drivers/dri/i965/gen7_blorp.cpp | 2 +- 4 files changed, 9 insertions(+), 5 deletions(-) diff --gi

[Mesa-dev] [PATCH 02/16] i965/blorp: Refactor vertex buffer state setup

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 60 ++-- 1 file changed, 34 insertions(+), 26 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp index e45705a..6c139ec 100644 --

[Mesa-dev] [PATCH 0.5/18] i965/gen8: Use constant pointers for reading miptree details

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen8_surface_state.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c b/src/mesa/drivers/dri/i965/gen8_surface_state.c index 011c685..b9bbb73 100644 --- a/src/mesa/

[Mesa-dev] i965: Don't use gl-context for fbo-blits

This series introduces new blorp parameter type for blit programs compiled from glsl-sources. For most parts the launch logic just calls core i965 batch emission logic. Vertex batches are handcrafted containing full vertex header information. This is needed because the pipeline is programmed to ski

[Mesa-dev] [PATCH 12/14] i965/blorp/gen7: Expose state setup applicable to gen8

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.h| 36 src/mesa/drivers/dri/i965/gen7_blorp.cpp | 20 +- 2 files changed, 46 insertions(+), 10 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/

[Mesa-dev] [PATCH 07/14] i965/blorp: Add support for setting up surfaces for glsl-based blits

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.h| 3 +++ src/mesa/drivers/dri/i965/gen6_blorp.cpp | 30 ++ src/mesa/drivers/dri/i965/gen7_blorp.cpp | 7 +++ 3 files changed, 40 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw

[Mesa-dev] [PATCH 14/14] i965/blorp/gen8: Execution support

Batch emission logic for launching glsl-based programs without reading/writing the current gl-context. Initially I wrote support also for launching the handwritten assembly programs but I took it out. It is very unlikely that we ever want to use them for gen >= 8. The whole idea of this series is

[Mesa-dev] [PATCH 11/14] i965/blorp/gen7: Prepare re-using for gen8

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen7_blorp.cpp | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp index 7ee62f7..d41d592 100644 --- a/src/mesa/drivers/dri/i965

[Mesa-dev] [PATCH 01/14] i965/blorp/gen7: Support for loading glsl-based fragment shaders

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.cpp | 15 + src/mesa/drivers/dri/i965/brw_blorp.h| 41 src/mesa/drivers/dri/i965/gen6_blorp.cpp | 22 + src/mesa/drivers/dri/i965/gen7_blorp.cpp | 54 +

[Mesa-dev] [PATCH 06/14] i965/blorp: Add support for loading vertices for glsl-based blits

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.h| 5 ++ src/mesa/drivers/dri/i965/gen6_blorp.cpp | 94 2 files changed, 99 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h inde

[Mesa-dev] [PATCH 08/14] i965/blorp: Add support for setting samplers for glsl-based blits

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.h| 2 ++ src/mesa/drivers/dri/i965/gen6_blorp.cpp | 30 ++ 2 files changed, 32 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h index

[Mesa-dev] [PATCH 04/14] i965/meta: Add helper for looking up blit programs

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_meta_util.c | 148 ++ src/mesa/drivers/dri/i965/brw_meta_util.h | 9 ++ 2 files changed, 157 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_meta_util.c b/src/mesa/drivers/dri/i965/brw_meta_

[Mesa-dev] [PATCH 05/14] i965/blorp: Add plumbing for glsl-based color blits

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.h| 27 + src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 90 2 files changed, 117 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_

[Mesa-dev] [PATCH 03/14] meta: Provide read access to blit shaders

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/common/meta.c | 17 - src/mesa/drivers/common/meta.h | 5 - 2 files changed, 12 insertions(+), 10 deletions(-) diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c index cf99d95..8c69b5d 100644 ---

[Mesa-dev] [PATCH 02/14] i965/blorp/gen6: Support for loading glsl-based fragment shaders

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_blorp.h| 1 + src/mesa/drivers/dri/i965/gen6_blorp.cpp | 74 2 files changed, 75 insertions(+) diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h index

[Mesa-dev] [PATCH 10/14] i965/blorp: Enable glsl-based fbo blits

Use meta-path instead of blorp for 2D-blits. Reduces cpu-overhead increasing the performance of meta-path. On IVB (blorp disabled and hence meta path enabled) a microbenchmark found in mesa-demos (copypixrate -blit -back): x 62 10665.83 13388.95 11357.77 11467.463 574.57333 + 62 199

[Mesa-dev] [PATCH 09/14] i965/gen6: Add support for setting minimum layer for tex surfaces

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index ad5ddb5..c006762 100644 --- a/src

[Mesa-dev] [PATCH 13/14] i965/blorp/gen6: Prepare vertex buffer setup logic for gen8

Signed-off-by: Topi Pohjolainen --- src/mesa/drivers/dri/i965/gen6_blorp.cpp | 30 ++ 1 file changed, 22 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp index f45dcd4..22ea86c 100644 --- a

Re: [Mesa-dev] [PATCH V2 04/22] i965: Create a helper function intel_miptree_total_width_height()

On Fri, Apr 17, 2015 at 04:51:25PM -0700, Anuj Phogat wrote: > and some more code refactoring. No functional changes in this patch. > > Signed-off-by: Anuj Phogat Reviewed-by: Topi Pohjolainen ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org h

Re: [Mesa-dev] [PATCH V2 03/22] i965: Move intel_miptree_choose_tiling() to brw_tex_layout.c

On Fri, Apr 17, 2015 at 04:51:24PM -0700, Anuj Phogat wrote: > Patch continues code refactoring. > > Signed-off-by: Anuj Phogat > --- > src/mesa/drivers/dri/i965/brw_tex_layout.c| 105 > ++ > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 104 ---

[Mesa-dev] [PATCH] i965: Add an INTEL_DEBUG=spill option to test spilling

--- src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 2 +- src/mesa/drivers/dri/i965/intel_debug.c | 1 + src/mesa/drivers/dri/i965/intel_debug.h | 1 + 3 files changed, 3 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp b/src/mes

Re: [Mesa-dev] [PATCH 01/18] i965: Refactor rb surface setup to allow caller to store offsets

On Wed, Apr 22, 2015 at 1:47 PM, Topi Pohjolainen wrote: > Notice that in gen7_wm_surface_state.c there is also indentation > change in the surrounding code removing tabs. > > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/brw_context.h | 8 +++ > src/mesa/drive

Re: [Mesa-dev] [PATCH 08/18] i965: Move tex miptree and format resolving into dispatcher

On Wed, Apr 22, 2015 at 1:47 PM, Topi Pohjolainen wrote: > All hardware platforms have this in common, so do it in the > hardware independent dispatcher. > > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/brw_context.h | 4 ++- > src/mesa/drivers/dri/i965/brw_wm_sur

Re: [Mesa-dev] [PATCH 02/18] i965: Expose and refactor brw_update_renderbuffer_surfaces()

On Wed, Apr 22, 2015 at 1:47 PM, Topi Pohjolainen wrote: > Note that brw_update_renderbuffer_surfaces() already had a helper > variable which was used in parallel to direct access of the current > draw buffer of the context. > > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/b

Re: [Mesa-dev] [PATCH 06/18] i965: Move texture buffer dispatch into single location

On Wed, Apr 22, 2015 at 1:47 PM, Topi Pohjolainen wrote: > All generations do the same exacr dispatch and it could be typo: exact ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 17/18] i965/ps/gen8: Refactor state uploading

On Wed, Apr 22, 2015 at 1:47 PM, Topi Pohjolainen wrote: > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/brw_state.h | 12 + > src/mesa/drivers/dri/i965/gen8_ps_state.c | 74 > --- > 2 files changed, 59 insertions(+), 27 deletions(-) > > d

Re: [Mesa-dev] [PATCH 18/18] i965/gen8: Expose state base address setup

On Wed, Apr 22, 2015 at 1:47 PM, Topi Pohjolainen wrote: > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/brw_state.h | 3 +++ > src/mesa/drivers/dri/i965/gen8_misc_state.c | 4 ++-- > 2 files changed, 5 insertions(+), 2 deletions(-) > > diff --git a/src/mesa/drivers/dri

Re: [Mesa-dev] [PATCH 13/18] i965: Pass slice details as parameters for surface setup

On Wed, Apr 22, 2015 at 1:47 PM, Topi Pohjolainen wrote: > Also changed a couple of direct shifts into SET_FIELD(). > > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/brw_context.h | 3 ++- > src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 30 > +---

Re: [Mesa-dev] [PATCH 15/18] i965/wm/gen6: Refactor push constant state uploading

On Wed, Apr 22, 2015 at 1:47 PM, Topi Pohjolainen wrote: > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/brw_state.h | 5 > src/mesa/drivers/dri/i965/gen6_wm_state.c | 50 > ++- > 2 files changed, 34 insertions(+), 21 deletions(-) > > di

Re: [Mesa-dev] [PATCH 05/18] i965: Refactor sampler state setup

On Wed, Apr 22, 2015 at 1:47 PM, Topi Pohjolainen wrote: > Signed-off-by: Topi Pohjolainen > --- > src/mesa/drivers/dri/i965/brw_sampler_state.c | 60 > +-- > src/mesa/drivers/dri/i965/brw_state.h | 9 > 2 files changed, 47 insertions(+), 22 deletions(-) >

Re: [Mesa-dev] i965: Batch emission refactoring

I've looked through all 18 patches, and they look fine to me -- but I'm not sure how much that's worth. I noted a bunch of whitespace mistakes (Is there a way to configure git commit to warn you about things like this?) but not much else. I don't know if that's because the series is perfect or if

Re: [Mesa-dev] [PATCH 17/18] i965/ps/gen8: Refactor state uploading

On Thu, Apr 23, 2015 at 11:53:49AM -0700, Matt Turner wrote: > On Wed, Apr 22, 2015 at 1:47 PM, Topi Pohjolainen > wrote: > > Signed-off-by: Topi Pohjolainen > > --- > > src/mesa/drivers/dri/i965/brw_state.h | 12 + > > src/mesa/drivers/dri/i965/gen8_ps_state.c | 74 > >

Re: [Mesa-dev] [PATCH] i965: Add an INTEL_DEBUG=spill option to test spilling

On Thu, Apr 23, 2015 at 2:50 PM, Jason Ekstrand wrote: > diff --git a/src/mesa/drivers/dri/i965/intel_debug.h > b/src/mesa/drivers/dri/i965/intel_debug.h > index 807ad98..e5af998 100644 > --- a/src/mesa/drivers/dri/i965/intel_debug.h > +++ b/src/mesa/drivers/dri/i965/intel_debug.h > @@ -64,6 +64,

Re: [Mesa-dev] [PATCH 18/18] i965/gen8: Expose state base address setup

On Thu, Apr 23, 2015 at 11:53:57AM -0700, Matt Turner wrote: > On Wed, Apr 22, 2015 at 1:47 PM, Topi Pohjolainen > wrote: > > Signed-off-by: Topi Pohjolainen > > --- > > src/mesa/drivers/dri/i965/brw_state.h | 3 +++ > > src/mesa/drivers/dri/i965/gen8_misc_state.c | 4 ++-- > > 2 files cha

Re: [Mesa-dev] i965: Batch emission refactoring

On Thu, Apr 23, 2015 at 11:56:31AM -0700, Matt Turner wrote: > I've looked through all 18 patches, and they look fine to me -- but > I'm not sure how much that's worth. > > I noted a bunch of whitespace mistakes (Is there a way to configure > git commit to warn you about things like this?) but not

Re: [Mesa-dev] [PATCH] i965: Add an INTEL_DEBUG=spill option to test spilling

Ilia Mirkin writes: > That seems awkward... did you mean 1U? FWIW mesa's not at all careful > about that... Or maybe even UINT64_C(1). 1l would still be 32-bit on 32-bit architectures. I guess this is more of a problem for subsequent flags that go over 32-bit. - Neil ___

Re: [Mesa-dev] [PATCH] i965: Add an INTEL_DEBUG=spill option to test spilling

On Apr 23, 2015 12:19 PM, "Neil Roberts" wrote: > > Ilia Mirkin writes: > > > That seems awkward... did you mean 1U? FWIW mesa's not at all careful > > about that... > > Or maybe even UINT64_C(1). 1l would still be 32-bit on 32-bit > architectures. I guess this is more of a problem for subsequent

Re: [Mesa-dev] [PATCH] i965: Add an INTEL_DEBUG=spill option to test spilling

On 2015-04-23 12:01:41, Ilia Mirkin wrote: > On Thu, Apr 23, 2015 at 2:50 PM, Jason Ekstrand wrote: > > diff --git a/src/mesa/drivers/dri/i965/intel_debug.h > > b/src/mesa/drivers/dri/i965/intel_debug.h > > index 807ad98..e5af998 100644 > > --- a/src/mesa/drivers/dri/i965/intel_debug.h > > +++ b/

Re: [Mesa-dev] [PATCH] i965: Add an INTEL_DEBUG=spill option to test spilling

On Thu, Apr 23, 2015 at 3:20 PM, Jason Ekstrand wrote: > > On Apr 23, 2015 12:19 PM, "Neil Roberts" wrote: >> >> Ilia Mirkin writes: >> >> > That seems awkward... did you mean 1U? FWIW mesa's not at all careful >> > about that... >> >> Or maybe even UINT64_C(1). 1l would still be 32-bit on 32-bi

Re: [Mesa-dev] [PATCH] i965: Add an INTEL_DEBUG=spill option to test spilling

On Thu, Apr 23, 2015 at 3:24 PM, Jordan Justen wrote: >> > +#define DEBUG_SPILL (1l << 31) >> >> That seems awkward... did you mean 1U? FWIW mesa's not at all careful >> about that... > > Yeah, I agree. 1l is awkward. > > But I think 1U is just unsigned. I don't think that is guarant

[Mesa-dev] [Bug 90130] gl_PrimitiveId seems to reset at 340

https://bugs.freedesktop.org/show_bug.cgi?id=90130 Roland Scheidegger changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

Re: [Mesa-dev] [PATCH] Fix 32bit compilation with -Werror=implicit-function-declaration

On 23/04/15 18:46, Pali Rohár wrote: On Monday 13 April 2015 22:35:03 Pali Rohár wrote: On Monday 13 April 2015 22:32:10 Brian Paul wrote: On 04/13/2015 01:49 PM, Pali Rohár wrote: On Monday 13 April 2015 21:26:32 Pali Rohár wrote: File glapi_entrypoint.c calls memcpy() function, but does not

Re: [Mesa-dev] [PATCH] Fix 32bit compilation with -Werror=implicit-function-declaration

On Monday 13 April 2015 22:35:03 Pali Rohár wrote: > On Monday 13 April 2015 22:32:10 Brian Paul wrote: > > On 04/13/2015 01:49 PM, Pali Rohár wrote: > > > On Monday 13 April 2015 21:26:32 Pali Rohár wrote: > > >> File glapi_entrypoint.c calls memcpy() function, but does > > >> not include string.h

[Mesa-dev] [PATCH v2 1/2] i965/debug: Use the ull specifier for DEBUG enum defines

The INTEL_DEBUG variable is a uint64_t and if we want a enum value higer than 32 bits, you need to use ull. We might as well use it for all of them. --- src/mesa/drivers/dri/i965/intel_debug.h | 62 - 1 file changed, 31 insertions(+), 31 deletions(-) diff --git a/

[Mesa-dev] [PATCH v2 2/2] i965: Add an INTEL_DEBUG=spill option to test spilling

--- src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 2 +- src/mesa/drivers/dri/i965/intel_debug.c | 1 + src/mesa/drivers/dri/i965/intel_debug.h | 1 + 3 files changed, 3 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp b/src/mes

Re: [Mesa-dev] [PATCH V2 02/22] i965: Choose tiling in brw_miptree_layout() function

On Fri, Apr 17, 2015 at 04:51:23PM -0700, Anuj Phogat wrote: > This refactoring is required by later patches in this series. > > Signed-off-by: Anuj Phogat > --- > src/mesa/drivers/dri/i965/brw_tex_layout.c| 19 +++- > src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 31 > +++

Re: [Mesa-dev] [PATCH v2 1/2] i965/debug: Use the ull specifier for DEBUG enum defines

Both are Reviewed-by: Matt Turner ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH V2 05/22] i965: Pass miptree pointer as function parameter in intel_vertical_texture_alignment_unit

On Fri, Apr 17, 2015 at 04:51:26PM -0700, Anuj Phogat wrote: > Signed-off-by: Anuj Phogat > --- > src/mesa/drivers/dri/i965/brw_tex_layout.c | 18 -- > 1 file changed, 8 insertions(+), 10 deletions(-) > > diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c > b/src/mesa/drive

[Mesa-dev] [PATCH 5/7] i965: Add Gen9 surface state decoding

Gen9 surface state is very similar to the previous generation. The important changes here are aux mode, and the way clear colors work. NOTE: There are some things intentionally left out of this decoding. Signed-off-by: Ben Widawsky --- src/mesa/drivers/dri/i965/brw_state_dump.c | 36 +++

[Mesa-dev] [PATCH 8/8] for test only

--- src/mesa/drivers/dri/i965/intel_debug.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_debug.c b/src/mesa/drivers/dri/i965/intel_debug.c index a5b883c..b4ec59e 100644 --- a/src/mesa/drivers/dri/i965/intel_debug.c +++ b/src/mesa/drivers/dri/

[Mesa-dev] [PATCH 2/7] i965: Add viewport extents (gen8) to batch decode

0x7da0: 0xc1da740e: SF_CLIP VP: guardband xmin = -27.306667 0x7da4: 0x41da740e: SF_CLIP VP: guardband xmax = 27.306667 0x7da4: 0x41da740e: SF_CLIP VP: guardband ymin = -23.405714 0x7da8: 0xc1bb3ee7: SF_CLIP VP: guardband ymax = 23.405714 0x7db0: 0x00

[Mesa-dev] [PATCH 4/7] i965: Add gen8 surface state debug info

AFAICT, none of the old data was wrong (the gen7 decoder), but it wa smissing a bunch of stuff. Adds a tick (') to denote the beginning of the surface state for easier reading. This will be replaced later with some better, but more risky code. OLD: 0x7980: 0x23016000: SURF: 2D BRW_SU

[Mesa-dev] [PATCH 1/7] i965: Add all surface types to the batch decode

It's true that not all surfaces apply for every gen, but for the most part this is what we want. (The unfortunate case is when we use an valid surface, but not for the specific GEN). This was automated with a vim macro. v2: Shortened common forms such as R8G8B8A8->RGBA8. Note that this makes some

[Mesa-dev] [PATCH 3/7] i965: Add gen7+ sampler state to batch debug

OLD: 0x7e00: 0x1000: WM SAMP0: filtering 0x7e04: 0x000d: WM SAMP0: wrapping, lod 0x7e08: 0x: WM SAMP0: default color pointer 0x7e0c: 0x0090: WM SAMP0: chroma key, aniso NEW: 0x7e00: 0x1000: SAMPLER_STATE 0: Disabled = no, Base Mi

[Mesa-dev] [PATCH 0/7] surface state decode improvements (gen8+)

While trying to debug Skylake fast color clears, I noticed that the surface state generated by our decoder was woefully inadequate. Much of the dumped state was so stale as to be useless. Just to be clear, the code is not auto generated from a spec, and so I'm certain there are bugs in the decoder

[Mesa-dev] [PATCH 7/7] i965: Add gen8 blend state

OLD: 0x7340: 0x0080:BLEND: 0x7344: 0x84202100:BLEND: NEW: 0x7340: 0x0080:BLEND: Alpha blend/test 0x7344: 0x000b84202100: BLEND_ENTRY00: Color Buffer Blend factor ONE,ONE,ONE,ONE (src,dst,src alpha, dst alpha)

[Mesa-dev] [PATCH 5/8] i965: Add gen9 surface state decoding

Gen9 is mostly the same as Gen8. NOTE: There are some things intentionally left out of this decoding. Signed-off-by: Ben Widawsky --- src/mesa/drivers/dri/i965/brw_state_dump.c | 30 +++--- 1 file changed, 23 insertions(+), 7 deletions(-) diff --git a/src/mesa/drivers/d

[Mesa-dev] [PATCH 6/7] i965: Add renderbuffer surface indexes to debug

This patch is optional in the series. It does make the output much cleaner, but there is some risk. Sample output: 0x7180: 0x231d7000: SURF005: 2D R8G8B8A8_UNORM VALIGN4 HALIGN4 Y-tiled 0x7184: 0x1800: SURF005: MOCS: 0x18 Base MIP: 3 (0 mips) Surface QPitch: 0 0x7188

Re: [Mesa-dev] [PATCH V2 06/22] i965/gen9: Set tiled resource mode for the miptree

On Fri, Apr 17, 2015 at 04:51:27PM -0700, Anuj Phogat wrote: > Signed-off-by: Anuj Phogat > --- > src/mesa/drivers/dri/i965/brw_tex_layout.c| 2 ++ > src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 6 ++ > 2 files changed, 8 insertions(+) > > diff --git a/src/mesa/drivers/dri/i965/brw_te

Re: [Mesa-dev] [PATCH V2 14/22] i965/gen9: Set vertical and horizontal surface alignments

On Fri, Apr 17, 2015 at 04:51:35PM -0700, Anuj Phogat wrote: > Patch sets the alignments for texture and renderbuffer surfaces. > > Signed-off-by: Anuj Phogat > --- > src/mesa/drivers/dri/i965/gen8_surface_state.c | 34 > +++--- > 1 file changed, 30 insertions(+), 4 deletion

Re: [Mesa-dev] [PATCH V2 13/22] i965: Use BRW_SURFACE_* in place of GL_TEXTURE_*

On Fri, Apr 17, 2015 at 04:51:34PM -0700, Anuj Phogat wrote: > Makes no functional changes in the code. > > Signed-off-by: Anuj Phogat > Reviewed-by: Chris Forbes > --- > src/mesa/drivers/dri/i965/gen8_surface_state.c | 15 +-- > 1 file changed, 9 insertions(+), 6 deletions(-) > >

  1   2   >