[Mesa-dev] [PATCH 07/14] i965/blorp: Add support for setting up surfaces for glsl-based blits

[Topi Pohjolainen]

Signed-off-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
---
 src/mesa/drivers/dri/i965/brw_blorp.h    |  3 +++
 src/mesa/drivers/dri/i965/gen6_blorp.cpp | 30 ++++++++++++++++++++++++++++++
 src/mesa/drivers/dri/i965/gen7_blorp.cpp |  7 +++++++
 3 files changed, 40 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h 
b/src/mesa/drivers/dri/i965/brw_blorp.h
index 92db991..c0f416a 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -454,6 +454,9 @@ public:
 
    virtual void gen6_emit_vertices(struct brw_context *brw) const;
 
+   virtual void gen6_emit_surface_states(struct brw_context *brw);
+   virtual void gen7_emit_surface_states(struct brw_context *brw);
+
 private:
    const float src_x0, src_y0, src_x1, src_y1;
    const struct gl_framebuffer * const read_fb;
diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp 
b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
index 5a4c301..c0e3a06 100644
--- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
@@ -1271,6 +1271,36 @@ brw_meta_blit_params::gen6_emit_vertices(struct 
brw_context *brw) const
    gen6_emit_vertex_elems(brw, true);
 }
 
+void
+brw_meta_blit_params::gen6_emit_surface_states(struct brw_context *brw)
+{
+   brw_update_renderbuffer_surfaces(
+      brw, draw_fb,
+      wm_prog_data->binding_table.render_target_start,
+      wm_stage_state.surf_offset);
+
+   const uint32_t tex_surf_index =
+       wm_prog_data->base.binding_table.texture_start;
+   uint32_t *surf_offset = &wm_stage_state.surf_offset[tex_surf_index];
+
+   /* For texture_3d the layer gets selected using z-sampler coordinate. */
+   const unsigned min_layer = target != GL_TEXTURE_3D ? src.layer : 0;
+   const bool for_gather = false;
+   const bool is_integer_format = false;
+   const unsigned mip_count = 0;
+
+   brw->vtbl.update_texture_surface(brw, src.mt, src.brw_surfaceformat,
+                                    is_integer_format, target, 
+                                    src.mt->logical_depth0, min_layer,
+                                    src.level, mip_count, SWIZZLE_XYZW,
+                                    surf_offset, for_gather);
+
+   const GLbitfield dirty_flags = 0;
+   brw_upload_binding_table(brw, _3DSTATE_BINDING_TABLE_POINTERS_PS,
+                            dirty_flags, &wm_prog_data->base,
+                            &wm_stage_state);
+}
+
 /**
  * \brief Execute a blit or render pass operation.
  *
diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp 
b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
index f52937b..7ee62f7 100644
--- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp
@@ -858,6 +858,13 @@ brw_meta_fs_params::gen7_emit_ps_config(struct brw_context 
*brw) const
                         fast_clear_op);
 }
 
+void
+brw_meta_blit_params::gen7_emit_surface_states(struct brw_context *brw)
+{
+   /* Implementation for gen6 already uses gen-aware jump table. */
+   gen6_emit_surface_states(brw);
+}
+
 /**
  * \copydoc gen6_blorp_exec()
  */
-- 
1.9.3

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