On 07.06.2014 07:42, Marek Olšák wrote:
> All offsets are six-bit signed integers on SI packed into one dword.
> They are set in the same way no matter what the instruction is.
>
> All SAMPLE and GATHER4 instructions, i.e. those which take
> floating-point coordinates, support offsets.
We're not
We have this wonderful thing called an optimizer---maybe we should
consider calling it?
Slightly improves the vertex shaders in Shadowrun Returns, which uses
ARB_vertex_program and ARB_fragment_program:
total instructions in shared programs: 117131 -> 117016 (-0.10%)
instructions in affected prog
On hardware older than gen8 there will be limited stencil texturing
support, enough to support meta blits but not to turn on the
extension itself. Hence surface setup needs to be told through the
context to use stencil indexing.
Additionally there is now signaling for source layer. Stencil blits
u
Hardware before gen8 does not have full stencil texturing support and
therefore the signaling for stencil index mode cannot be done through
the texture itself - but via driver specific context instead.
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c | 3 ---
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_program.h | 20
src/mesa/drivers/dri/i965/brw_wm.c | 14 ++
2 files changed, 34 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_program.h
b/src/mesa/drivers/dri/i965/brw_program.h
in
This series augments the compiler backend for fragment shaders to support
sampling of W-tiled stencil buffers. This capability can be already found
in the blorp programs making copies of stencil buffers.
Just as in case of blorp the buffers are configured as Y-tiled and the
programs are augmented w
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/gen8_surface_state.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c
b/src/mesa/drivers/dri/i965/gen8_surface_state.c
index cd2fb40..f5c75fe 100644
--- a/src/mesa/d
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_defines.h| 2 ++
src/mesa/drivers/dri/i965/brw_fs.cpp | 1 +
src/mesa/drivers/dri/i965/brw_fs.h | 3 +++
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 33 ++
src/mesa/driv
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 33
1 file changed, 22 insertions(+), 11 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index f3efdbc..5
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index c9d9614..f3efdbc 100644
--- a/
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 28 ---
1 file changed, 20 insertions(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index f12f215..
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 30db9f9..0f596e4 100644
--- a/
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 34 ++-
1 file changed, 21 insertions(+), 13 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index b31f491.
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_wm.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c
b/src/mesa/drivers/dri/i965/brw_wm.c
index f9a39ad..c56688c 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 5f40301..d00a65d 10
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index 6a91884..80520fa 100644
--- a/src/mesa/drivers/dri/i965/
These are needed when texturing stencil buffers, otherwise they
are simply ignored.
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_context.h | 12
src/mesa/drivers/dri/i965/intel_tex.c | 49 +
2 files changed, 61 insertions(+)
diff -
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_fs.h | 2 +-
src/mesa/drivers/dri/i965/brw_fs_fp.cpp | 3 +-
src/mesa/drivers/dri/i965/brw_fs_stencil_tex.cpp | 92 +++-
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 23 --
4 f
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_fs_stencil_tex.cpp | 52
src/mesa/drivers/dri/i965/brw_fs_stencil_tex.h | 1 +
2 files changed, 53 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs_stencil_tex.cpp
b/src/mesa/drivers/dri/i96
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 22 ++
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index d00a65d..30db
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/Makefile.sources | 1 +
src/mesa/drivers/dri/i965/brw_fs.h | 1 +
src/mesa/drivers/dri/i965/brw_fs_stencil_tex.cpp | 411 +++
src/mesa/drivers/dri/i965/brw_fs_stencil_tex.h | 74
src/
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 31 ---
1 file changed, 4 insertions(+), 27 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index dd7e57a..0da23ef
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 27 +++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 0f596e4..eba
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/intel_fbo.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c
b/src/mesa/drivers/dri/i965/intel_fbo.c
index e43e18b..6f0d5fc 100644
--- a/src/mesa/drivers/dri/i9
Signed-off-by: Topi Pohjolainen
---
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 37 +--
1 file changed, 27 insertions(+), 10 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 759fef5.
How is this different from the existing SHADER_OPCODE_TXS?
On Mon, Jun 9, 2014 at 7:45 PM, Topi Pohjolainen
wrote:
> Signed-off-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/brw_defines.h| 2 ++
> src/mesa/drivers/dri/i965/brw_fs.cpp | 1 +
> src/mesa/drivers/dri/i9
On Mon, Jun 09, 2014 at 07:56:46PM +1200, Chris Forbes wrote:
> How is this different from the existing SHADER_OPCODE_TXS?
Hold on, I'll need to go and check. There was a definite reason, I
remember the original having a restriction of some kind.
But anyway, this is an oversight of mine - this is
If there are going to be three uses of it now (textureSize,
textureQueryLevels, and your internal use), I think your new name is
better (matches the hardware docs). That rename needn't happen in this
series though.
On Mon, Jun 9, 2014 at 8:00 PM, Pohjolainen, Topi
wrote:
> On Mon, Jun 09, 2014 at
On Monday, June 09, 2014 08:04:20 PM Chris Forbes wrote:
> If there are going to be three uses of it now (textureSize,
> textureQueryLevels, and your internal use), I think your new name is
> better (matches the hardware docs). That rename needn't happen in this
> series though.
FYI, I have some c
On Mon, Jun 09, 2014 at 08:04:20PM +1200, Chris Forbes wrote:
> If there are going to be three uses of it now (textureSize,
> textureQueryLevels, and your internal use), I think your new name is
> better (matches the hardware docs). That rename needn't happen in this
> series though.
I'll try to r
> @@ -465,8 +471,8 @@ gen7_update_renderbuffer_surface(struct brw_context *brw,
> bool is_array = false;
> int depth = MAX2(irb->layer_count, 1);
> const uint8_t mocs = GEN7_MOCS_L3;
> -
> - int min_array_element = irb->mt_layer / MAX2(mt->num_samples, 1);
> + const int min_array_el
Same concern as in patch 11.
On Mon, Jun 9, 2014 at 7:45 PM, Topi Pohjolainen
wrote:
> Signed-off-by: Topi Pohjolainen
> ---
> src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 16 +---
> 1 file changed, 13 insertions(+), 3 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/br
On Mon, Jun 09, 2014 at 08:16:57PM +1200, Chris Forbes wrote:
> > @@ -465,8 +471,8 @@ gen7_update_renderbuffer_surface(struct brw_context
> > *brw,
> > bool is_array = false;
> > int depth = MAX2(irb->layer_count, 1);
> > const uint8_t mocs = GEN7_MOCS_L3;
> > -
> > - int min_array_e
Giving the meta clear program a meaningful name makes it easier to find
in output such as INTEL_DEBUG=fs or INTEL_DEBUG=shader_time. We already
did so for integer programs, but neglected to label the primary program.
Signed-off-by: Kenneth Graunke
---
src/mesa/drivers/common/meta.c | 1 +
1 fil
On Thursday, June 05, 2014 03:03:05 PM Iago Toral Quiroga wrote:
> When a instruction stream ends in a block structure (like a IF/ELSE/ENDIF)
the
> last block's end pointer will not be set, leading to a crash later on in
> fs_live_variables::setup_def_use().
>
> If we have not assigned the end po
On Thursday, June 05, 2014 03:03:08 PM Iago Toral Quiroga wrote:
> In Gen < 6 the hardware generates a runtime bit that indicates whether AA
data
> has to be sent as part of the framebuffer write SEND message. This affects
the
> specific case where we have setup antialiased line rendering and we
On Mon, 2014-06-09 at 02:22 -0700, Kenneth Graunke wrote:
> On Thursday, June 05, 2014 03:03:05 PM Iago Toral Quiroga wrote:
> > When a instruction stream ends in a block structure (like a IF/ELSE/ENDIF)
> the
> > last block's end pointer will not be set, leading to a crash later on in
> > fs_live
On Monday, June 09, 2014 11:29:35 AM Iago Toral wrote:
> On Mon, 2014-06-09 at 02:22 -0700, Kenneth Graunke wrote:
> > On Thursday, June 05, 2014 03:03:05 PM Iago Toral Quiroga wrote:
> > > When a instruction stream ends in a block structure (like a
IF/ELSE/ENDIF)
> > the
> > > last block's end p
Commit 07af0ab changed fs_inst to have 0 sources for texture opcodes
in emit_texture_gen5 (Ironlake, Sandybrige) while fs_generator still
uses a single source from brw_reg struct. Patch sets src as reg_undef
which matches the behavior before the constructor got changed.
Signed-off-by: Tapani Pälli
On Mon, 2014-06-09 at 02:31 -0700, Kenneth Graunke wrote:
> On Thursday, June 05, 2014 03:03:08 PM Iago Toral Quiroga wrote:
> > In Gen < 6 the hardware generates a runtime bit that indicates whether AA
> data
> > has to be sent as part of the framebuffer write SEND message. This affects
> the
>
On Thu, 16 Aug 2012 17:28:19 -0500
Rob Clark wrote:
> From: Rob Clark
>
> Signed-off-by: Rob Clark
> ---
> docs/WL_bind_wayland_display.spec |5 +
> include/EGL/eglmesaext.h |1 +
> 2 files changed, 6 insertions(+)
>
> diff --git a/docs/WL_bind_wayland_display.spec
> b/
We've been allowing `centroid` and `sample` in all kinds of weird places
where they're not valid.
Insist that `sample` is combined with `in` or `out`;
and that `centroid` is combined with `in`, `out`, or the deprecated
`varying`.
V2: Validate this in a more sensible place. This does require an ex
v2: enable also for i915 (Ian)
Signed-off-by: Tapani Pälli
---
src/mesa/drivers/dri/i915/intel_extensions.c | 1 +
src/mesa/drivers/dri/i965/intel_extensions.c | 1 +
src/mesa/state_tracker/st_extensions.c | 1 +
3 files changed, 3 insertions(+)
diff --git a/src/mesa/drivers/dri/i915/inte
On Tuesday, June 10, 2014 09:57:51 AM Chris Forbes wrote:
> We've been allowing `centroid` and `sample` in all kinds of weird places
> where they're not valid.
>
> Insist that `sample` is combined with `in` or `out`;
> and that `centroid` is combined with `in`, `out`, or the deprecated
> `varying`
We need to invalidate the live intervals when inserting new
instructions.
Signed-off-by: Kenneth Graunke
Cc: mesa-sta...@lists.freedesktop.org
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drive
When walking backwards, we want to stop at the head sentinel, which is
where scan_inst->prev->prev == NULL, not scan_inst->prev == NULL.
Fixes random crashes, as well as valgrind errors.
Signed-off-by: Kenneth Graunke
Cc: mesa-sta...@lists.freedesktop.org
---
src/mesa/drivers/dri/i965/brw_fs.cp
https://bugs.freedesktop.org/show_bug.cgi?id=79688
--- Comment #4 from Axel Davy ---
I forgot to precise render-nodes are needed. Did you activate them ?
For recent kernels, you need to precise drm.rnodes=1
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Signed-off-by: Tapani Pälli
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79724
---
src/glsl/ast_to_hir.cpp | 9 +
1 file changed, 9 insertions(+)
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index d1c77f1..131b25f 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src
Before, we always reported zeros in the multisample columns of the
format list. Since PIXELFORMATDESCRIPTOR doesn't have fields for
multisample, we use a new format_info structure to extend that type.
---
src/wgl/wglinfo.c | 145 +
1 file chang
The code did not correctly handle super-string handling. For example,
if we were searching for "WGL_ARB_pixel_format" but we found
"WGL_ARB_pixel_format_float" we'd stop searching and return 0. Now
we search past that initial, incorrect match.
---
src/xdemos/glinfo_common.c | 22 ++
On Mon, Jun 09, 2014 at 12:30:55PM +0300, Tapani P?lli wrote:
> Commit 07af0ab changed fs_inst to have 0 sources for texture opcodes
> in emit_texture_gen5 (Ironlake, Sandybrige) while fs_generator still
> uses a single source from brw_reg struct. Patch sets src as reg_undef
> which matches the beh
https://bugs.freedesktop.org/show_bug.cgi?id=79688
--- Comment #5 from Tobias Klausmann ---
Hmm you were right, drm.rnodes=1 was missing but it still fails with a 3.15
kernel. Is there a kernel config i'm missing? :/
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https://bugs.freedesktop.org/show_bug.cgi?id=79688
--- Comment #6 from Axel Davy ---
If you have render-nodes, you should have /dev/dri/render12X (X a number)
existing.
Could you try 'udevadm info' on them ? They should advertise the tag
'ID_PATH_TAG'.
If this tag is advertised, could you show
https://bugs.freedesktop.org/show_bug.cgi?id=79688
--- Comment #7 from Tobias Klausmann ---
udevadm info /dev/dri/renderD128
P: /devices/pci:00/:00:02.0/drm/renderD128
N: dri/renderD128
E: DEVNAME=/dev/dri/renderD128
E: DEVPATH=/devices/pci:00/:00:02.0/drm/renderD128
E: DEVTYPE=dr
https://bugs.freedesktop.org/show_bug.cgi?id=79688
--- Comment #8 from Axel Davy ---
I know ID_PATH_TAG is a rather recent flag.
At first it was only computed for /dev/dri/cardX,
but with a relatively recent patch (which I believe was merged at the end of
last year) it should be computed for /de
Fixes es3 cts test framebuffer_blit_functionality_scissor_blit.test
on bdw. Viewport changes are tracked by 'brw_cc_vp' which in turn
signals CACHE_NEW_CC_VP that should be tracked by 'brw_cc_unit'. On
gen4 this is the case but not on any newer.
For some reason gen5-7 don't suffer from the missing
On Mon, Jun 09, 2014 at 05:14:38PM +0300, Topi Pohjolainen wrote:
> Fixes es3 cts test framebuffer_blit_functionality_scissor_blit.test
> on bdw. Viewport changes are tracked by 'brw_cc_vp' which in turn
> signals CACHE_NEW_CC_VP that should be tracked by 'brw_cc_unit'. On
> gen4 this is the case b
This is probably one of the most difficult tasks. You'll need to:
1) Add support to Mesa core - new shader stages and the new OpenGL
functions and queries (src/mesa/main)
2) Add support to the GLSL compiler (src/glsl)
3) Add support to the Gallium interface and TGSI
(src/gallium/include/pipe) an
I don't think that OpenGL ICD should advertise multi-sample formats via the
standard DescribePixelFormat.
http://www.opengl.org/registry/specs/ARB/wgl_pixel_format.txt states:
Indices are assigned to pixel formats in the following order:
1. Accelerated pixel formats that are displayabl
Hey Tapani,
I came across this issue the other day too and can at least confirm
that I wrote an almost identical patch.
I was a bit unsure whether this was the best place to fix this issue
since it seems a bit unobvious, in isolation, why we emit these
texture ops with a place holder register, bu
This makes sure to use a no-op swizzle while iteratively rendering each
level of a mipmap otherwise we may loose components and effectively
apply the swizzle twice by the time these levels are sampled.
---
src/mesa/drivers/common/meta_generate_mipmap.c | 12
1 file changed, 12 inserti
https://bugs.freedesktop.org/show_bug.cgi?id=54372
--- Comment #20 from Jesse Barnes ---
Ooh I'm going to have to page in the context on this one... but your
description does sound correct, and I have no problem with applying the patch
to avoid your crashes. I do remember fixing other bugs rela
On 06/09/2014 07:22 AM, Jose Fonseca wrote:
I don't think that OpenGL ICD should advertise multi-sample formats via the
standard DescribePixelFormat.
http://www.opengl.org/registry/specs/ARB/wgl_pixel_format.txt states:
Indices are assigned to pixel formats in the following order:
https://bugs.freedesktop.org/show_bug.cgi?id=79688
--- Comment #9 from Tobias Klausmann ---
The tag is present for /dev/dri/card0,1 so this may be the best option to use
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mes
When a multisampled texture is used for sampling the fast clear color value
needs to be programmed into the surface state. This was being left as all
zeroes so if the surface was cleared to a value other than black then it
wouldn't work properly. This doesn't matter for single-sample textures becau
On Jun 6, 2014 7:56 PM, "Emil Velikov" wrote:
>
> Hi Adrian,
Hi,
> I seem to recall seeing this patch although it seems like it never got
pushed.
> Note sure how the Android development process goes but imho these should
be
> safe to go in stable.
>
> Cc: "10.1 10.2"
> Reviewed-by: Emil Velikov
On Mon, Jun 9, 2014 at 2:59 AM, Kenneth Graunke wrote:
> We need to invalidate the live intervals when inserting new
> instructions.
>
> Signed-off-by: Kenneth Graunke
> Cc: mesa-sta...@lists.freedesktop.org
> ---
> src/mesa/drivers/dri/i965/brw_fs.cpp | 6 ++
> 1 file changed, 6 insertions(
Reviewed-by: Matt Turner
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On Thu, Jun 5, 2014 at 11:05 AM, Abdiel Janulgue
wrote:
> The negation source modifier on src registers has changed meaning in
> Broadwell when
> used with logical operations. Don't copy propagate when negate src modifier
> is set
> and when the destination instruction is a logical op.
>
> Signe
On Thu, Jun 5, 2014 at 11:05 AM, Abdiel Janulgue
wrote:
> On Broadwell, this reduces the instruction to a single operation when NOT is
> used with
> a logical instruction.
>
> Signed-off-by: Abdiel Janulgue
> ---
> src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp | 17 +
>
On Thu, Jun 5, 2014 at 11:05 AM, Abdiel Janulgue
wrote:
> The negation source modifier on src registers has changed meaning in
> Broadwell when
> used with logical operations. Don't copy propagate when negate src modifier
> is set
> and when the destination instruction is a logical op.
>
> Signe
- Original Message -
> On 06/09/2014 07:22 AM, Jose Fonseca wrote:
> > I don't think that OpenGL ICD should advertise multi-sample formats via the
> > standard DescribePixelFormat.
> > http://www.opengl.org/registry/specs/ARB/wgl_pixel_format.txt states:
> >
> > Indices are assigned
On Thu, Jun 5, 2014 at 11:05 AM, Abdiel Janulgue
wrote:
> v2 of the fix.
>
> Abdiel Janulgue (6):
> i965/fs: Refactor check for potential copy propagated instructions.
> i965/fs: skip copy-propate for logical instructions with negated src
> entries
> i965/fs: copy propagate 'NOT
From: Abdiel Janulgue
On Broadwell, this reduces the instruction to a single operation when NOT is
used with
a logical instruction.
Signed-off-by: Abdiel Janulgue
---
v3 [mattst88]: Move bits not used by patch 2 into this.
src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp | 19 ++
On Broadwell, this reduces the instruction to a single operation when NOT is
used with
a logical instruction.
Signed-off-by: Abdiel Janulgue
---
v3 [mattst88]: Move bits not used by patch 4 into this.
src/mesa/drivers/dri/i965/brw_vec4.h | 4 +-
.../drivers/dri/i965/brw_vec4_cop
On Mon, Jun 9, 2014 at 11:40 AM, Anuj Phogat wrote:
> On Fri, Jun 6, 2014 at 9:42 PM, Ian Romanick wrote:
>> I thought Matt already fixed this bug.
> A basic testing shows that below commit fixed the "garbage after #endif" bug
> but "#garbage after #else" bug still exists. Absence of tests kept i
On Fri, Jun 6, 2014 at 9:42 PM, Ian Romanick wrote:
> I thought Matt already fixed this bug.
A basic testing shows that below commit fixed the "garbage after #endif" bug
but "#garbage after #else" bug still exists. Absence of tests kept it untested.
>
> commit 060e69679925f171cfcc2a5f84fab1d833a7
On Mon, Jun 9, 2014 at 4:29 AM, Tapani Pälli wrote:
> Signed-off-by: Tapani Pälli
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=79724
> ---
> src/glsl/ast_to_hir.cpp | 9 +
> 1 file changed, 9 insertions(+)
>
> diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
> i
On Fri, Jun 6, 2014 at 5:41 PM, Marek Olšák wrote:
> Since this seems to be a GLES-only limitation, the patch should use
> _mesa_is_gles3 or _mesa_is_gles.
>
These changes occur inside a 'if' block testing for gles3 context.
> Marek
>
> On Sat, Jun 7, 2014 at 1:57 AM, Anuj Phogat wrote:
>> Fixes
On Mon, Jun 9, 2014 at 11:44 AM, Matt Turner wrote:
> On Mon, Jun 9, 2014 at 11:40 AM, Anuj Phogat wrote:
>> On Fri, Jun 6, 2014 at 9:42 PM, Ian Romanick wrote:
>>> I thought Matt already fixed this bug.
>> A basic testing shows that below commit fixed the "garbage after #endif" bug
>> but "#gar
On 06/09/2014 11:38 AM, Jose Fonseca wrote:
- Original Message -
On 06/09/2014 07:22 AM, Jose Fonseca wrote:
I don't think that OpenGL ICD should advertise multi-sample formats via the
standard DescribePixelFormat.
http://www.opengl.org/registry/specs/ARB/wgl_pixel_format.txt states:
Cuts five instructions out of SynMark's Gl32VSInstancing benchmark.
---
src/glsl/opt_algebraic.cpp | 46 ++
1 file changed, 46 insertions(+)
diff --git a/src/glsl/opt_algebraic.cpp b/src/glsl/opt_algebraic.cpp
index d57c3e8..be65799 100644
--- a/src/gls
Will be used in the next commit.
Reviewed-by: Eric Anholt
---
src/glsl/glsl_parser_extras.cpp | 2 +-
src/glsl/ir_optimization.h | 3 ++-
src/glsl/opt_algebraic.cpp | 11 ---
src/glsl/test_optpass.cpp | 2 +-
4 files changed, 12 insertions(+), 6 deletions(-)
diff --gi
The intention of this pass was to give us better instruction scheduling
opportunities, but it unexpectedly reduced some instruction counts as
well:
total instructions in shared programs: 139 -> 1666073 (-0.03%)
instructions in affected programs: 54612 -> 54046 (-1.04%)
(and trades 4 SIMD16
It would be good to have a piglit test which demonstrates the need for this.
Reviewed-by: Chris Forbes
On Tue, Jun 10, 2014 at 2:48 AM, Robert Bragg wrote:
> This makes sure to use a no-op swizzle while iteratively rendering each
> level of a mipmap otherwise we may loose components and effecti
On 04/06/14 13:36, Jon TURNEY wrote:
> On 03/06/2014 17:37, Emil Velikov wrote:
>> On 03/06/14 14:14, Jon TURNEY wrote:
>>> As a follow-up to my "Fix Apple-DRI GLX" patchset, allow building of a libGL
>>> capable of using driswrast on targets without libdrm, and make that the
>>> default
>>> config
- Original Message -
> On 06/09/2014 11:38 AM, Jose Fonseca wrote:
> >
> >
> > - Original Message -
> >> On 06/09/2014 07:22 AM, Jose Fonseca wrote:
> >>> I don't think that OpenGL ICD should advertise multi-sample formats via
> >>> the
> >>> standard DescribePixelFormat.
> >>> http
From: Thomas Helland
Found with IWYU, confirmed with grepping for "hash" and "symbol".
No negative effects on compilation.
IWYU also reported core.h and linker.h could be removed,
but I'm unsure if those are false positives.
Signed-off-by: Thomas Helland
---
src/glsl/link_uniform_initializers
From: Thomas Helland
This series removes some unused includes in the glsl-directory.
These were found with Google's include-what-you-use plugin for clang.
Patches have been compile-tested and a quick glxgears-run has been done.
I have not done a full piglit-run, let me know if that's wanted.
Oh,
From: Thomas Helland
Found with IWYU. Comment says it's for struct gl_extensions.
Grepping for gl_extensions shows no uses.
Tested by compiling on my Ivy-bridge system.
Signed-off-by: Thomas Helland
---
src/glsl/ast_to_hir.cpp | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/glsl/ast_to_
From: Thomas Helland
Found with IWYU, compile-tested on my Ivy-bridge system.
This is not used in the header, and is included in the source.
Signed-off-by: Thomas Helland
---
src/glsl/link_uniform_block_active_visitor.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/src/glsl/link_uniform
From: Thomas Helland
Found with IWYU. Compile-tested on my Ivy-bridge system.
Added comment about core.h being used for MAX2.
Signed-off-by: Thomas Helland
---
src/glsl/glsl_types.cpp | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/src/glsl/glsl_types.cpp b/src/glsl/glsl
From: Thomas Helland
Found with IWYU. Compile-tested on my Ivy-bridge system.
Signed-off-by: Thomas Helland
---
src/glsl/builtin_variables.cpp | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/glsl/builtin_variables.cpp b/src/glsl/builtin_variables.cpp
index 9b35850..e22b083 100644
--- a/
From: Thomas Helland
Found with IWYU. Compile-tested on my Ivy-bridge system.
Signed-off-by: Thomas Helland
---
src/glsl/ir_basic_block.cpp | 2 --
1 file changed, 2 deletions(-)
diff --git a/src/glsl/ir_basic_block.cpp b/src/glsl/ir_basic_block.cpp
index 426fda2..74ee4b6 100644
--- a/src/gls
From: Thomas Helland
Found with IWYU. Compile-tested on my Ivy-bridge system.
Signed-off-by: Thomas Helland
---
src/glsl/ir.cpp | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/glsl/ir.cpp b/src/glsl/ir.cpp
index 8fed768..10c0006 100644
--- a/src/glsl/ir.cpp
+++ b/src/glsl/ir.cpp
@@ -23,
From: Thomas Helland
Only function-defs use glsl_type so forward declare instead.
Compile-tested on my Ivy-bridge system.
IWYU also suggests removing #include , and this compiles fine.
I'm not familiar enough with memory management in C/C++ that I feel
comfortable removing this. Insights would b
From: Thomas Helland
Found with IWYU. Compile-tested on my Ivy-bridge system.
Signed-off-by: Thomas Helland
---
src/glsl/ir_expression_flattening.cpp | 2 --
1 file changed, 2 deletions(-)
diff --git a/src/glsl/ir_expression_flattening.cpp
b/src/glsl/ir_expression_flattening.cpp
index c1cadb
From: Thomas Helland
Found with IWYU. Compile-tested on my Ivy-bridge system.
Signed-off-by: Thomas Helland
---
src/glsl/ir_constant_expression.cpp | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/glsl/ir_constant_expression.cpp
b/src/glsl/ir_constant_expression.cpp
index 8afe8f7..7b4a2
From: Thomas Helland
Found with IWYU. Compile-tested on my Ivy-bridge system
Signed-off-by: Thomas Helland
---
src/glsl/hir_field_selection.cpp | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/glsl/hir_field_selection.cpp b/src/glsl/hir_field_selection.cpp
index 1e92c89..0fa9768 100644
-
On Sun, Jun 8, 2014 at 3:17 PM, Jordan Justen wrote:
> Previously setting:
> MESA_EXTENSION_OVERRIDE=-GL_MESA_ham_sandwich
>
> Would cause Mesa to advertise support for the GL_MESA_ham_sandwich
> extension, even though the override specifically asked for it to be
> disabled.
>
> Signed-off-by: Jor
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