On Mon, Jun 9, 2014 at 2:59 AM, Kenneth Graunke <kenn...@whitecape.org> wrote:
> We need to invalidate the live intervals when inserting new
> instructions.
>
> Signed-off-by: Kenneth Graunke <kenn...@whitecape.org>
> Cc: mesa-sta...@lists.freedesktop.org
> ---
> src/mesa/drivers/dri/i965/brw_fs.cpp | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
> b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index b485e65..be461ac 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -2482,6 +2482,8 @@ fs_visitor::insert_gen4_send_dependency_workarounds()
> if (brw->gen != 4 || brw->is_g4x)
> return;
>
> + bool progress = false;
> +
> /* Note that we're done with register allocation, so GRF fs_regs always
> * have a .reg_offset of 0.
> */
> @@ -2492,8 +2494,12 @@ fs_visitor::insert_gen4_send_dependency_workarounds()
> if (inst->mlen != 0 && inst->dst.file == GRF) {
> insert_gen4_pre_send_dependency_workarounds(inst);
> insert_gen4_post_send_dependency_workarounds(inst);
> + progress = true;
> }
> }
> +
> + if (progress)
> + invalidate_live_intervals();
> }
>
> /**
> --
> 1.9.2
What did this fix? Post-register allocation instruction scheduling?
Both are
Reviewed-by: Matt Turner <matts...@gmail.com>
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